2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/types.h>
22 #include <linux/init.h>
23 #include <linux/clk.h>
24 #include <linux/serial_8250.h>
25 #include <linux/irq.h>
27 #include <mach/hardware.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/time.h>
31 #include <asm/memory.h>
32 #include <asm/mach/map.h>
33 #include <mach/common.h>
34 #include <mach/board-mx31ads.h>
35 #include <mach/imx-uart.h>
36 #include <mach/iomux-mx3.h>
43 * @brief This file contains the board-specific initialization routines.
48 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
50 * The serial port definition structure.
52 static struct plat_serial8250_port serial_platform_data[] = {
54 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
55 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA),
56 .irq = EXPIO_INT_XUART_INTA,
60 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
62 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
63 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB),
64 .irq = EXPIO_INT_XUART_INTB,
68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
73 static struct platform_device serial_device = {
77 .platform_data = serial_platform_data,
81 static int __init mxc_init_extuart(void)
83 return platform_device_register(&serial_device);
86 static inline int mxc_init_extuart(void)
92 #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
93 static struct imxuart_platform_data uart_pdata = {
94 .flags = IMXUART_HAVE_RTSCTS,
97 static int uart_pins[] = {
104 static inline void mxc_init_imx_uart(void)
106 mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0");
107 mxc_register_device(&mxc_uart_device0, &uart_pdata);
109 #else /* !SERIAL_IMX */
110 static inline void mxc_init_imx_uart(void)
113 #endif /* !SERIAL_IMX */
115 static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
121 imr_val = __raw_readw(PBC_INTMASK_SET_REG);
122 int_valid = __raw_readw(PBC_INTSTATUS_REG) & imr_val;
124 expio_irq = MXC_EXP_IO_BASE;
125 for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
126 if ((int_valid & 1) == 0)
129 generic_handle_irq(expio_irq);
134 * Disable an expio pin's interrupt by setting the bit in the imr.
135 * @param irq an expio virtual irq number
137 static void expio_mask_irq(u32 irq)
139 u32 expio = MXC_IRQ_TO_EXPIO(irq);
140 /* mask the interrupt */
141 __raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG);
142 __raw_readw(PBC_INTMASK_CLEAR_REG);
146 * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
147 * @param irq an expanded io virtual irq number
149 static void expio_ack_irq(u32 irq)
151 u32 expio = MXC_IRQ_TO_EXPIO(irq);
152 /* clear the interrupt status */
153 __raw_writew(1 << expio, PBC_INTSTATUS_REG);
157 * Enable a expio pin's interrupt by clearing the bit in the imr.
158 * @param irq a expio virtual irq number
160 static void expio_unmask_irq(u32 irq)
162 u32 expio = MXC_IRQ_TO_EXPIO(irq);
163 /* unmask the interrupt */
164 __raw_writew(1 << expio, PBC_INTMASK_SET_REG);
167 static struct irq_chip expio_irq_chip = {
168 .ack = expio_ack_irq,
169 .mask = expio_mask_irq,
170 .unmask = expio_unmask_irq,
173 static void __init mx31ads_init_expio(void)
177 printk(KERN_INFO "MX31ADS EXPIO(CPLD) hardware\n");
180 * Configure INT line as GPIO input
182 mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio");
184 /* disable the interrupt and clear the status */
185 __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG);
186 __raw_writew(0xFFFF, PBC_INTSTATUS_REG);
187 for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
189 set_irq_chip(i, &expio_irq_chip);
190 set_irq_handler(i, handle_level_irq);
191 set_irq_flags(i, IRQF_VALID);
193 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
194 set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
198 * This structure defines static mappings for the i.MX31ADS board.
200 static struct map_desc mx31ads_io_desc[] __initdata = {
202 .virtual = AIPS1_BASE_ADDR_VIRT,
203 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
204 .length = AIPS1_SIZE,
205 .type = MT_DEVICE_NONSHARED
207 .virtual = SPBA0_BASE_ADDR_VIRT,
208 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
209 .length = SPBA0_SIZE,
210 .type = MT_DEVICE_NONSHARED
212 .virtual = AIPS2_BASE_ADDR_VIRT,
213 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
214 .length = AIPS2_SIZE,
215 .type = MT_DEVICE_NONSHARED
217 .virtual = CS4_BASE_ADDR_VIRT,
218 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
219 .length = CS4_SIZE / 2,
225 * Set up static virtual mappings.
227 static void __init mx31ads_map_io(void)
230 iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc));
233 static void __init mx31ads_init_irq(void)
236 mx31ads_init_expio();
240 * Board specific initialization.
242 static void __init mxc_board_init(void)
248 static void __init mx31ads_timer_init(void)
250 mx31_clocks_init(26000000);
253 static struct sys_timer mx31ads_timer = {
254 .init = mx31ads_timer_init,
258 * The following uses standard kernel macros defined in arch.h in order to
259 * initialize __mach_desc_MX31ADS data structure.
261 MACHINE_START(MX31ADS, "Freescale MX31ADS")
262 /* Maintainer: Freescale Semiconductor, Inc. */
263 .phys_io = AIPS1_BASE_ADDR,
264 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
265 .boot_params = PHYS_OFFSET + 0x100,
266 .map_io = mx31ads_map_io,
267 .init_irq = mx31ads_init_irq,
268 .init_machine = mxc_board_init,
269 .timer = &mx31ads_timer,