1 #ifndef __MACH_OMAP1_MMU_H
2 #define __MACH_OMAP1_MMU_H
4 #include <asm/arch/mmu.h>
7 #define MMU_LOCK_BASE_MASK (0x3f << 10)
8 #define MMU_LOCK_VICTIM_MASK (0x3f << 4)
10 #define OMAP_MMU_BASE (0xfffed200)
11 #define OMAP_MMU_PREFETCH (OMAP_MMU_BASE + 0x00)
12 #define OMAP_MMU_WALKING_ST (OMAP_MMU_BASE + 0x04)
13 #define OMAP_MMU_CNTL (OMAP_MMU_BASE + 0x08)
14 #define OMAP_MMU_FAULT_AD_H (OMAP_MMU_BASE + 0x0c)
15 #define OMAP_MMU_FAULT_AD_L (OMAP_MMU_BASE + 0x10)
16 #define OMAP_MMU_FAULT_ST (OMAP_MMU_BASE + 0x14)
17 #define OMAP_MMU_IT_ACK (OMAP_MMU_BASE + 0x18)
18 #define OMAP_MMU_TTB_H (OMAP_MMU_BASE + 0x1c)
19 #define OMAP_MMU_TTB_L (OMAP_MMU_BASE + 0x20)
20 #define OMAP_MMU_LOCK (OMAP_MMU_BASE + 0x24)
21 #define OMAP_MMU_LD_TLB (OMAP_MMU_BASE + 0x28)
22 #define OMAP_MMU_CAM_H (OMAP_MMU_BASE + 0x2c)
23 #define OMAP_MMU_CAM_L (OMAP_MMU_BASE + 0x30)
24 #define OMAP_MMU_RAM_H (OMAP_MMU_BASE + 0x34)
25 #define OMAP_MMU_RAM_L (OMAP_MMU_BASE + 0x38)
26 #define OMAP_MMU_GFLUSH (OMAP_MMU_BASE + 0x3c)
27 #define OMAP_MMU_FLUSH_ENTRY (OMAP_MMU_BASE + 0x40)
28 #define OMAP_MMU_READ_CAM_H (OMAP_MMU_BASE + 0x44)
29 #define OMAP_MMU_READ_CAM_L (OMAP_MMU_BASE + 0x48)
30 #define OMAP_MMU_READ_RAM_H (OMAP_MMU_BASE + 0x4c)
31 #define OMAP_MMU_READ_RAM_L (OMAP_MMU_BASE + 0x50)
33 #define OMAP_MMU_CNTL_BURST_16MNGT_EN 0x0020
34 #define OMAP_MMU_CNTL_WTL_EN 0x0004
35 #define OMAP_MMU_CNTL_MMU_EN 0x0002
36 #define OMAP_MMU_CNTL_RESET_SW 0x0001
38 #define OMAP_MMU_FAULT_AD_H_DP 0x0100
39 #define OMAP_MMU_FAULT_AD_H_ADR_MASK 0x00ff
41 #define OMAP_MMU_FAULT_ST_PREF 0x0008
42 #define OMAP_MMU_FAULT_ST_PERM 0x0004
43 #define OMAP_MMU_FAULT_ST_TLB_MISS 0x0002
44 #define OMAP_MMU_FAULT_ST_TRANS 0x0001
46 #define OMAP_MMU_IT_ACK_IT_ACK 0x0001
48 #define OMAP_MMU_CAM_H_VA_TAG_H_MASK 0x0003
50 #define OMAP_MMU_CAM_L_VA_TAG_L1_MASK 0xc000
51 #define OMAP_MMU_CAM_L_VA_TAG_L2_MASK_1MB 0x0000
52 #define OMAP_MMU_CAM_L_VA_TAG_L2_MASK_64KB 0x3c00
53 #define OMAP_MMU_CAM_L_VA_TAG_L2_MASK_4KB 0x3fc0
54 #define OMAP_MMU_CAM_L_VA_TAG_L2_MASK_1KB 0x3ff0
55 #define OMAP_MMU_CAM_L_P 0x0008
56 #define OMAP_MMU_CAM_L_V 0x0004
57 #define OMAP_MMU_CAM_L_PAGESIZE_MASK 0x0003
58 #define OMAP_MMU_CAM_L_PAGESIZE_1MB 0x0000
59 #define OMAP_MMU_CAM_L_PAGESIZE_64KB 0x0001
60 #define OMAP_MMU_CAM_L_PAGESIZE_4KB 0x0002
61 #define OMAP_MMU_CAM_L_PAGESIZE_1KB 0x0003
63 #define OMAP_MMU_CAM_P OMAP_MMU_CAM_L_P
64 #define OMAP_MMU_CAM_V OMAP_MMU_CAM_L_V
65 #define OMAP_MMU_CAM_PAGESIZE_MASK OMAP_MMU_CAM_L_PAGESIZE_MASK
66 #define OMAP_MMU_CAM_PAGESIZE_1MB OMAP_MMU_CAM_L_PAGESIZE_1MB
67 #define OMAP_MMU_CAM_PAGESIZE_64KB OMAP_MMU_CAM_L_PAGESIZE_64KB
68 #define OMAP_MMU_CAM_PAGESIZE_4KB OMAP_MMU_CAM_L_PAGESIZE_4KB
69 #define OMAP_MMU_CAM_PAGESIZE_1KB OMAP_MMU_CAM_L_PAGESIZE_1KB
71 #define OMAP_MMU_RAM_L_RAM_LSB_MASK 0xfc00
72 #define OMAP_MMU_RAM_L_AP_MASK 0x0300
73 #define OMAP_MMU_RAM_L_AP_NA 0x0000
74 #define OMAP_MMU_RAM_L_AP_RO 0x0200
75 #define OMAP_MMU_RAM_L_AP_FA 0x0300
77 #define OMAP_MMU_LD_TLB_RD 0x0002
79 #define INIT_TLB_ENTRY(ent,v,p,ps) \
85 (ent)->ap = OMAP_MMU_RAM_L_AP_FA; \
88 #define INIT_TLB_ENTRY_4KB_PRESERVED(ent,v,p) \
92 (ent)->pgsz = OMAP_MMU_CAM_PAGESIZE_4KB; \
93 (ent)->prsvd = OMAP_MMU_CAM_P; \
94 (ent)->ap = OMAP_MMU_RAM_L_AP_FA; \
97 extern struct omap_mmu_ops omap1_mmu_ops;
99 struct omap_mmu_tlb_entry {
102 unsigned int pgsz, prsvd, valid;
107 static inline unsigned short
108 omap_mmu_read_reg(struct omap_mmu *mmu, unsigned long reg)
110 return __raw_readw(mmu->base + reg);
113 static inline void omap_mmu_write_reg(struct omap_mmu *mmu,
114 unsigned short val, unsigned long reg)
116 __raw_writew(val, mmu->base + reg);
119 int omap_dsp_request_mem(void);
120 void omap_dsp_release_mem(void);
122 static inline void omap_mmu_itack(struct omap_mmu *mmu)
124 omap_mmu_write_reg(mmu, OMAP_MMU_IT_ACK_IT_ACK, OMAP_MMU_IT_ACK);
127 #endif /* __MACH_OMAP1_MMU_H */