2 * linux/arch/arm/mach-omap2/devices.c
4 * OMAP2 platform device setup/initialization
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
17 #include <linux/clk.h>
19 #include <mach/hardware.h>
20 #include <asm/mach-types.h>
21 #include <asm/mach/map.h>
23 #include <mach/control.h>
25 #include <mach/board.h>
27 #include <mach/gpio.h>
31 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
33 static struct resource cam_resources[] = {
35 .start = OMAP24XX_CAMERA_BASE,
36 .end = OMAP24XX_CAMERA_BASE + 0xfff,
37 .flags = IORESOURCE_MEM,
40 .start = INT_24XX_CAM_IRQ,
41 .flags = IORESOURCE_IRQ,
45 static struct platform_device omap_cam_device = {
46 .name = "omap24xxcam",
48 .num_resources = ARRAY_SIZE(cam_resources),
49 .resource = cam_resources,
52 static inline void omap_init_camera(void)
54 platform_device_register(&omap_cam_device);
57 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
59 static struct resource cam_resources[] = {
61 .start = OMAP34XX_CAMERA_BASE,
62 .end = OMAP34XX_CAMERA_BASE + 0x1B70,
63 .flags = IORESOURCE_MEM,
66 .start = INT_34XX_CAM_IRQ,
67 .flags = IORESOURCE_IRQ,
71 static struct platform_device omap_cam_device = {
72 .name = "omap34xxcam",
74 .num_resources = ARRAY_SIZE(cam_resources),
75 .resource = cam_resources,
78 static inline void omap_init_camera(void)
80 platform_device_register(&omap_cam_device);
83 static inline void omap_init_camera(void)
88 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
90 #define MBOX_REG_SIZE 0x120
92 static struct resource omap2_mbox_resources[] = {
94 .start = OMAP24XX_MAILBOX_BASE,
95 .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
96 .flags = IORESOURCE_MEM,
99 .start = INT_24XX_MAIL_U0_MPU,
100 .flags = IORESOURCE_IRQ,
103 .start = INT_24XX_MAIL_U3_MPU,
104 .flags = IORESOURCE_IRQ,
108 static struct resource omap3_mbox_resources[] = {
110 .start = OMAP34XX_MAILBOX_BASE,
111 .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
112 .flags = IORESOURCE_MEM,
115 .start = INT_24XX_MAIL_U0_MPU,
116 .flags = IORESOURCE_IRQ,
120 static struct platform_device mbox_device = {
121 .name = "omap2-mailbox",
125 static inline void omap_init_mbox(void)
127 if (cpu_is_omap2420()) {
128 mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources);
129 mbox_device.resource = omap2_mbox_resources;
130 } else if (cpu_is_omap3430()) {
131 mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources);
132 mbox_device.resource = omap3_mbox_resources;
136 platform_device_register(&mbox_device);
139 static inline void omap_init_mbox(void) { }
140 #endif /* CONFIG_OMAP_MBOX_FWK */
142 #if defined(CONFIG_OMAP_STI)
144 #if defined(CONFIG_ARCH_OMAP2)
146 #define OMAP2_STI_BASE 0x48068000
147 #define OMAP2_STI_CHANNEL_BASE 0x54000000
148 #define OMAP2_STI_IRQ 4
150 static struct resource sti_resources[] = {
152 .start = OMAP2_STI_BASE,
153 .end = OMAP2_STI_BASE + 0x7ff,
154 .flags = IORESOURCE_MEM,
157 .start = OMAP2_STI_CHANNEL_BASE,
158 .end = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
159 .flags = IORESOURCE_MEM,
162 .start = OMAP2_STI_IRQ,
163 .flags = IORESOURCE_IRQ,
166 #elif defined(CONFIG_ARCH_OMAP3)
168 #define OMAP3_SDTI_BASE 0x54500000
169 #define OMAP3_SDTI_CHANNEL_BASE 0x54600000
171 static struct resource sti_resources[] = {
173 .start = OMAP3_SDTI_BASE,
174 .end = OMAP3_SDTI_BASE + 0xFFF,
175 .flags = IORESOURCE_MEM,
178 .start = OMAP3_SDTI_CHANNEL_BASE,
179 .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
180 .flags = IORESOURCE_MEM,
186 static struct platform_device sti_device = {
189 .num_resources = ARRAY_SIZE(sti_resources),
190 .resource = sti_resources,
193 static inline void omap_init_sti(void)
195 platform_device_register(&sti_device);
198 static inline void omap_init_sti(void) {}
201 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
203 #include <mach/mcspi.h>
205 #define OMAP2_MCSPI1_BASE 0x48098000
206 #define OMAP2_MCSPI2_BASE 0x4809a000
207 #define OMAP2_MCSPI3_BASE 0x480b8000
208 #define OMAP2_MCSPI4_BASE 0x480ba000
210 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
214 static struct resource omap2_mcspi1_resources[] = {
216 .start = OMAP2_MCSPI1_BASE,
217 .end = OMAP2_MCSPI1_BASE + 0xff,
218 .flags = IORESOURCE_MEM,
222 static struct platform_device omap2_mcspi1 = {
223 .name = "omap2_mcspi",
225 .num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
226 .resource = omap2_mcspi1_resources,
228 .platform_data = &omap2_mcspi1_config,
232 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
236 static struct resource omap2_mcspi2_resources[] = {
238 .start = OMAP2_MCSPI2_BASE,
239 .end = OMAP2_MCSPI2_BASE + 0xff,
240 .flags = IORESOURCE_MEM,
244 static struct platform_device omap2_mcspi2 = {
245 .name = "omap2_mcspi",
247 .num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
248 .resource = omap2_mcspi2_resources,
250 .platform_data = &omap2_mcspi2_config,
254 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
255 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
259 static struct resource omap2_mcspi3_resources[] = {
261 .start = OMAP2_MCSPI3_BASE,
262 .end = OMAP2_MCSPI3_BASE + 0xff,
263 .flags = IORESOURCE_MEM,
267 static struct platform_device omap2_mcspi3 = {
268 .name = "omap2_mcspi",
270 .num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
271 .resource = omap2_mcspi3_resources,
273 .platform_data = &omap2_mcspi3_config,
278 #ifdef CONFIG_ARCH_OMAP3
279 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
283 static struct resource omap2_mcspi4_resources[] = {
285 .start = OMAP2_MCSPI4_BASE,
286 .end = OMAP2_MCSPI4_BASE + 0xff,
287 .flags = IORESOURCE_MEM,
291 static struct platform_device omap2_mcspi4 = {
292 .name = "omap2_mcspi",
294 .num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
295 .resource = omap2_mcspi4_resources,
297 .platform_data = &omap2_mcspi4_config,
302 static void omap_init_mcspi(void)
304 platform_device_register(&omap2_mcspi1);
305 platform_device_register(&omap2_mcspi2);
306 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
307 if (cpu_is_omap2430() || cpu_is_omap343x())
308 platform_device_register(&omap2_mcspi3);
310 #ifdef CONFIG_ARCH_OMAP3
311 if (cpu_is_omap343x())
312 platform_device_register(&omap2_mcspi4);
317 static inline void omap_init_mcspi(void) {}
320 #ifdef CONFIG_SND_OMAP24XX_EAC
322 #define OMAP2_EAC_BASE (L4_24XX_BASE + 0x90000)
324 static struct resource omap2_eac_resources[] = {
326 .start = OMAP2_EAC_BASE,
327 .end = OMAP2_EAC_BASE + 0xfff,
328 .flags = IORESOURCE_MEM,
332 static struct platform_device omap2_eac_device = {
333 .name = "omap24xx-eac",
335 .num_resources = ARRAY_SIZE(omap2_eac_resources),
336 .resource = omap2_eac_resources,
338 .platform_data = NULL,
342 void omap_init_eac(struct eac_platform_data *pdata)
344 omap2_eac_device.dev.platform_data = pdata;
345 platform_device_register(&omap2_eac_device);
349 void omap_init_eac(struct eac_platform_data *pdata) {}
352 #ifdef CONFIG_OMAP_SHA1_MD5
353 static struct resource sha1_md5_resources[] = {
355 .start = OMAP24XX_SEC_SHA1MD5_BASE,
356 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
357 .flags = IORESOURCE_MEM,
360 .start = INT_24XX_SHA1MD5,
361 .flags = IORESOURCE_IRQ,
365 static struct platform_device sha1_md5_device = {
366 .name = "OMAP SHA1/MD5",
368 .num_resources = ARRAY_SIZE(sha1_md5_resources),
369 .resource = sha1_md5_resources,
372 static void omap_init_sha1_md5(void)
374 platform_device_register(&sha1_md5_device);
377 static inline void omap_init_sha1_md5(void) { }
380 /*-------------------------------------------------------------------------*/
382 #ifdef CONFIG_ARCH_OMAP3
384 #define MMCHS_SYSCONFIG 0x0010
385 #define MMCHS_SYSCONFIG_SWRESET (1 << 1)
386 #define MMCHS_SYSSTATUS 0x0014
387 #define MMCHS_SYSSTATUS_RESETDONE (1 << 0)
389 static struct platform_device dummy_pdev = {
391 .bus = &platform_bus_type,
396 * omap_hsmmc_reset() - Full reset of each HS-MMC controller
398 * Ensure that each MMC controller is fully reset. Controllers
399 * left in an unknown state (by bootloader) may prevent retention
400 * or OFF-mode. This is especially important in cases where the
401 * MMC driver is not enabled, _or_ built as a module.
403 * In order for reset to work, interface, functional and debounce
404 * clocks must be enabled. The debounce clock comes from func_32k_clk
405 * and is not under SW control, so we only enable i- and f-clocks.
407 static void __init omap_hsmmc_reset(void)
409 u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC :
412 for (i = 0; i < nr_controllers; i++) {
414 struct clk *iclk, *fclk;
415 struct device *dev = &dummy_pdev.dev;
419 base = OMAP2_MMC1_BASE;
422 base = OMAP2_MMC2_BASE;
425 base = OMAP3_MMC3_BASE;
430 iclk = clk_get(dev, "mmchs_ick");
431 if (iclk && clk_enable(iclk))
434 fclk = clk_get(dev, "mmchs_fck");
435 if (fclk && clk_enable(fclk))
438 if (!iclk || !fclk) {
440 "%s: Unable to enable clocks for MMC%d, "
441 "cannot reset.\n", __func__, i);
445 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
446 v = omap_readl(base + MMCHS_SYSSTATUS);
447 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
448 MMCHS_SYSSTATUS_RESETDONE))
462 static inline void omap_hsmmc_reset(void) {}
465 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
466 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
468 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
471 if (cpu_is_omap2420() && controller_nr == 0) {
472 omap_cfg_reg(H18_24XX_MMC_CMD);
473 omap_cfg_reg(H15_24XX_MMC_CLKI);
474 omap_cfg_reg(G19_24XX_MMC_CLKO);
475 omap_cfg_reg(F20_24XX_MMC_DAT0);
476 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
477 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
478 if (mmc_controller->slots[0].wires == 4) {
479 omap_cfg_reg(H14_24XX_MMC_DAT1);
480 omap_cfg_reg(E19_24XX_MMC_DAT2);
481 omap_cfg_reg(D19_24XX_MMC_DAT3);
482 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
483 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
484 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
488 * Use internal loop-back in MMC/SDIO Module Input Clock
491 if (mmc_controller->slots[0].internal_clock) {
492 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
494 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
499 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
504 for (i = 0; i < nr_controllers; i++) {
505 unsigned long base, size;
506 unsigned int irq = 0;
511 omap2_mmc_mux(mmc_data[i], i);
515 base = OMAP2_MMC1_BASE;
516 irq = INT_24XX_MMC_IRQ;
519 base = OMAP2_MMC2_BASE;
520 irq = INT_24XX_MMC2_IRQ;
523 if (!cpu_is_omap34xx())
525 base = OMAP3_MMC3_BASE;
526 irq = INT_34XX_MMC3_IRQ;
532 if (cpu_is_omap2420())
533 size = OMAP2420_MMC_SIZE;
537 omap_mmc_add(i, base, size, irq, mmc_data[i]);
543 /*-------------------------------------------------------------------------*/
545 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
546 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
547 #define OMAP_HDQ_BASE 0x480B2000
549 static struct resource omap_hdq_resources[] = {
551 .start = OMAP_HDQ_BASE,
552 .end = OMAP_HDQ_BASE + 0x1C,
553 .flags = IORESOURCE_MEM,
556 .start = INT_24XX_HDQ_IRQ,
557 .flags = IORESOURCE_IRQ,
560 static struct platform_device omap_hdq_dev = {
564 .platform_data = NULL,
566 .num_resources = ARRAY_SIZE(omap_hdq_resources),
567 .resource = omap_hdq_resources,
569 static inline void omap_hdq_init(void)
571 (void) platform_device_register(&omap_hdq_dev);
574 static inline void omap_hdq_init(void) {}
577 /*-------------------------------------------------------------------------*/
579 static int __init omap2_init_devices(void)
581 /* please keep these calls, and their implementations above,
582 * in alphabetical order so they're easier to sort through.
590 omap_init_sha1_md5();
594 arch_initcall(omap2_init_devices);