2 * linux/arch/arm/mach-omap2/devices.c
4 * OMAP2 platform device setup/initialization
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
17 #include <linux/clk.h>
19 #include <mach/hardware.h>
20 #include <asm/mach-types.h>
21 #include <asm/mach/map.h>
23 #include <mach/control.h>
25 #include <mach/board.h>
27 #include <mach/gpio.h>
31 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
33 static struct resource cam_resources[] = {
35 .start = OMAP24XX_CAMERA_BASE,
36 .end = OMAP24XX_CAMERA_BASE + 0xfff,
37 .flags = IORESOURCE_MEM,
40 .start = INT_24XX_CAM_IRQ,
41 .flags = IORESOURCE_IRQ,
45 static struct platform_device omap_cam_device = {
46 .name = "omap24xxcam",
48 .num_resources = ARRAY_SIZE(cam_resources),
49 .resource = cam_resources,
52 static inline void omap_init_camera(void)
54 platform_device_register(&omap_cam_device);
57 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
59 static struct resource omap3isp_resources[] = {
61 .start = OMAP3430_ISP_BASE,
62 .end = OMAP3430_ISP_END,
63 .flags = IORESOURCE_MEM,
66 .start = OMAP3430_ISP_CBUFF_BASE,
67 .end = OMAP3430_ISP_CBUFF_END,
68 .flags = IORESOURCE_MEM,
71 .start = OMAP3430_ISP_CCP2_BASE,
72 .end = OMAP3430_ISP_CCP2_END,
73 .flags = IORESOURCE_MEM,
76 .start = OMAP3430_ISP_CCDC_BASE,
77 .end = OMAP3430_ISP_CCDC_END,
78 .flags = IORESOURCE_MEM,
81 .start = OMAP3430_ISP_HIST_BASE,
82 .end = OMAP3430_ISP_HIST_END,
83 .flags = IORESOURCE_MEM,
86 .start = OMAP3430_ISP_H3A_BASE,
87 .end = OMAP3430_ISP_H3A_END,
88 .flags = IORESOURCE_MEM,
91 .start = OMAP3430_ISP_PREV_BASE,
92 .end = OMAP3430_ISP_PREV_END,
93 .flags = IORESOURCE_MEM,
96 .start = OMAP3430_ISP_RESZ_BASE,
97 .end = OMAP3430_ISP_RESZ_END,
98 .flags = IORESOURCE_MEM,
101 .start = OMAP3430_ISP_SBL_BASE,
102 .end = OMAP3430_ISP_SBL_END,
103 .flags = IORESOURCE_MEM,
106 .start = OMAP3430_ISP_CSI2A_BASE,
107 .end = OMAP3430_ISP_CSI2A_END,
108 .flags = IORESOURCE_MEM,
111 .start = OMAP3430_ISP_CSI2PHY_BASE,
112 .end = OMAP3430_ISP_CSI2PHY_END,
113 .flags = IORESOURCE_MEM,
116 .start = INT_34XX_CAM_IRQ,
117 .flags = IORESOURCE_IRQ,
121 static struct platform_device omap3isp_device = {
124 .num_resources = ARRAY_SIZE(omap3isp_resources),
125 .resource = omap3isp_resources,
128 static inline void omap_init_camera(void)
130 platform_device_register(&omap3isp_device);
133 static inline void omap_init_camera(void)
138 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
140 #define MBOX_REG_SIZE 0x120
142 static struct resource omap2_mbox_resources[] = {
144 .start = OMAP24XX_MAILBOX_BASE,
145 .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
146 .flags = IORESOURCE_MEM,
149 .start = INT_24XX_MAIL_U0_MPU,
150 .flags = IORESOURCE_IRQ,
153 .start = INT_24XX_MAIL_U3_MPU,
154 .flags = IORESOURCE_IRQ,
158 static struct resource omap3_mbox_resources[] = {
160 .start = OMAP34XX_MAILBOX_BASE,
161 .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
162 .flags = IORESOURCE_MEM,
165 .start = INT_24XX_MAIL_U0_MPU,
166 .flags = IORESOURCE_IRQ,
170 static struct platform_device mbox_device = {
171 .name = "omap2-mailbox",
175 static inline void omap_init_mbox(void)
177 if (cpu_is_omap2420()) {
178 mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources);
179 mbox_device.resource = omap2_mbox_resources;
180 } else if (cpu_is_omap3430()) {
181 mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources);
182 mbox_device.resource = omap3_mbox_resources;
186 platform_device_register(&mbox_device);
189 static inline void omap_init_mbox(void) { }
190 #endif /* CONFIG_OMAP_MBOX_FWK */
192 #if defined(CONFIG_OMAP_STI)
194 #if defined(CONFIG_ARCH_OMAP2)
196 #define OMAP2_STI_BASE 0x48068000
197 #define OMAP2_STI_CHANNEL_BASE 0x54000000
198 #define OMAP2_STI_IRQ 4
200 static struct resource sti_resources[] = {
202 .start = OMAP2_STI_BASE,
203 .end = OMAP2_STI_BASE + 0x7ff,
204 .flags = IORESOURCE_MEM,
207 .start = OMAP2_STI_CHANNEL_BASE,
208 .end = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
209 .flags = IORESOURCE_MEM,
212 .start = OMAP2_STI_IRQ,
213 .flags = IORESOURCE_IRQ,
216 #elif defined(CONFIG_ARCH_OMAP3)
218 #define OMAP3_SDTI_BASE 0x54500000
219 #define OMAP3_SDTI_CHANNEL_BASE 0x54600000
221 static struct resource sti_resources[] = {
223 .start = OMAP3_SDTI_BASE,
224 .end = OMAP3_SDTI_BASE + 0xFFF,
225 .flags = IORESOURCE_MEM,
228 .start = OMAP3_SDTI_CHANNEL_BASE,
229 .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
230 .flags = IORESOURCE_MEM,
236 static struct platform_device sti_device = {
239 .num_resources = ARRAY_SIZE(sti_resources),
240 .resource = sti_resources,
243 static inline void omap_init_sti(void)
245 platform_device_register(&sti_device);
248 static inline void omap_init_sti(void) {}
251 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
253 #include <mach/mcspi.h>
255 #define OMAP2_MCSPI1_BASE 0x48098000
256 #define OMAP2_MCSPI2_BASE 0x4809a000
257 #define OMAP2_MCSPI3_BASE 0x480b8000
258 #define OMAP2_MCSPI4_BASE 0x480ba000
260 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
264 static struct resource omap2_mcspi1_resources[] = {
266 .start = OMAP2_MCSPI1_BASE,
267 .end = OMAP2_MCSPI1_BASE + 0xff,
268 .flags = IORESOURCE_MEM,
272 static struct platform_device omap2_mcspi1 = {
273 .name = "omap2_mcspi",
275 .num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
276 .resource = omap2_mcspi1_resources,
278 .platform_data = &omap2_mcspi1_config,
282 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
286 static struct resource omap2_mcspi2_resources[] = {
288 .start = OMAP2_MCSPI2_BASE,
289 .end = OMAP2_MCSPI2_BASE + 0xff,
290 .flags = IORESOURCE_MEM,
294 static struct platform_device omap2_mcspi2 = {
295 .name = "omap2_mcspi",
297 .num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
298 .resource = omap2_mcspi2_resources,
300 .platform_data = &omap2_mcspi2_config,
304 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
305 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
309 static struct resource omap2_mcspi3_resources[] = {
311 .start = OMAP2_MCSPI3_BASE,
312 .end = OMAP2_MCSPI3_BASE + 0xff,
313 .flags = IORESOURCE_MEM,
317 static struct platform_device omap2_mcspi3 = {
318 .name = "omap2_mcspi",
320 .num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
321 .resource = omap2_mcspi3_resources,
323 .platform_data = &omap2_mcspi3_config,
328 #ifdef CONFIG_ARCH_OMAP3
329 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
333 static struct resource omap2_mcspi4_resources[] = {
335 .start = OMAP2_MCSPI4_BASE,
336 .end = OMAP2_MCSPI4_BASE + 0xff,
337 .flags = IORESOURCE_MEM,
341 static struct platform_device omap2_mcspi4 = {
342 .name = "omap2_mcspi",
344 .num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
345 .resource = omap2_mcspi4_resources,
347 .platform_data = &omap2_mcspi4_config,
352 static void omap_init_mcspi(void)
354 platform_device_register(&omap2_mcspi1);
355 platform_device_register(&omap2_mcspi2);
356 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
357 if (cpu_is_omap2430() || cpu_is_omap343x())
358 platform_device_register(&omap2_mcspi3);
360 #ifdef CONFIG_ARCH_OMAP3
361 if (cpu_is_omap343x())
362 platform_device_register(&omap2_mcspi4);
367 static inline void omap_init_mcspi(void) {}
370 #ifdef CONFIG_SND_OMAP24XX_EAC
372 #define OMAP2_EAC_BASE (L4_24XX_BASE + 0x90000)
374 static struct resource omap2_eac_resources[] = {
376 .start = OMAP2_EAC_BASE,
377 .end = OMAP2_EAC_BASE + 0xfff,
378 .flags = IORESOURCE_MEM,
382 static struct platform_device omap2_eac_device = {
383 .name = "omap24xx-eac",
385 .num_resources = ARRAY_SIZE(omap2_eac_resources),
386 .resource = omap2_eac_resources,
388 .platform_data = NULL,
392 void omap_init_eac(struct eac_platform_data *pdata)
394 omap2_eac_device.dev.platform_data = pdata;
395 platform_device_register(&omap2_eac_device);
399 void omap_init_eac(struct eac_platform_data *pdata) {}
402 #ifdef CONFIG_OMAP_SHA1_MD5
403 static struct resource sha1_md5_resources[] = {
405 .start = OMAP24XX_SEC_SHA1MD5_BASE,
406 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
407 .flags = IORESOURCE_MEM,
410 .start = INT_24XX_SHA1MD5,
411 .flags = IORESOURCE_IRQ,
415 static struct platform_device sha1_md5_device = {
416 .name = "OMAP SHA1/MD5",
418 .num_resources = ARRAY_SIZE(sha1_md5_resources),
419 .resource = sha1_md5_resources,
422 static void omap_init_sha1_md5(void)
424 platform_device_register(&sha1_md5_device);
427 static inline void omap_init_sha1_md5(void) { }
430 /*-------------------------------------------------------------------------*/
432 #ifdef CONFIG_ARCH_OMAP3
434 #define MMCHS_SYSCONFIG 0x0010
435 #define MMCHS_SYSCONFIG_SWRESET (1 << 1)
436 #define MMCHS_SYSSTATUS 0x0014
437 #define MMCHS_SYSSTATUS_RESETDONE (1 << 0)
439 static struct platform_device dummy_pdev = {
441 .bus = &platform_bus_type,
446 * omap_hsmmc_reset() - Full reset of each HS-MMC controller
448 * Ensure that each MMC controller is fully reset. Controllers
449 * left in an unknown state (by bootloader) may prevent retention
450 * or OFF-mode. This is especially important in cases where the
451 * MMC driver is not enabled, _or_ built as a module.
453 * In order for reset to work, interface, functional and debounce
454 * clocks must be enabled. The debounce clock comes from func_32k_clk
455 * and is not under SW control, so we only enable i- and f-clocks.
457 static void __init omap_hsmmc_reset(void)
459 u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC :
462 for (i = 0; i < nr_controllers; i++) {
464 struct clk *iclk, *fclk;
465 struct device *dev = &dummy_pdev.dev;
469 base = OMAP2_MMC1_BASE;
472 base = OMAP2_MMC2_BASE;
475 base = OMAP3_MMC3_BASE;
480 iclk = clk_get(dev, "mmchs_ick");
481 if (iclk && clk_enable(iclk))
484 fclk = clk_get(dev, "mmchs_fck");
485 if (fclk && clk_enable(fclk))
488 if (!iclk || !fclk) {
490 "%s: Unable to enable clocks for MMC%d, "
491 "cannot reset.\n", __func__, i);
495 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
496 v = omap_readl(base + MMCHS_SYSSTATUS);
497 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
498 MMCHS_SYSSTATUS_RESETDONE))
512 static inline void omap_hsmmc_reset(void) {}
515 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
516 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
518 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
521 if (cpu_is_omap2420() && controller_nr == 0) {
522 omap_cfg_reg(H18_24XX_MMC_CMD);
523 omap_cfg_reg(H15_24XX_MMC_CLKI);
524 omap_cfg_reg(G19_24XX_MMC_CLKO);
525 omap_cfg_reg(F20_24XX_MMC_DAT0);
526 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
527 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
528 if (mmc_controller->slots[0].wires == 4) {
529 omap_cfg_reg(H14_24XX_MMC_DAT1);
530 omap_cfg_reg(E19_24XX_MMC_DAT2);
531 omap_cfg_reg(D19_24XX_MMC_DAT3);
532 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
533 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
534 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
538 * Use internal loop-back in MMC/SDIO Module Input Clock
541 if (mmc_controller->slots[0].internal_clock) {
542 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
544 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
549 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
555 for (i = 0; i < nr_controllers; i++) {
556 unsigned long base, size;
557 unsigned int irq = 0;
562 omap2_mmc_mux(mmc_data[i], i);
566 base = OMAP2_MMC1_BASE;
567 irq = INT_24XX_MMC_IRQ;
570 base = OMAP2_MMC2_BASE;
571 irq = INT_24XX_MMC2_IRQ;
574 if (!cpu_is_omap34xx())
576 base = OMAP3_MMC3_BASE;
577 irq = INT_34XX_MMC3_IRQ;
583 if (cpu_is_omap2420()) {
584 size = OMAP2420_MMC_SIZE;
588 name = "mmci-omap-hs";
590 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
596 /*-------------------------------------------------------------------------*/
598 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
599 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
600 #define OMAP_HDQ_BASE 0x480B2000
602 static struct resource omap_hdq_resources[] = {
604 .start = OMAP_HDQ_BASE,
605 .end = OMAP_HDQ_BASE + 0x1C,
606 .flags = IORESOURCE_MEM,
609 .start = INT_24XX_HDQ_IRQ,
610 .flags = IORESOURCE_IRQ,
613 static struct platform_device omap_hdq_dev = {
617 .platform_data = NULL,
619 .num_resources = ARRAY_SIZE(omap_hdq_resources),
620 .resource = omap_hdq_resources,
622 static inline void omap_hdq_init(void)
624 (void) platform_device_register(&omap_hdq_dev);
627 static inline void omap_hdq_init(void) {}
630 /*-------------------------------------------------------------------------*/
632 static int __init omap2_init_devices(void)
634 /* please keep these calls, and their implementations above,
635 * in alphabetical order so they're easier to sort through.
643 omap_init_sha1_md5();
647 arch_initcall(omap2_init_devices);