2 * linux/arch/arm/mach-pxa/pxa25x.c
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
8 * Code specific to PXA21x/25x/26x variants.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/suspend.h>
24 #include <linux/sysdev.h>
26 #include <mach/hardware.h>
27 #include <mach/irqs.h>
28 #include <mach/pxa-regs.h>
29 #include <mach/pxa2xx-regs.h>
30 #include <mach/mfp-pxa25x.h>
31 #include <mach/reset.h>
39 int cpu_is_pxa26x(void)
41 return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0);
43 EXPORT_SYMBOL_GPL(cpu_is_pxa26x);
46 * Various clock factors driven by the CCCR register.
49 /* Crystal Frequency to Memory Frequency Multiplier (L) */
50 static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
52 /* Memory Frequency to Run Mode Frequency Multiplier (M) */
53 static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
55 /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
56 /* Note: we store the value N * 2 here. */
57 static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
60 #define BASE_CLK 3686400
63 * Get the clock frequency as reflected by CCCR and the turbo flag.
64 * We assume these values have been applied via a fcs.
65 * If info is not 0 we also display the current settings.
67 unsigned int pxa25x_get_clk_frequency_khz(int info)
69 unsigned long cccr, turbo;
70 unsigned int l, L, m, M, n2, N;
73 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );
75 l = L_clk_mult[(cccr >> 0) & 0x1f];
76 m = M_clk_mult[(cccr >> 5) & 0x03];
77 n2 = N2_clk_mult[(cccr >> 7) & 0x07];
86 printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
87 L / 1000000, (L % 1000000) / 10000, l );
89 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
90 M / 1000000, (M % 1000000) / 10000, m );
92 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
93 N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
94 (turbo & 1) ? "" : "in" );
97 return (turbo & 1) ? (N/1000) : (M/1000);
101 * Return the current memory clock frequency in units of 10kHz
103 unsigned int pxa25x_get_memclk_frequency_10khz(void)
105 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
108 static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
110 return pxa25x_get_memclk_frequency_10khz() * 10000;
113 static const struct clkops clk_pxa25x_lcd_ops = {
114 .enable = clk_cken_enable,
115 .disable = clk_cken_disable,
116 .getrate = clk_pxa25x_lcd_getrate,
119 static unsigned long gpio12_config_32k[] = {
123 static unsigned long gpio12_config_gpio[] = {
127 static void clk_gpio12_enable(struct clk *clk)
129 pxa2xx_mfp_config(gpio12_config_32k, 1);
132 static void clk_gpio12_disable(struct clk *clk)
134 pxa2xx_mfp_config(gpio12_config_gpio, 1);
137 static const struct clkops clk_pxa25x_gpio12_ops = {
138 .enable = clk_gpio12_enable,
139 .disable = clk_gpio12_disable,
142 static unsigned long gpio11_config_3m6[] = {
146 static unsigned long gpio11_config_gpio[] = {
150 static void clk_gpio11_enable(struct clk *clk)
152 pxa2xx_mfp_config(gpio11_config_3m6, 1);
155 static void clk_gpio11_disable(struct clk *clk)
157 pxa2xx_mfp_config(gpio11_config_gpio, 1);
160 static const struct clkops clk_pxa25x_gpio11_ops = {
161 .enable = clk_gpio11_enable,
162 .disable = clk_gpio11_disable,
166 * 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
167 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
168 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
170 static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
172 static struct clk_lookup pxa25x_hwuart_clkreg =
173 INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
176 * PXA 2xx clock declarations.
178 static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
179 static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
180 static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
181 static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
182 static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
183 static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
184 static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
185 static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0);
186 static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
187 static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
188 static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
189 static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
190 static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
191 static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
192 static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
193 static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
194 static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
196 static struct clk_lookup pxa25x_clkregs[] = {
197 INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
198 INIT_CLKREG(&clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),
199 INIT_CLKREG(&clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),
200 INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),
201 INIT_CLKREG(&clk_pxa25x_usb, "pxa25x-udc", NULL),
202 INIT_CLKREG(&clk_pxa25x_mmc, "pxa2xx-mci.0", NULL),
203 INIT_CLKREG(&clk_pxa25x_i2c, "pxa2xx-i2c.0", NULL),
204 INIT_CLKREG(&clk_pxa25x_ssp, "pxa25x-ssp.0", NULL),
205 INIT_CLKREG(&clk_pxa25x_nssp, "pxa25x-nssp.1", NULL),
206 INIT_CLKREG(&clk_pxa25x_assp, "pxa25x-nssp.2", NULL),
207 INIT_CLKREG(&clk_pxa25x_pwm0, "pxa25x-pwm.0", NULL),
208 INIT_CLKREG(&clk_pxa25x_pwm1, "pxa25x-pwm.1", NULL),
209 INIT_CLKREG(&clk_pxa25x_i2s, "pxa2xx-i2s", NULL),
210 INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-ir", "UARTCLK"),
211 INIT_CLKREG(&clk_pxa25x_ficp, "pxa2xx-ir", "FICPCLK"),
212 INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
213 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
214 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
219 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
220 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
223 * List of global PXA peripheral registers to preserve.
224 * More ones like CP and general purpose register values are preserved
225 * with the stack pointer in sleep.S.
234 static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
240 static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
246 static void pxa25x_cpu_pm_enter(suspend_state_t state)
248 /* Clear reset status */
249 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
253 pxa25x_cpu_suspend(PWRMODE_SLEEP);
258 static int pxa25x_cpu_pm_prepare(void)
260 /* set resume return address */
261 PSPR = virt_to_phys(pxa_cpu_resume);
265 static void pxa25x_cpu_pm_finish(void)
267 /* ensure not to come back here if it wasn't intended */
271 static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
272 .save_count = SLEEP_SAVE_COUNT,
273 .valid = suspend_valid_only_mem,
274 .save = pxa25x_cpu_pm_save,
275 .restore = pxa25x_cpu_pm_restore,
276 .enter = pxa25x_cpu_pm_enter,
277 .prepare = pxa25x_cpu_pm_prepare,
278 .finish = pxa25x_cpu_pm_finish,
281 static void __init pxa25x_init_pm(void)
283 pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
286 static inline void pxa25x_init_pm(void) {}
289 /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
292 static int pxa25x_set_wake(unsigned int irq, unsigned int on)
294 int gpio = IRQ_TO_GPIO(irq);
297 if (gpio >= 0 && gpio < 85)
298 return gpio_set_wake(gpio, on);
300 if (irq == IRQ_RTCAlrm) {
316 void __init pxa25x_init_irq(void)
318 pxa_init_irq(32, pxa25x_set_wake);
319 pxa_init_gpio(85, pxa25x_set_wake);
322 static struct platform_device *pxa25x_devices[] __initdata = {
336 static struct sys_device pxa25x_sysdev[] = {
338 .cls = &pxa_irq_sysclass,
340 .cls = &pxa2xx_mfp_sysclass,
342 .cls = &pxa_gpio_sysclass,
346 static int __init pxa25x_init(void)
350 if (cpu_is_pxa25x()) {
354 clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));
356 if ((ret = pxa_init_dma(16)))
361 for (i = 0; i < ARRAY_SIZE(pxa25x_sysdev); i++) {
362 ret = sysdev_register(&pxa25x_sysdev[i]);
364 pr_err("failed to register sysdev[%d]\n", i);
367 ret = platform_add_devices(pxa25x_devices,
368 ARRAY_SIZE(pxa25x_devices));
373 /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
374 if (cpu_is_pxa255() || cpu_is_pxa26x()) {
375 clks_register(&pxa25x_hwuart_clkreg, 1);
376 ret = platform_device_register(&pxa_device_hwuart);
382 postcore_initcall(pxa25x_init);