1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
3 * Copyright (C) 2006 by OpenMoko, Inc.
4 * Author: Harald Welte <laforge@openmoko.org>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/interrupt.h>
27 #include <linux/list.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/sysdev.h>
31 #include <linux/platform_device.h>
32 #include <linux/serial_core.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/spi_bitbang.h>
36 #include <linux/mtd/mtd.h>
37 #include <linux/mtd/nand.h>
38 #include <linux/mtd/nand_ecc.h>
39 #include <linux/mtd/partitions.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/irq.h>
45 #include <asm/hardware.h>
48 #include <asm/mach-types.h>
50 #include <asm/arch/regs-gpio.h>
51 #include <asm/arch/leds-gpio.h>
52 #include <asm/plat-s3c/regs-serial.h>
53 #include <asm/arch/fb.h>
54 #include <asm/plat-s3c/nand.h>
55 #include <asm/plat-s3c24xx/udc.h>
56 #include <asm/arch/spi.h>
57 #include <asm/arch/spi-gpio.h>
59 #include <asm/plat-s3c24xx/common-smdk.h>
60 #include <asm/plat-s3c24xx/devs.h>
61 #include <asm/plat-s3c24xx/cpu.h>
62 #include <asm/plat-s3c24xx/pm.h>
64 static struct map_desc qt2410_iodesc[] __initdata = {
65 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
68 #define UCON S3C2410_UCON_DEFAULT
69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
72 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
98 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
100 /* Configuration for 640x480 SHARP LQ080V3DG01 */
101 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
102 S3C2410_LCDCON1_TFT |
103 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
105 .lcdcon2 = S3C2410_LCDCON2_VBPD(18) | /* 19 */
106 S3C2410_LCDCON2_LINEVAL(479) |
107 S3C2410_LCDCON2_VFPD(10) | /* 11 */
108 S3C2410_LCDCON2_VSPW(14), /* 15 */
110 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
111 S3C2410_LCDCON4_HSPW(95), /* 96 */
113 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
114 S3C2410_LCDCON5_INVVLINE |
115 S3C2410_LCDCON5_INVVFRAME |
116 S3C2410_LCDCON5_PWREN |
117 S3C2410_LCDCON5_HWSWP,
119 .type = S3C2410_LCDCON1_TFT,
134 /* Configuration for 480x640 toppoly TD028TTEC1 */
135 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
136 S3C2410_LCDCON1_TFT |
137 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
139 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) | /* 2 */
140 S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
141 S3C2410_LCDCON2_VFPD(3) | /* 4 */
142 S3C2410_LCDCON2_VSPW(1), /* 2 */
144 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
145 S3C2410_LCDCON4_HSPW(7), /* 8 */
147 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
148 S3C2410_LCDCON5_INVVLINE |
149 S3C2410_LCDCON5_INVVFRAME |
150 S3C2410_LCDCON5_PWREN |
151 S3C2410_LCDCON5_HWSWP,
153 .type = S3C2410_LCDCON1_TFT,
167 /* Config for 240x320 LCD */
168 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
169 S3C2410_LCDCON1_TFT |
170 S3C2410_LCDCON1_CLKVAL(0x04),
172 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
173 S3C2410_LCDCON2_LINEVAL(319) |
174 S3C2410_LCDCON2_VFPD(6) |
175 S3C2410_LCDCON2_VSPW(3),
177 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
178 S3C2410_LCDCON4_HSPW(3),
180 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
181 S3C2410_LCDCON5_INVVLINE |
182 S3C2410_LCDCON5_INVVFRAME |
183 S3C2410_LCDCON5_PWREN |
184 S3C2410_LCDCON5_HWSWP,
186 .type = S3C2410_LCDCON1_TFT,
202 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
203 .displays = qt2410_lcd_cfg,
204 .num_displays = ARRAY_SIZE(qt2410_lcd_cfg),
205 .default_display = 0,
207 .lpcsel = ((0xCE6) & ~7) | 1<<4,
212 static struct resource qt2410_cs89x0_resources[] = {
215 .end = 0x19000000 + 16,
216 .flags = IORESOURCE_MEM,
221 .flags = IORESOURCE_IRQ,
225 static struct platform_device qt2410_cs89x0 = {
226 .name = "cirrus-cs89x0",
227 .num_resources = ARRAY_SIZE(qt2410_cs89x0_resources),
228 .resource = qt2410_cs89x0_resources,
233 static struct s3c24xx_led_platdata qt2410_pdata_led = {
234 .gpio = S3C2410_GPB0,
235 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
237 .def_trigger = "timer",
240 static struct platform_device qt2410_led = {
241 .name = "s3c24xx_led",
244 .platform_data = &qt2410_pdata_led,
250 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
253 case BITBANG_CS_ACTIVE:
254 s3c2410_gpio_setpin(S3C2410_GPB5, 0);
256 case BITBANG_CS_INACTIVE:
257 s3c2410_gpio_setpin(S3C2410_GPB5, 1);
262 static struct s3c2410_spigpio_info spi_gpio_cfg = {
263 .pin_clk = S3C2410_GPG7,
264 .pin_mosi = S3C2410_GPG6,
265 .pin_miso = S3C2410_GPG5,
266 .chip_select = &spi_gpio_cs,
270 static struct platform_device qt2410_spi = {
271 .name = "s3c24xx-spi-gpio",
274 .platform_data = &spi_gpio_cfg,
280 static struct platform_device *qt2410_devices[] __initdata = {
287 &s3c_device_usbgadget,
293 static struct mtd_partition qt2410_nand_part[] = {
300 .name = "U-Boot environment",
321 static struct s3c2410_nand_set qt2410_nand_sets[] = {
325 .nr_partitions = ARRAY_SIZE(qt2410_nand_part),
326 .partitions = qt2410_nand_part,
330 /* choose a set of timings which should suit most 512Mbit
334 static struct s3c2410_platform_nand qt2410_nand_info = {
338 .nr_sets = ARRAY_SIZE(qt2410_nand_sets),
339 .sets = qt2410_nand_sets,
344 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
347 static char tft_type = 's';
349 static int __init qt2410_tft_setup(char *str)
355 __setup("tft=", qt2410_tft_setup);
357 static void __init qt2410_map_io(void)
359 s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
360 s3c24xx_init_clocks(12*1000*1000);
361 s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
364 static void __init qt2410_machine_init(void)
366 s3c_device_nand.dev.platform_data = &qt2410_nand_info;
369 case 'p': /* production */
370 qt2410_fb_info.default_display = 1;
373 qt2410_fb_info.default_display = 0;
375 case 's': /* small */
377 qt2410_fb_info.default_display = 2;
380 s3c24xx_fb_set_platdata(&qt2410_fb_info);
382 s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
383 s3c2410_gpio_setpin(S3C2410_GPB0, 1);
385 s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
387 s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
389 platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
393 MACHINE_START(QT2410, "QT2410")
394 .phys_io = S3C2410_PA_UART,
395 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
396 .boot_params = S3C2410_SDRAM_PA + 0x100,
397 .map_io = qt2410_map_io,
398 .init_irq = s3c24xx_init_irq,
399 .init_machine = qt2410_machine_init,
400 .timer = &s3c24xx_timer,