arch/arm/plat-omap/mcbsp.c

   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/wait.h>
  20 #include <linux/completion.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/err.h>
  23 #include <linux/clk.h>
  24 #include <linux/delay.h>
  25 #include <linux/io.h>
  26
  27 #include <mach/dma.h>
  28 #include <mach/mcbsp.h>
  29
  30 struct omap_mcbsp **mcbsp_ptr;
  31 int omap_mcbsp_count;
  32
  33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
  34 {
  35         if (cpu_class_is_omap1() || cpu_is_omap2420())
  36                 __raw_writew((u16)val, io_base + reg);
  37         else
  38                 __raw_writel(val, io_base + reg);
  39 }
  40
  41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
  42 {
  43         if (cpu_class_is_omap1() || cpu_is_omap2420())
  44                 return __raw_readw(io_base + reg);
  45         else
  46                 return __raw_readl(io_base + reg);
  47 }
  48
  49 #define OMAP_MCBSP_READ(base, reg) \
  50                         omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
  51 #define OMAP_MCBSP_WRITE(base, reg, val) \
  52                         omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
  53
  54 #define omap_mcbsp_check_valid_id(id)   (id < omap_mcbsp_count)
  55 #define id_to_mcbsp_ptr(id)             mcbsp_ptr[id];
  56
  57 static void omap_mcbsp_dump_reg(u8 id)
  58 {
  59         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
  60
  61         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
  62         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
  63                         OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
  64         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
  65                         OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
  66         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
  67                         OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
  68         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
  69                         OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
  70         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
  71                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
  72         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
  73                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
  74         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
  75                         OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
  76         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
  77                         OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
  78         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
  79                         OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
  80         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
  81                         OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
  82         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
  83                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
  84         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
  85                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
  86         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
  87                         OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
  88         dev_dbg(mcbsp->dev, "***********************\n");
  89 }
  90
  91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
  92 {
  93         struct omap_mcbsp *mcbsp_tx = dev_id;
  94
  95         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
  96                 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
  97
  98         complete(&mcbsp_tx->tx_irq_completion);
  99
 100         return IRQ_HANDLED;
 101 }
 102
 103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 104 {
 105         struct omap_mcbsp *mcbsp_rx = dev_id;
 106
 107         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
 108                 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
 109
 110         complete(&mcbsp_rx->rx_irq_completion);
 111
 112         return IRQ_HANDLED;
 113 }
 114
 115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 116 {
 117         struct omap_mcbsp *mcbsp_dma_tx = data;
 118
 119         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
 120                 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
 121
 122         /* We can free the channels */
 123         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
 124         mcbsp_dma_tx->dma_tx_lch = -1;
 125
 126         complete(&mcbsp_dma_tx->tx_dma_completion);
 127 }
 128
 129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
 130 {
 131         struct omap_mcbsp *mcbsp_dma_rx = data;
 132
 133         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
 134                 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
 135
 136         /* We can free the channels */
 137         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
 138         mcbsp_dma_rx->dma_rx_lch = -1;
 139
 140         complete(&mcbsp_dma_rx->rx_dma_completion);
 141 }
 142
 143 /*
 144  * omap_mcbsp_config simply write a config to the
 145  * appropriate McBSP.
 146  * You either call this function or set the McBSP registers
 147  * by yourself before calling omap_mcbsp_start().
 148  */
 149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 150 {
 151         struct omap_mcbsp *mcbsp;
 152         void __iomem *io_base;
 153
 154         if (!omap_mcbsp_check_valid_id(id)) {
 155                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 156                 return;
 157         }
 158         mcbsp = id_to_mcbsp_ptr(id);
 159
 160         io_base = mcbsp->io_base;
 161         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
 162                         mcbsp->id, mcbsp->phys_base);
 163
 164         /* We write the given config */
 165         OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
 166         OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
 167         OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
 168         OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
 169         OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
 170         OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
 171         OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
 172         OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
 173         OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
 174         OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
 175         OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
 176         if (cpu_is_omap2430() || cpu_is_omap34xx()) {
 177                 OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
 178                 OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
 179         }
 180 }
 181 EXPORT_SYMBOL(omap_mcbsp_config);
 182
 183 /*
 184  * We can choose between IRQ based or polled IO.
 185  * This needs to be called before omap_mcbsp_request().
 186  */
 187 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
 188 {
 189         struct omap_mcbsp *mcbsp;
 190
 191         if (!omap_mcbsp_check_valid_id(id)) {
 192                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 193                 return -ENODEV;
 194         }
 195         mcbsp = id_to_mcbsp_ptr(id);
 196
 197         spin_lock(&mcbsp->lock);
 198
 199         if (!mcbsp->free) {
 200                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 201                         mcbsp->id);
 202                 spin_unlock(&mcbsp->lock);
 203                 return -EINVAL;
 204         }
 205
 206         mcbsp->io_type = io_type;
 207
 208         spin_unlock(&mcbsp->lock);
 209
 210         return 0;
 211 }
 212 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
 213
 214 int omap_mcbsp_request(unsigned int id)
 215 {
 216         struct omap_mcbsp *mcbsp;
 217         int i;
 218         int err;
 219         u16 syscon;
 220
 221         if (!omap_mcbsp_check_valid_id(id)) {
 222                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 223                 return -ENODEV;
 224         }
 225         mcbsp = id_to_mcbsp_ptr(id);
 226
 227         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 228                 mcbsp->pdata->ops->request(id);
 229
 230         for (i = 0; i < mcbsp->num_clks; i++)
 231                 clk_enable(mcbsp->clks[i]);
 232
 233         spin_lock(&mcbsp->lock);
 234         if (!mcbsp->free) {
 235                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 236                         mcbsp->id);
 237                 spin_unlock(&mcbsp->lock);
 238                 return -1;
 239         }
 240
 241         mcbsp->free = 0;
 242         spin_unlock(&mcbsp->lock);
 243
 244         /*
 245          * Enable wakup behavior, smart idle and all wakeups
 246          * REVISIT: some wakeups may be unnecessary
 247          */
 248         if (cpu_is_omap34xx()) {
 249                 syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
 250                 syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03));
 251                 syscon |= (ENAWAKEUP | SIDLEMODE(0x02));
 252                 OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon);
 253
 254                 OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, WAKEUPEN_ALL);
 255         }
 256
 257         /*
 258          * Make sure that transmitter, receiver and sample-rate generator are
 259          * not running before activating IRQs.
 260          */
 261         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
 262         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
 263
 264         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 265                 /* We need to get IRQs here */
 266                 init_completion(&mcbsp->tx_irq_completion);
 267                 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
 268                                         0, "McBSP", (void *)mcbsp);
 269                 if (err != 0) {
 270                         dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
 271                                         "for McBSP%d\n", mcbsp->tx_irq,
 272                                         mcbsp->id);
 273                         return err;
 274                 }
 275
 276                 init_completion(&mcbsp->rx_irq_completion);
 277                 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
 278                                         0, "McBSP", (void *)mcbsp);
 279                 if (err != 0) {
 280                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
 281                                         "for McBSP%d\n", mcbsp->rx_irq,
 282                                         mcbsp->id);
 283                         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 284                         return err;
 285                 }
 286         }
 287
 288         return 0;
 289 }
 290 EXPORT_SYMBOL(omap_mcbsp_request);
 291
 292 void omap_mcbsp_free(unsigned int id)
 293 {
 294         struct omap_mcbsp *mcbsp;
 295         u16 syscon, wakeupen;
 296         int i;
 297
 298         if (!omap_mcbsp_check_valid_id(id)) {
 299                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 300                 return;
 301         }
 302         mcbsp = id_to_mcbsp_ptr(id);
 303
 304         /*
 305          * Disable wakup behavior, smart idle and all wakeups
 306          */
 307         if (cpu_is_omap34xx()) {
 308                 syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
 309                 syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03));
 310                 OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon);
 311
 312                 wakeupen = OMAP_MCBSP_READ(mcbsp->io_base, WAKEUPEN);
 313                 wakeupen &= ~WAKEUPEN_ALL;
 314                 OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, wakeupen);
 315         }
 316
 317         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 318                 mcbsp->pdata->ops->free(id);
 319
 320         for (i = mcbsp->num_clks - 1; i >= 0; i--)
 321                 clk_disable(mcbsp->clks[i]);
 322
 323         spin_lock(&mcbsp->lock);
 324         if (mcbsp->free) {
 325                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
 326                         mcbsp->id);
 327                 spin_unlock(&mcbsp->lock);
 328                 return;
 329         }
 330
 331         mcbsp->free = 1;
 332         spin_unlock(&mcbsp->lock);
 333
 334         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 335                 /* Free IRQs */
 336                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
 337                 free_irq(mcbsp->tx_irq, (void *)mcbsp);
 338         }
 339 }
 340 EXPORT_SYMBOL(omap_mcbsp_free);
 341
 342 /*
 343  * Here we start the McBSP, by enabling the sample
 344  * generator, both transmitter and receivers,
 345  * and the frame sync.
 346  */
 347 void omap_mcbsp_start(unsigned int id)
 348 {
 349         struct omap_mcbsp *mcbsp;
 350         void __iomem *io_base;
 351         u16 w;
 352
 353         if (!omap_mcbsp_check_valid_id(id)) {
 354                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 355                 return;
 356         }
 357         mcbsp = id_to_mcbsp_ptr(id);
 358         io_base = mcbsp->io_base;
 359
 360         mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
 361         mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
 362
 363         /* Start the sample generator */
 364         w = OMAP_MCBSP_READ(io_base, SPCR2);
 365         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
 366
 367         /* Enable transmitter and receiver */
 368         w = OMAP_MCBSP_READ(io_base, SPCR2);
 369         OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
 370
 371         w = OMAP_MCBSP_READ(io_base, SPCR1);
 372         OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
 373
 374         udelay(100);
 375
 376         /* Start frame sync */
 377         w = OMAP_MCBSP_READ(io_base, SPCR2);
 378         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
 379
 380         /* Dump McBSP Regs */
 381         omap_mcbsp_dump_reg(id);
 382 }
 383 EXPORT_SYMBOL(omap_mcbsp_start);
 384
 385 void omap_mcbsp_stop(unsigned int id)
 386 {
 387         struct omap_mcbsp *mcbsp;
 388         void __iomem *io_base;
 389         u16 w;
 390
 391         if (!omap_mcbsp_check_valid_id(id)) {
 392                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 393                 return;
 394         }
 395
 396         mcbsp = id_to_mcbsp_ptr(id);
 397         io_base = mcbsp->io_base;
 398
 399         /* Reset transmitter */
 400         w = OMAP_MCBSP_READ(io_base, SPCR2);
 401         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
 402
 403         /* Reset receiver */
 404         w = OMAP_MCBSP_READ(io_base, SPCR1);
 405         OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
 406
 407         /* Reset the sample rate generator */
 408         w = OMAP_MCBSP_READ(io_base, SPCR2);
 409         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
 410 }
 411 EXPORT_SYMBOL(omap_mcbsp_stop);
 412
 413 /* polled mcbsp i/o operations */
 414 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
 415 {
 416         struct omap_mcbsp *mcbsp;
 417         void __iomem *base;
 418
 419         if (!omap_mcbsp_check_valid_id(id)) {
 420                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 421                 return -ENODEV;
 422         }
 423
 424         mcbsp = id_to_mcbsp_ptr(id);
 425         base = mcbsp->io_base;
 426
 427         writew(buf, base + OMAP_MCBSP_REG_DXR1);
 428         /* if frame sync error - clear the error */
 429         if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
 430                 /* clear error */
 431                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
 432                        base + OMAP_MCBSP_REG_SPCR2);
 433                 /* resend */
 434                 return -1;
 435         } else {
 436                 /* wait for transmit confirmation */
 437                 int attemps = 0;
 438                 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
 439                         if (attemps++ > 1000) {
 440                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
 441                                        (~XRST),
 442                                        base + OMAP_MCBSP_REG_SPCR2);
 443                                 udelay(10);
 444                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
 445                                        (XRST),
 446                                        base + OMAP_MCBSP_REG_SPCR2);
 447                                 udelay(10);
 448                                 dev_err(mcbsp->dev, "Could not write to"
 449                                         " McBSP%d Register\n", mcbsp->id);
 450                                 return -2;
 451                         }
 452                 }
 453         }
 454
 455         return 0;
 456 }
 457 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
 458
 459 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
 460 {
 461         struct omap_mcbsp *mcbsp;
 462         void __iomem *base;
 463
 464         if (!omap_mcbsp_check_valid_id(id)) {
 465                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 466                 return -ENODEV;
 467         }
 468         mcbsp = id_to_mcbsp_ptr(id);
 469
 470         base = mcbsp->io_base;
 471         /* if frame sync error - clear the error */
 472         if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
 473                 /* clear error */
 474                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
 475                        base + OMAP_MCBSP_REG_SPCR1);
 476                 /* resend */
 477                 return -1;
 478         } else {
 479                 /* wait for recieve confirmation */
 480                 int attemps = 0;
 481                 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
 482                         if (attemps++ > 1000) {
 483                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
 484                                        (~RRST),
 485                                        base + OMAP_MCBSP_REG_SPCR1);
 486                                 udelay(10);
 487                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
 488                                        (RRST),
 489                                        base + OMAP_MCBSP_REG_SPCR1);
 490                                 udelay(10);
 491                                 dev_err(mcbsp->dev, "Could not read from"
 492                                         " McBSP%d Register\n", mcbsp->id);
 493                                 return -2;
 494                         }
 495                 }
 496         }
 497         *buf = readw(base + OMAP_MCBSP_REG_DRR1);
 498
 499         return 0;
 500 }
 501 EXPORT_SYMBOL(omap_mcbsp_pollread);
 502
 503 /*
 504  * IRQ based word transmission.
 505  */
 506 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
 507 {
 508         struct omap_mcbsp *mcbsp;
 509         void __iomem *io_base;
 510         omap_mcbsp_word_length word_length;
 511
 512         if (!omap_mcbsp_check_valid_id(id)) {
 513                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 514                 return;
 515         }
 516
 517         mcbsp = id_to_mcbsp_ptr(id);
 518         io_base = mcbsp->io_base;
 519         word_length = mcbsp->tx_word_length;
 520
 521         wait_for_completion(&mcbsp->tx_irq_completion);
 522
 523         if (word_length > OMAP_MCBSP_WORD_16)
 524                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 525         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 526 }
 527 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
 528
 529 u32 omap_mcbsp_recv_word(unsigned int id)
 530 {
 531         struct omap_mcbsp *mcbsp;
 532         void __iomem *io_base;
 533         u16 word_lsb, word_msb = 0;
 534         omap_mcbsp_word_length word_length;
 535
 536         if (!omap_mcbsp_check_valid_id(id)) {
 537                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 538                 return -ENODEV;
 539         }
 540         mcbsp = id_to_mcbsp_ptr(id);
 541
 542         word_length = mcbsp->rx_word_length;
 543         io_base = mcbsp->io_base;
 544
 545         wait_for_completion(&mcbsp->rx_irq_completion);
 546
 547         if (word_length > OMAP_MCBSP_WORD_16)
 548                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 549         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 550
 551         return (word_lsb | (word_msb << 16));
 552 }
 553 EXPORT_SYMBOL(omap_mcbsp_recv_word);
 554
 555 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
 556 {
 557         struct omap_mcbsp *mcbsp;
 558         void __iomem *io_base;
 559         omap_mcbsp_word_length tx_word_length;
 560         omap_mcbsp_word_length rx_word_length;
 561         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 562
 563         if (!omap_mcbsp_check_valid_id(id)) {
 564                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 565                 return -ENODEV;
 566         }
 567         mcbsp = id_to_mcbsp_ptr(id);
 568         io_base = mcbsp->io_base;
 569         tx_word_length = mcbsp->tx_word_length;
 570         rx_word_length = mcbsp->rx_word_length;
 571
 572         if (tx_word_length != rx_word_length)
 573                 return -EINVAL;
 574
 575         /* First we wait for the transmitter to be ready */
 576         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 577         while (!(spcr2 & XRDY)) {
 578                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 579                 if (attempts++ > 1000) {
 580                         /* We must reset the transmitter */
 581                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 582                         udelay(10);
 583                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 584                         udelay(10);
 585                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 586                                 "ready\n", mcbsp->id);
 587                         return -EAGAIN;
 588                 }
 589         }
 590
 591         /* Now we can push the data */
 592         if (tx_word_length > OMAP_MCBSP_WORD_16)
 593                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 594         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 595
 596         /* We wait for the receiver to be ready */
 597         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 598         while (!(spcr1 & RRDY)) {
 599                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 600                 if (attempts++ > 1000) {
 601                         /* We must reset the receiver */
 602                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 603                         udelay(10);
 604                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 605                         udelay(10);
 606                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 607                                 "ready\n", mcbsp->id);
 608                         return -EAGAIN;
 609                 }
 610         }
 611
 612         /* Receiver is ready, let's read the dummy data */
 613         if (rx_word_length > OMAP_MCBSP_WORD_16)
 614                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 615         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 616
 617         return 0;
 618 }
 619 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
 620
 621 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
 622 {
 623         struct omap_mcbsp *mcbsp;
 624         u32 clock_word = 0;
 625         void __iomem *io_base;
 626         omap_mcbsp_word_length tx_word_length;
 627         omap_mcbsp_word_length rx_word_length;
 628         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 629
 630         if (!omap_mcbsp_check_valid_id(id)) {
 631                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 632                 return -ENODEV;
 633         }
 634
 635         mcbsp = id_to_mcbsp_ptr(id);
 636         io_base = mcbsp->io_base;
 637
 638         tx_word_length = mcbsp->tx_word_length;
 639         rx_word_length = mcbsp->rx_word_length;
 640
 641         if (tx_word_length != rx_word_length)
 642                 return -EINVAL;
 643
 644         /* First we wait for the transmitter to be ready */
 645         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 646         while (!(spcr2 & XRDY)) {
 647                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 648                 if (attempts++ > 1000) {
 649                         /* We must reset the transmitter */
 650                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 651                         udelay(10);
 652                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 653                         udelay(10);
 654                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 655                                 "ready\n", mcbsp->id);
 656                         return -EAGAIN;
 657                 }
 658         }
 659
 660         /* We first need to enable the bus clock */
 661         if (tx_word_length > OMAP_MCBSP_WORD_16)
 662                 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
 663         OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
 664
 665         /* We wait for the receiver to be ready */
 666         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 667         while (!(spcr1 & RRDY)) {
 668                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 669                 if (attempts++ > 1000) {
 670                         /* We must reset the receiver */
 671                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 672                         udelay(10);
 673                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 674                         udelay(10);
 675                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 676                                 "ready\n", mcbsp->id);
 677                         return -EAGAIN;
 678                 }
 679         }
 680
 681         /* Receiver is ready, there is something for us */
 682         if (rx_word_length > OMAP_MCBSP_WORD_16)
 683                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 684         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 685
 686         word[0] = (word_lsb | (word_msb << 16));
 687
 688         return 0;
 689 }
 690 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
 691
 692 /*
 693  * Simple DMA based buffer rx/tx routines.
 694  * Nothing fancy, just a single buffer tx/rx through DMA.
 695  * The DMA resources are released once the transfer is done.
 696  * For anything fancier, you should use your own customized DMA
 697  * routines and callbacks.
 698  */
 699 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
 700                                 unsigned int length)
 701 {
 702         struct omap_mcbsp *mcbsp;
 703         int dma_tx_ch;
 704         int src_port = 0;
 705         int dest_port = 0;
 706         int sync_dev = 0;
 707
 708         if (!omap_mcbsp_check_valid_id(id)) {
 709                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 710                 return -ENODEV;
 711         }
 712         mcbsp = id_to_mcbsp_ptr(id);
 713
 714         if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
 715                                 omap_mcbsp_tx_dma_callback,
 716                                 mcbsp,
 717                                 &dma_tx_ch)) {
 718                 dev_err(mcbsp->dev, " Unable to request DMA channel for "
 719                                 "McBSP%d TX. Trying IRQ based TX\n",
 720                                 mcbsp->id);
 721                 return -EAGAIN;
 722         }
 723         mcbsp->dma_tx_lch = dma_tx_ch;
 724
 725         dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
 726                 dma_tx_ch);
 727
 728         init_completion(&mcbsp->tx_dma_completion);
 729
 730         if (cpu_class_is_omap1()) {
 731                 src_port = OMAP_DMA_PORT_TIPB;
 732                 dest_port = OMAP_DMA_PORT_EMIFF;
 733         }
 734         if (cpu_class_is_omap2())
 735                 sync_dev = mcbsp->dma_tx_sync;
 736
 737         omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
 738                                      OMAP_DMA_DATA_TYPE_S16,
 739                                      length >> 1, 1,
 740                                      OMAP_DMA_SYNC_ELEMENT,
 741          sync_dev, 0);
 742
 743         omap_set_dma_dest_params(mcbsp->dma_tx_lch,
 744                                  src_port,
 745                                  OMAP_DMA_AMODE_CONSTANT,
 746                                  mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
 747                                  0, 0);
 748
 749         omap_set_dma_src_params(mcbsp->dma_tx_lch,
 750                                 dest_port,
 751                                 OMAP_DMA_AMODE_POST_INC,
 752                                 buffer,
 753                                 0, 0);
 754
 755         omap_start_dma(mcbsp->dma_tx_lch);
 756         wait_for_completion(&mcbsp->tx_dma_completion);
 757
 758         return 0;
 759 }
 760 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
 761
 762 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
 763                                 unsigned int length)
 764 {
 765         struct omap_mcbsp *mcbsp;
 766         int dma_rx_ch;
 767         int src_port = 0;
 768         int dest_port = 0;
 769         int sync_dev = 0;
 770
 771         if (!omap_mcbsp_check_valid_id(id)) {
 772                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 773                 return -ENODEV;
 774         }
 775         mcbsp = id_to_mcbsp_ptr(id);
 776
 777         if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
 778                                 omap_mcbsp_rx_dma_callback,
 779                                 mcbsp,
 780                                 &dma_rx_ch)) {
 781                 dev_err(mcbsp->dev, "Unable to request DMA channel for "
 782                                 "McBSP%d RX. Trying IRQ based RX\n",
 783                                 mcbsp->id);
 784                 return -EAGAIN;
 785         }
 786         mcbsp->dma_rx_lch = dma_rx_ch;
 787
 788         dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
 789                 dma_rx_ch);
 790
 791         init_completion(&mcbsp->rx_dma_completion);
 792
 793         if (cpu_class_is_omap1()) {
 794                 src_port = OMAP_DMA_PORT_TIPB;
 795                 dest_port = OMAP_DMA_PORT_EMIFF;
 796         }
 797         if (cpu_class_is_omap2())
 798                 sync_dev = mcbsp->dma_rx_sync;
 799
 800         omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
 801                                         OMAP_DMA_DATA_TYPE_S16,
 802                                         length >> 1, 1,
 803                                         OMAP_DMA_SYNC_ELEMENT,
 804                                         sync_dev, 0);
 805
 806         omap_set_dma_src_params(mcbsp->dma_rx_lch,
 807                                 src_port,
 808                                 OMAP_DMA_AMODE_CONSTANT,
 809                                 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
 810                                 0, 0);
 811
 812         omap_set_dma_dest_params(mcbsp->dma_rx_lch,
 813                                         dest_port,
 814                                         OMAP_DMA_AMODE_POST_INC,
 815                                         buffer,
 816                                         0, 0);
 817
 818         omap_start_dma(mcbsp->dma_rx_lch);
 819         wait_for_completion(&mcbsp->rx_dma_completion);
 820
 821         return 0;
 822 }
 823 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
 824
 825 /*
 826  * SPI wrapper.
 827  * Since SPI setup is much simpler than the generic McBSP one,
 828  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
 829  * Once this is done, you can call omap_mcbsp_start().
 830  */
 831 void omap_mcbsp_set_spi_mode(unsigned int id,
 832                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
 833 {
 834         struct omap_mcbsp *mcbsp;
 835         struct omap_mcbsp_reg_cfg mcbsp_cfg;
 836
 837         if (!omap_mcbsp_check_valid_id(id)) {
 838                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 839                 return;
 840         }
 841         mcbsp = id_to_mcbsp_ptr(id);
 842
 843         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
 844
 845         /* SPI has only one frame */
 846         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
 847         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
 848
 849         /* Clock stop mode */
 850         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
 851                 mcbsp_cfg.spcr1 |= (1 << 12);
 852         else
 853                 mcbsp_cfg.spcr1 |= (3 << 11);
 854
 855         /* Set clock parities */
 856         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 857                 mcbsp_cfg.pcr0 |= CLKRP;
 858         else
 859                 mcbsp_cfg.pcr0 &= ~CLKRP;
 860
 861         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 862                 mcbsp_cfg.pcr0 &= ~CLKXP;
 863         else
 864                 mcbsp_cfg.pcr0 |= CLKXP;
 865
 866         /* Set SCLKME to 0 and CLKSM to 1 */
 867         mcbsp_cfg.pcr0 &= ~SCLKME;
 868         mcbsp_cfg.srgr2 |= CLKSM;
 869
 870         /* Set FSXP */
 871         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
 872                 mcbsp_cfg.pcr0 &= ~FSXP;
 873         else
 874                 mcbsp_cfg.pcr0 |= FSXP;
 875
 876         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
 877                 mcbsp_cfg.pcr0 |= CLKXM;
 878                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
 879                 mcbsp_cfg.pcr0 |= FSXM;
 880                 mcbsp_cfg.srgr2 &= ~FSGM;
 881                 mcbsp_cfg.xcr2 |= XDATDLY(1);
 882                 mcbsp_cfg.rcr2 |= RDATDLY(1);
 883         } else {
 884                 mcbsp_cfg.pcr0 &= ~CLKXM;
 885                 mcbsp_cfg.srgr1 |= CLKGDV(1);
 886                 mcbsp_cfg.pcr0 &= ~FSXM;
 887                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
 888                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
 889         }
 890
 891         mcbsp_cfg.xcr2 &= ~XPHASE;
 892         mcbsp_cfg.rcr2 &= ~RPHASE;
 893
 894         omap_mcbsp_config(id, &mcbsp_cfg);
 895 }
 896 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 897
 898 /*
 899  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
 900  * 730 has only 2 McBSP, and both of them are MPU peripherals.
 901  */
 902 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
 903 {
 904         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
 905         struct omap_mcbsp *mcbsp;
 906         int id = pdev->id - 1;
 907         int i;
 908         int ret = 0;
 909
 910         if (!pdata) {
 911                 dev_err(&pdev->dev, "McBSP device initialized without"
 912                                 "platform data\n");
 913                 ret = -EINVAL;
 914                 goto exit;
 915         }
 916
 917         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
 918
 919         if (id >= omap_mcbsp_count) {
 920                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
 921                 ret = -EINVAL;
 922                 goto exit;
 923         }
 924
 925         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
 926         if (!mcbsp) {
 927                 ret = -ENOMEM;
 928                 goto exit;
 929         }
 930         mcbsp_ptr[id] = mcbsp;
 931
 932         spin_lock_init(&mcbsp->lock);
 933         mcbsp->id = id + 1;
 934         mcbsp->free = 1;
 935         mcbsp->dma_tx_lch = -1;
 936         mcbsp->dma_rx_lch = -1;
 937
 938         mcbsp->phys_base = pdata->phys_base;
 939         mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
 940         if (!mcbsp->io_base) {
 941                 ret = -ENOMEM;
 942                 goto err_ioremap;
 943         }
 944
 945         /* Default I/O is IRQ based */
 946         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
 947         mcbsp->tx_irq = pdata->tx_irq;
 948         mcbsp->rx_irq = pdata->rx_irq;
 949         mcbsp->dma_rx_sync = pdata->dma_rx_sync;
 950         mcbsp->dma_tx_sync = pdata->dma_tx_sync;
 951
 952         if (pdata->num_clks) {
 953                 mcbsp->num_clks = pdata->num_clks;
 954                 mcbsp->clks = kzalloc(mcbsp->num_clks * sizeof(struct clk *),
 955                                         GFP_KERNEL);
 956                 if (!mcbsp->clks) {
 957                         ret = -ENOMEM;
 958                         goto exit;
 959                 }
 960                 for (i = 0; i < mcbsp->num_clks; i++) {
 961                         mcbsp->clks[i] = clk_get(&pdev->dev, pdata->clk_names[i]);
 962                         if (IS_ERR(mcbsp->clks[i])) {
 963                                 dev_err(&pdev->dev,
 964                                         "Invalid %s configuration for McBSP%d.\n",
 965                                         pdata->clk_names[i], mcbsp->id);
 966                                 ret = PTR_ERR(mcbsp->clks[i]);
 967                                 goto err_clk;
 968                         }
 969                 }
 970
 971         }
 972
 973         mcbsp->pdata = pdata;
 974         mcbsp->dev = &pdev->dev;
 975         platform_set_drvdata(pdev, mcbsp);
 976         return 0;
 977
 978 err_clk:
 979         while (i--)
 980                 clk_put(mcbsp->clks[i]);
 981         kfree(mcbsp->clks);
 982         iounmap(mcbsp->io_base);
 983 err_ioremap:
 984         mcbsp->free = 0;
 985 exit:
 986         return ret;
 987 }
 988
 989 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
 990 {
 991         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
 992         int i;
 993
 994         platform_set_drvdata(pdev, NULL);
 995         if (mcbsp) {
 996
 997                 if (mcbsp->pdata && mcbsp->pdata->ops &&
 998                                 mcbsp->pdata->ops->free)
 999                         mcbsp->pdata->ops->free(mcbsp->id);
1000
1001                 for (i = mcbsp->num_clks - 1; i >= 0; i--) {
1002                         clk_disable(mcbsp->clks[i]);
1003                         clk_put(mcbsp->clks[i]);
1004                 }
1005
1006                 iounmap(mcbsp->io_base);
1007
1008                 if (mcbsp->num_clks) {
1009                         kfree(mcbsp->clks);
1010                         mcbsp->clks = NULL;
1011                         mcbsp->num_clks = 0;
1012                 }
1013                 mcbsp->free = 0;
1014                 mcbsp->dev = NULL;
1015         }
1016
1017         return 0;
1018 }
1019
1020 static struct platform_driver omap_mcbsp_driver = {
1021         .probe          = omap_mcbsp_probe,
1022         .remove         = __devexit_p(omap_mcbsp_remove),
1023         .driver         = {
1024                 .name   = "omap-mcbsp",
1025         },
1026 };
1027
1028 int __init omap_mcbsp_init(void)
1029 {
1030         /* Register the McBSP driver */
1031         return platform_driver_register(&omap_mcbsp_driver);
1032 }
1033