2 * linux/arch/arm/plat-omap/mcbsp.c
4 * Copyright (C) 2004 Nokia Corporation
5 * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Multichannel mode not supported.
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/platform_device.h>
19 #include <linux/wait.h>
20 #include <linux/completion.h>
21 #include <linux/interrupt.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
24 #include <linux/delay.h>
28 #include <mach/mcbsp.h>
30 struct omap_mcbsp **mcbsp_ptr;
33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
35 if (cpu_class_is_omap1() || cpu_is_omap2420())
36 __raw_writew((u16)val, io_base + reg);
38 __raw_writel(val, io_base + reg);
41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
43 if (cpu_class_is_omap1() || cpu_is_omap2420())
44 return __raw_readw(io_base + reg);
46 return __raw_readl(io_base + reg);
49 #define OMAP_MCBSP_READ(base, reg) \
50 omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
51 #define OMAP_MCBSP_WRITE(base, reg, val) \
52 omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
54 #define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
55 #define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
57 static void omap_mcbsp_dump_reg(u8 id)
59 struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
61 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
62 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n",
63 OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
64 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n",
65 OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
66 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n",
67 OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
68 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n",
69 OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
70 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
71 OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
72 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
73 OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
74 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n",
75 OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
76 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n",
77 OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
78 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n",
79 OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
80 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n",
81 OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
82 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
83 OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
84 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
85 OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
86 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n",
87 OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
88 dev_dbg(mcbsp->dev, "***********************\n");
91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
93 struct omap_mcbsp *mcbsp_tx = dev_id;
95 dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
96 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
98 complete(&mcbsp_tx->tx_irq_completion);
103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
105 struct omap_mcbsp *mcbsp_rx = dev_id;
107 dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
108 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
110 complete(&mcbsp_rx->rx_irq_completion);
115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
117 struct omap_mcbsp *mcbsp_dma_tx = data;
119 dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
120 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
122 /* We can free the channels */
123 omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
124 mcbsp_dma_tx->dma_tx_lch = -1;
126 complete(&mcbsp_dma_tx->tx_dma_completion);
129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
131 struct omap_mcbsp *mcbsp_dma_rx = data;
133 dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
134 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
136 /* We can free the channels */
137 omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
138 mcbsp_dma_rx->dma_rx_lch = -1;
140 complete(&mcbsp_dma_rx->rx_dma_completion);
144 * omap_mcbsp_config simply write a config to the
146 * You either call this function or set the McBSP registers
147 * by yourself before calling omap_mcbsp_start().
149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
151 struct omap_mcbsp *mcbsp;
152 void __iomem *io_base;
154 if (!omap_mcbsp_check_valid_id(id)) {
155 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
158 mcbsp = id_to_mcbsp_ptr(id);
160 io_base = mcbsp->io_base;
161 dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n",
162 mcbsp->id, mcbsp->phys_base);
164 /* We write the given config */
165 OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
166 OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
167 OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
168 OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
169 OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
170 OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
171 OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
172 OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
173 OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
174 OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
175 OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
176 if (cpu_is_omap2430() || cpu_is_omap34xx()) {
177 OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
178 OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
181 EXPORT_SYMBOL(omap_mcbsp_config);
184 * We can choose between IRQ based or polled IO.
185 * This needs to be called before omap_mcbsp_request().
187 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
189 struct omap_mcbsp *mcbsp;
191 if (!omap_mcbsp_check_valid_id(id)) {
192 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
195 mcbsp = id_to_mcbsp_ptr(id);
197 spin_lock(&mcbsp->lock);
200 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
202 spin_unlock(&mcbsp->lock);
206 mcbsp->io_type = io_type;
208 spin_unlock(&mcbsp->lock);
212 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
214 int omap_mcbsp_request(unsigned int id)
216 struct omap_mcbsp *mcbsp;
220 if (!omap_mcbsp_check_valid_id(id)) {
221 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
224 mcbsp = id_to_mcbsp_ptr(id);
226 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
227 mcbsp->pdata->ops->request(id);
229 spin_lock(&mcbsp->lock);
231 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
233 spin_unlock(&mcbsp->lock);
238 spin_unlock(&mcbsp->lock);
240 for (i = 0; i < mcbsp->num_clks; i++)
241 clk_enable(mcbsp->clks[i]);
244 * Enable wakup behavior, smart idle and all wakeups
245 * REVISIT: some wakeups may be unnecessary
247 if (cpu_is_omap34xx()) {
250 w = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
251 w &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
252 w |= (ENAWAKEUP | SIDLEMODE(0x02) | CLOCKACTIVITY(0x02));
253 OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, w);
255 OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, WAKEUPEN_ALL);
259 * Make sure that transmitter, receiver and sample-rate generator are
260 * not running before activating IRQs.
262 OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
263 OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
265 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
266 /* We need to get IRQs here */
267 init_completion(&mcbsp->tx_irq_completion);
268 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
269 0, "McBSP", (void *)mcbsp);
271 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
272 "for McBSP%d\n", mcbsp->tx_irq,
277 init_completion(&mcbsp->rx_irq_completion);
278 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
279 0, "McBSP", (void *)mcbsp);
281 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
282 "for McBSP%d\n", mcbsp->rx_irq,
284 free_irq(mcbsp->tx_irq, (void *)mcbsp);
291 EXPORT_SYMBOL(omap_mcbsp_request);
293 void omap_mcbsp_free(unsigned int id)
295 struct omap_mcbsp *mcbsp;
298 if (!omap_mcbsp_check_valid_id(id)) {
299 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
302 mcbsp = id_to_mcbsp_ptr(id);
305 * Disable wakup behavior, smart idle and all wakeups
307 if (cpu_is_omap34xx()) {
310 w = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
311 w &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
312 OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, w);
314 w = OMAP_MCBSP_READ(mcbsp->io_base, WAKEUPEN);
316 OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, w);
319 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
320 mcbsp->pdata->ops->free(id);
322 spin_lock(&mcbsp->lock);
324 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
326 spin_unlock(&mcbsp->lock);
329 spin_unlock(&mcbsp->lock);
331 for (i = mcbsp->num_clks - 1; i >= 0; i--)
332 clk_disable(mcbsp->clks[i]);
334 spin_lock(&mcbsp->lock);
336 spin_unlock(&mcbsp->lock);
338 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
340 free_irq(mcbsp->rx_irq, (void *)mcbsp);
341 free_irq(mcbsp->tx_irq, (void *)mcbsp);
344 EXPORT_SYMBOL(omap_mcbsp_free);
347 * Here we start the McBSP, by enabling the sample
348 * generator, both transmitter and receivers,
349 * and the frame sync.
351 void omap_mcbsp_start(unsigned int id)
353 struct omap_mcbsp *mcbsp;
354 void __iomem *io_base;
357 if (!omap_mcbsp_check_valid_id(id)) {
358 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
361 mcbsp = id_to_mcbsp_ptr(id);
362 io_base = mcbsp->io_base;
364 mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
365 mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
367 /* Start the sample generator */
368 w = OMAP_MCBSP_READ(io_base, SPCR2);
369 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
371 /* Enable transmitter and receiver */
372 w = OMAP_MCBSP_READ(io_base, SPCR2);
373 OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
375 w = OMAP_MCBSP_READ(io_base, SPCR1);
376 OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
380 /* Start frame sync */
381 w = OMAP_MCBSP_READ(io_base, SPCR2);
382 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
384 /* Dump McBSP Regs */
385 omap_mcbsp_dump_reg(id);
387 EXPORT_SYMBOL(omap_mcbsp_start);
389 void omap_mcbsp_stop(unsigned int id)
391 struct omap_mcbsp *mcbsp;
392 void __iomem *io_base;
395 if (!omap_mcbsp_check_valid_id(id)) {
396 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
400 mcbsp = id_to_mcbsp_ptr(id);
401 io_base = mcbsp->io_base;
403 /* Reset transmitter */
404 w = OMAP_MCBSP_READ(io_base, SPCR2);
405 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
408 w = OMAP_MCBSP_READ(io_base, SPCR1);
409 OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
411 /* Reset the sample rate generator */
412 w = OMAP_MCBSP_READ(io_base, SPCR2);
413 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
415 EXPORT_SYMBOL(omap_mcbsp_stop);
417 /* polled mcbsp i/o operations */
418 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
420 struct omap_mcbsp *mcbsp;
423 if (!omap_mcbsp_check_valid_id(id)) {
424 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
428 mcbsp = id_to_mcbsp_ptr(id);
429 base = mcbsp->io_base;
431 writew(buf, base + OMAP_MCBSP_REG_DXR1);
432 /* if frame sync error - clear the error */
433 if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
435 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
436 base + OMAP_MCBSP_REG_SPCR2);
440 /* wait for transmit confirmation */
442 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
443 if (attemps++ > 1000) {
444 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
446 base + OMAP_MCBSP_REG_SPCR2);
448 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
450 base + OMAP_MCBSP_REG_SPCR2);
452 dev_err(mcbsp->dev, "Could not write to"
453 " McBSP%d Register\n", mcbsp->id);
461 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
463 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
465 struct omap_mcbsp *mcbsp;
468 if (!omap_mcbsp_check_valid_id(id)) {
469 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
472 mcbsp = id_to_mcbsp_ptr(id);
474 base = mcbsp->io_base;
475 /* if frame sync error - clear the error */
476 if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
478 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
479 base + OMAP_MCBSP_REG_SPCR1);
483 /* wait for recieve confirmation */
485 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
486 if (attemps++ > 1000) {
487 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
489 base + OMAP_MCBSP_REG_SPCR1);
491 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
493 base + OMAP_MCBSP_REG_SPCR1);
495 dev_err(mcbsp->dev, "Could not read from"
496 " McBSP%d Register\n", mcbsp->id);
501 *buf = readw(base + OMAP_MCBSP_REG_DRR1);
505 EXPORT_SYMBOL(omap_mcbsp_pollread);
508 * IRQ based word transmission.
510 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
512 struct omap_mcbsp *mcbsp;
513 void __iomem *io_base;
514 omap_mcbsp_word_length word_length;
516 if (!omap_mcbsp_check_valid_id(id)) {
517 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
521 mcbsp = id_to_mcbsp_ptr(id);
522 io_base = mcbsp->io_base;
523 word_length = mcbsp->tx_word_length;
525 wait_for_completion(&mcbsp->tx_irq_completion);
527 if (word_length > OMAP_MCBSP_WORD_16)
528 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
529 OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
531 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
533 u32 omap_mcbsp_recv_word(unsigned int id)
535 struct omap_mcbsp *mcbsp;
536 void __iomem *io_base;
537 u16 word_lsb, word_msb = 0;
538 omap_mcbsp_word_length word_length;
540 if (!omap_mcbsp_check_valid_id(id)) {
541 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
544 mcbsp = id_to_mcbsp_ptr(id);
546 word_length = mcbsp->rx_word_length;
547 io_base = mcbsp->io_base;
549 wait_for_completion(&mcbsp->rx_irq_completion);
551 if (word_length > OMAP_MCBSP_WORD_16)
552 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
553 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
555 return (word_lsb | (word_msb << 16));
557 EXPORT_SYMBOL(omap_mcbsp_recv_word);
559 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
561 struct omap_mcbsp *mcbsp;
562 void __iomem *io_base;
563 omap_mcbsp_word_length tx_word_length;
564 omap_mcbsp_word_length rx_word_length;
565 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
567 if (!omap_mcbsp_check_valid_id(id)) {
568 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
571 mcbsp = id_to_mcbsp_ptr(id);
572 io_base = mcbsp->io_base;
573 tx_word_length = mcbsp->tx_word_length;
574 rx_word_length = mcbsp->rx_word_length;
576 if (tx_word_length != rx_word_length)
579 /* First we wait for the transmitter to be ready */
580 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
581 while (!(spcr2 & XRDY)) {
582 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
583 if (attempts++ > 1000) {
584 /* We must reset the transmitter */
585 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
587 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
589 dev_err(mcbsp->dev, "McBSP%d transmitter not "
590 "ready\n", mcbsp->id);
595 /* Now we can push the data */
596 if (tx_word_length > OMAP_MCBSP_WORD_16)
597 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
598 OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
600 /* We wait for the receiver to be ready */
601 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
602 while (!(spcr1 & RRDY)) {
603 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
604 if (attempts++ > 1000) {
605 /* We must reset the receiver */
606 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
608 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
610 dev_err(mcbsp->dev, "McBSP%d receiver not "
611 "ready\n", mcbsp->id);
616 /* Receiver is ready, let's read the dummy data */
617 if (rx_word_length > OMAP_MCBSP_WORD_16)
618 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
619 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
623 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
625 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
627 struct omap_mcbsp *mcbsp;
629 void __iomem *io_base;
630 omap_mcbsp_word_length tx_word_length;
631 omap_mcbsp_word_length rx_word_length;
632 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
634 if (!omap_mcbsp_check_valid_id(id)) {
635 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
639 mcbsp = id_to_mcbsp_ptr(id);
640 io_base = mcbsp->io_base;
642 tx_word_length = mcbsp->tx_word_length;
643 rx_word_length = mcbsp->rx_word_length;
645 if (tx_word_length != rx_word_length)
648 /* First we wait for the transmitter to be ready */
649 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
650 while (!(spcr2 & XRDY)) {
651 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
652 if (attempts++ > 1000) {
653 /* We must reset the transmitter */
654 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
656 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
658 dev_err(mcbsp->dev, "McBSP%d transmitter not "
659 "ready\n", mcbsp->id);
664 /* We first need to enable the bus clock */
665 if (tx_word_length > OMAP_MCBSP_WORD_16)
666 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
667 OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
669 /* We wait for the receiver to be ready */
670 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
671 while (!(spcr1 & RRDY)) {
672 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
673 if (attempts++ > 1000) {
674 /* We must reset the receiver */
675 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
677 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
679 dev_err(mcbsp->dev, "McBSP%d receiver not "
680 "ready\n", mcbsp->id);
685 /* Receiver is ready, there is something for us */
686 if (rx_word_length > OMAP_MCBSP_WORD_16)
687 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
688 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
690 word[0] = (word_lsb | (word_msb << 16));
694 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
697 * Simple DMA based buffer rx/tx routines.
698 * Nothing fancy, just a single buffer tx/rx through DMA.
699 * The DMA resources are released once the transfer is done.
700 * For anything fancier, you should use your own customized DMA
701 * routines and callbacks.
703 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
706 struct omap_mcbsp *mcbsp;
712 if (!omap_mcbsp_check_valid_id(id)) {
713 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
716 mcbsp = id_to_mcbsp_ptr(id);
718 if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
719 omap_mcbsp_tx_dma_callback,
722 dev_err(mcbsp->dev, " Unable to request DMA channel for "
723 "McBSP%d TX. Trying IRQ based TX\n",
727 mcbsp->dma_tx_lch = dma_tx_ch;
729 dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
732 init_completion(&mcbsp->tx_dma_completion);
734 if (cpu_class_is_omap1()) {
735 src_port = OMAP_DMA_PORT_TIPB;
736 dest_port = OMAP_DMA_PORT_EMIFF;
738 if (cpu_class_is_omap2())
739 sync_dev = mcbsp->dma_tx_sync;
741 omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
742 OMAP_DMA_DATA_TYPE_S16,
744 OMAP_DMA_SYNC_ELEMENT,
747 omap_set_dma_dest_params(mcbsp->dma_tx_lch,
749 OMAP_DMA_AMODE_CONSTANT,
750 mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
753 omap_set_dma_src_params(mcbsp->dma_tx_lch,
755 OMAP_DMA_AMODE_POST_INC,
759 omap_start_dma(mcbsp->dma_tx_lch);
760 wait_for_completion(&mcbsp->tx_dma_completion);
764 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
766 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
769 struct omap_mcbsp *mcbsp;
775 if (!omap_mcbsp_check_valid_id(id)) {
776 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
779 mcbsp = id_to_mcbsp_ptr(id);
781 if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
782 omap_mcbsp_rx_dma_callback,
785 dev_err(mcbsp->dev, "Unable to request DMA channel for "
786 "McBSP%d RX. Trying IRQ based RX\n",
790 mcbsp->dma_rx_lch = dma_rx_ch;
792 dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
795 init_completion(&mcbsp->rx_dma_completion);
797 if (cpu_class_is_omap1()) {
798 src_port = OMAP_DMA_PORT_TIPB;
799 dest_port = OMAP_DMA_PORT_EMIFF;
801 if (cpu_class_is_omap2())
802 sync_dev = mcbsp->dma_rx_sync;
804 omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
805 OMAP_DMA_DATA_TYPE_S16,
807 OMAP_DMA_SYNC_ELEMENT,
810 omap_set_dma_src_params(mcbsp->dma_rx_lch,
812 OMAP_DMA_AMODE_CONSTANT,
813 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
816 omap_set_dma_dest_params(mcbsp->dma_rx_lch,
818 OMAP_DMA_AMODE_POST_INC,
822 omap_start_dma(mcbsp->dma_rx_lch);
823 wait_for_completion(&mcbsp->rx_dma_completion);
827 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
831 * Since SPI setup is much simpler than the generic McBSP one,
832 * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
833 * Once this is done, you can call omap_mcbsp_start().
835 void omap_mcbsp_set_spi_mode(unsigned int id,
836 const struct omap_mcbsp_spi_cfg *spi_cfg)
838 struct omap_mcbsp *mcbsp;
839 struct omap_mcbsp_reg_cfg mcbsp_cfg;
841 if (!omap_mcbsp_check_valid_id(id)) {
842 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
845 mcbsp = id_to_mcbsp_ptr(id);
847 memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
849 /* SPI has only one frame */
850 mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
851 mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
853 /* Clock stop mode */
854 if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
855 mcbsp_cfg.spcr1 |= (1 << 12);
857 mcbsp_cfg.spcr1 |= (3 << 11);
859 /* Set clock parities */
860 if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
861 mcbsp_cfg.pcr0 |= CLKRP;
863 mcbsp_cfg.pcr0 &= ~CLKRP;
865 if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
866 mcbsp_cfg.pcr0 &= ~CLKXP;
868 mcbsp_cfg.pcr0 |= CLKXP;
870 /* Set SCLKME to 0 and CLKSM to 1 */
871 mcbsp_cfg.pcr0 &= ~SCLKME;
872 mcbsp_cfg.srgr2 |= CLKSM;
875 if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
876 mcbsp_cfg.pcr0 &= ~FSXP;
878 mcbsp_cfg.pcr0 |= FSXP;
880 if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
881 mcbsp_cfg.pcr0 |= CLKXM;
882 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
883 mcbsp_cfg.pcr0 |= FSXM;
884 mcbsp_cfg.srgr2 &= ~FSGM;
885 mcbsp_cfg.xcr2 |= XDATDLY(1);
886 mcbsp_cfg.rcr2 |= RDATDLY(1);
888 mcbsp_cfg.pcr0 &= ~CLKXM;
889 mcbsp_cfg.srgr1 |= CLKGDV(1);
890 mcbsp_cfg.pcr0 &= ~FSXM;
891 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
892 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
895 mcbsp_cfg.xcr2 &= ~XPHASE;
896 mcbsp_cfg.rcr2 &= ~RPHASE;
898 omap_mcbsp_config(id, &mcbsp_cfg);
900 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
903 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
904 * 730 has only 2 McBSP, and both of them are MPU peripherals.
906 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
908 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
909 struct omap_mcbsp *mcbsp;
910 int id = pdev->id - 1;
915 dev_err(&pdev->dev, "McBSP device initialized without"
921 dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
923 if (id >= omap_mcbsp_count) {
924 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
929 mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
934 mcbsp_ptr[id] = mcbsp;
936 spin_lock_init(&mcbsp->lock);
939 mcbsp->dma_tx_lch = -1;
940 mcbsp->dma_rx_lch = -1;
942 mcbsp->phys_base = pdata->phys_base;
943 mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
944 if (!mcbsp->io_base) {
949 /* Default I/O is IRQ based */
950 mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
951 mcbsp->tx_irq = pdata->tx_irq;
952 mcbsp->rx_irq = pdata->rx_irq;
953 mcbsp->dma_rx_sync = pdata->dma_rx_sync;
954 mcbsp->dma_tx_sync = pdata->dma_tx_sync;
956 if (pdata->num_clks) {
957 mcbsp->num_clks = pdata->num_clks;
958 mcbsp->clks = kzalloc(mcbsp->num_clks * sizeof(struct clk *),
964 for (i = 0; i < mcbsp->num_clks; i++) {
965 mcbsp->clks[i] = clk_get(&pdev->dev, pdata->clk_names[i]);
966 if (IS_ERR(mcbsp->clks[i])) {
968 "Invalid %s configuration for McBSP%d.\n",
969 pdata->clk_names[i], mcbsp->id);
970 ret = PTR_ERR(mcbsp->clks[i]);
977 mcbsp->pdata = pdata;
978 mcbsp->dev = &pdev->dev;
979 platform_set_drvdata(pdev, mcbsp);
984 clk_put(mcbsp->clks[i]);
986 iounmap(mcbsp->io_base);
993 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
995 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
998 platform_set_drvdata(pdev, NULL);
1001 if (mcbsp->pdata && mcbsp->pdata->ops &&
1002 mcbsp->pdata->ops->free)
1003 mcbsp->pdata->ops->free(mcbsp->id);
1005 for (i = mcbsp->num_clks - 1; i >= 0; i--) {
1006 clk_disable(mcbsp->clks[i]);
1007 clk_put(mcbsp->clks[i]);
1010 iounmap(mcbsp->io_base);
1012 if (mcbsp->num_clks) {
1015 mcbsp->num_clks = 0;
1024 static struct platform_driver omap_mcbsp_driver = {
1025 .probe = omap_mcbsp_probe,
1026 .remove = __devexit_p(omap_mcbsp_remove),
1028 .name = "omap-mcbsp",
1032 int __init omap_mcbsp_init(void)
1034 /* Register the McBSP driver */
1035 return platform_driver_register(&omap_mcbsp_driver);