2 * Low-Level PCI Access for i386 machines.
4 * (c) 1999 Martin Mares <mj@ucw.cz>
10 #define DBG(x...) printk(x)
15 #define PCI_PROBE_BIOS 0x0001
16 #define PCI_PROBE_CONF1 0x0002
17 #define PCI_PROBE_CONF2 0x0004
18 #define PCI_PROBE_MMCONF 0x0008
19 #define PCI_PROBE_MMCONF_FORCE 0x0010
20 #define PCI_PROBE_MASK 0x00ff
22 #define PCI_NO_SORT 0x0100
23 #define PCI_BIOS_SORT 0x0200
24 #define PCI_NO_CHECKS 0x0400
25 #define PCI_USE_PIRQ_MASK 0x0800
26 #define PCI_ASSIGN_ROMS 0x1000
27 #define PCI_BIOS_IRQ_SCAN 0x2000
28 #define PCI_ASSIGN_ALL_BUSSES 0x4000
30 extern unsigned int pci_probe;
31 extern unsigned long pirq_table_addr;
35 extern unsigned int pcibios_max_latency;
37 void pcibios_resource_survey(void);
38 int pcibios_enable_resources(struct pci_dev *, int);
39 void pcibios_disable_resources(struct pci_dev *);
43 extern int pcibios_last_bus;
44 extern struct pci_bus *pci_root_bus;
45 extern struct pci_ops pci_root_ops;
50 u8 bus, devfn; /* Bus, device and function */
52 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
53 u16 bitmap; /* Available IRQs */
54 } __attribute__((packed)) irq[4];
55 u8 slot; /* Slot number, 0=onboard */
57 } __attribute__((packed));
59 struct irq_routing_table {
60 u32 signature; /* PIRQ_SIGNATURE should be here */
61 u16 version; /* PIRQ_VERSION */
62 u16 size; /* Table size in bytes */
63 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
64 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
65 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
66 u32 miniport_data; /* Crap */
68 u8 checksum; /* Modulo 256 checksum must give zero */
69 struct irq_info slots[0];
70 } __attribute__((packed));
72 extern unsigned int pcibios_irq_mask;
74 extern int pcibios_scanned;
75 extern spinlock_t pci_config_lock;
77 extern int (*pcibios_enable_irq)(struct pci_dev *dev);
78 extern void (*pcibios_disable_irq)(struct pci_dev *dev);
80 extern int pci_conf1_write(unsigned int seg, unsigned int bus,
81 unsigned int devfn, int reg, int len, u32 value);
82 extern int pci_conf1_read(unsigned int seg, unsigned int bus,
83 unsigned int devfn, int reg, int len, u32 *value);
85 extern void pci_direct_init(void);
86 extern void pci_pcbios_init(void);
87 extern void pci_mmcfg_init(void);
88 extern void pcibios_sort(void);