1 /*****************************************************************************/
4 * comemlite.c -- PCI access code for embedded CO-MEM Lite PCI controller.
6 * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com).
7 * (C) Copyright 2000, Lineo (www.lineo.com)
10 /*****************************************************************************/
12 #include <linux/config.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/pci.h>
16 #include <linux/ptrace.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/sched.h>
20 #include <asm/coldfire.h>
21 #include <asm/mcfsim.h>
23 #include <asm/anchor.h>
29 /*****************************************************************************/
32 * Debug configuration defines. DEBUGRES sets debugging output for
33 * the resource allocation phase. DEBUGPCI traces on pcibios_ function
34 * calls, and DEBUGIO traces all accesses to devices on the PCI bus.
36 /*#define DEBUGRES 1*/
37 /*#define DEBUGPCI 1*/
40 /*****************************************************************************/
43 * PCI markers for bus present and active slots.
45 int pci_bus_is_present = 0;
46 unsigned long pci_slotmask = 0;
49 * We may or may not need to swap the bytes of PCI bus tranfers.
50 * The endianess is re-roder automatically by the CO-MEM, but it
51 * will get the wrong byte order for a pure data stream.
53 #define pci_byteswap 0
57 * Resource tracking. The CO-MEM part creates a virtual address
58 * space that all the PCI devices live in - it is not in any way
59 * directly mapped into the ColdFire address space. So we can
60 * really assign any resources we like to devices, as long as
61 * they do not clash with other PCI devices.
63 unsigned int pci_iobase = PCIBIOS_MIN_IO; /* Arbitrary start address */
64 unsigned int pci_membase = PCIBIOS_MIN_MEM; /* Arbitrary start address */
66 #define PCI_MINIO 0x100 /* 256 byte minimum I/O */
67 #define PCI_MINMEM 0x00010000 /* 64k minimum chunk */
70 * The CO-MEM's shared memory segment is visible inside the PCI
71 * memory address space. We need to keep track of the address that
72 * this is mapped at, to setup the bus masters pointers.
74 unsigned int pci_shmemaddr;
76 /*****************************************************************************/
78 void pci_interrupt(int irq, void *id, struct pt_regs *fp);
80 /*****************************************************************************/
83 * Some platforms have custom ways of reseting the PCI bus.
86 void pci_resetbus(void)
92 printk(KERN_DEBUG "pci_resetbus()\n");
95 *((volatile unsigned short *) (MCF_MBAR+MCFSIM_PADDR)) |= eLIA_PCIRESET;
96 for (i = 0; (i < 1000); i++) {
97 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) =
98 (ppdata | eLIA_PCIRESET);
102 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) = ppdata;
106 /*****************************************************************************/
108 int pcibios_assign_resource_slot(int slot)
110 volatile unsigned long *rp;
111 volatile unsigned char *ip;
112 unsigned int idsel, addr, val, align, i;
116 printk(KERN_INFO "pcibios_assign_resource_slot(slot=%x)\n", slot);
119 rp = (volatile unsigned long *) COMEM_BASE;
120 idsel = COMEM_DA_ADDR(0x1 << (slot + 16));
122 /* Try to assign resource to each BAR */
123 for (bar = 0; (bar < 6); bar++) {
124 addr = COMEM_PCIBUS + PCI_BASE_ADDRESS_0 + (bar * 4);
125 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
126 val = rp[LREG(addr)];
128 printk(KERN_DEBUG "-----------------------------------"
129 "-------------------------------------\n");
130 printk(KERN_DEBUG "BAR[%d]: read=%08x ", bar, val);
133 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
134 rp[LREG(addr)] = 0xffffffff;
136 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
137 val = rp[LREG(addr)];
139 printk(KERN_DEBUG "write=%08x ", val);
143 printk(KERN_DEBUG "\n");
148 /* Determine space required by BAR */
149 /* FIXME: this should go backwords from 0x80000000... */
150 for (i = 0; (i < 32); i++) {
151 if ((0x1 << i) & (val & 0xfffffffc))
156 printk(KERN_DEBUG "size=%08x(%d)\n", (0x1 << i), i);
160 /* Assign a resource */
161 if (val & PCI_BASE_ADDRESS_SPACE_IO) {
165 printk(KERN_DEBUG "BAR[%d]: IO size=%08x iobase=%08x\n",
170 val = 0 | PCI_BASE_ADDRESS_SPACE_IO;
172 printk(KERN_DEBUG "BAR[%d]: too big for IO??\n", bar);
175 /* Check for un-alignment */
176 if ((align = pci_iobase % i))
177 pci_iobase += (i - align);
178 val = pci_iobase | PCI_BASE_ADDRESS_SPACE_IO;
185 printk(KERN_DEBUG "BAR[%d]: MEMORY size=%08x membase=%08x\n",
186 bar, i, pci_membase);
188 /* Check for un-alignment */
189 if ((align = pci_membase % i))
190 pci_membase += (i - align);
191 val = pci_membase | PCI_BASE_ADDRESS_SPACE_MEMORY;
195 /* Write resource back into BAR register */
196 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
197 rp[LREG(addr)] = val;
199 printk(KERN_DEBUG "BAR[%d]: assigned bar=%08x\n", bar, val);
204 printk(KERN_DEBUG "-----------------------------------"
205 "-------------------------------------\n");
208 /* Assign IRQ if one is wanted... */
209 ip = (volatile unsigned char *) (COMEM_BASE + COMEM_PCIBUS);
210 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
212 addr = (PCI_INTERRUPT_PIN & 0xfc) + (~PCI_INTERRUPT_PIN & 0x03);
214 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
215 addr = (PCI_INTERRUPT_LINE & 0xfc)+(~PCI_INTERRUPT_LINE & 0x03);
218 printk(KERN_DEBUG "IRQ LINE=25\n");
225 /*****************************************************************************/
227 int pcibios_enable_slot(int slot)
229 volatile unsigned long *rp;
230 volatile unsigned short *wp;
231 unsigned int idsel, addr;
235 printk(KERN_DEBUG "pcibios_enbale_slot(slot=%x)\n", slot);
238 rp = (volatile unsigned long *) COMEM_BASE;
239 wp = (volatile unsigned short *) COMEM_BASE;
240 idsel = COMEM_DA_ADDR(0x1 << (slot + 16));
242 /* Get current command settings */
243 addr = COMEM_PCIBUS + PCI_COMMAND;
244 addr = (addr & ~0x3) + (~addr & 0x02);
245 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
246 cmd = wp[WREG(addr)];
247 /*val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);*/
249 /* Enable I/O and memory accesses to this device */
250 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
251 cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
252 wp[WREG(addr)] = cmd;
257 /*****************************************************************************/
259 void pcibios_assign_resources(void)
261 volatile unsigned long *rp;
262 unsigned long sel, id;
265 rp = (volatile unsigned long *) COMEM_BASE;
268 * Do a quick scan of the PCI bus and see what is here.
270 for (slot = COMEM_MINDEV; (slot <= COMEM_MAXDEV); slot++) {
271 sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16));
272 rp[LREG(COMEM_DAHBASE)] = sel;
273 rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */
274 id = rp[LREG(COMEM_PCIBUS)];
275 if ((id != 0) && ((id & 0xffff0000) != (sel & 0xffff0000))) {
276 printk(KERN_INFO "PCI: slot=%d id=%08x\n", slot, (int) id);
277 pci_slotmask |= 0x1 << slot;
278 pcibios_assign_resource_slot(slot);
279 pcibios_enable_slot(slot);
284 /*****************************************************************************/
286 int pcibios_init(void)
288 volatile unsigned long *rp;
289 unsigned long sel, id;
293 printk(KERN_DEBUG "pcibios_init()\n");
299 * Do some sort of basic check to see if the CO-MEM part
300 * is present... This works ok, but I think we really need
301 * something better...
303 rp = (volatile unsigned long *) COMEM_BASE;
304 if ((rp[LREG(COMEM_LBUSCFG)] & 0xff) != 0x50) {
305 printk(KERN_INFO "PCI: no PCI bus present\n");
309 #ifdef COMEM_BRIDGEDEV
311 * Setup the PCI bridge device first. It needs resources too,
312 * so that bus masters can get to its shared memory.
314 slot = COMEM_BRIDGEDEV;
315 sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16));
316 rp[LREG(COMEM_DAHBASE)] = sel;
317 rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */
318 id = rp[LREG(COMEM_PCIBUS)];
319 if ((id == 0) || ((id & 0xffff0000) == (sel & 0xffff0000))) {
320 printk(KERN_INFO "PCI: no PCI bus bridge present\n");
324 printk(KERN_INFO "PCI: bridge device at slot=%d id=%08x\n", slot, (int) id);
325 pci_slotmask |= 0x1 << slot;
326 pci_shmemaddr = pci_membase;
327 pcibios_assign_resource_slot(slot);
328 pcibios_enable_slot(slot);
331 pci_bus_is_present = 1;
333 /* Get PCI irq for local vectoring */
334 if (request_irq(COMEM_IRQ, pci_interrupt, 0, "PCI bridge", NULL)) {
335 printk(KERN_WARNING "PCI: failed to acquire interrupt %d\n", COMEM_IRQ);
337 mcf_autovector(COMEM_IRQ);
340 pcibios_assign_resources();
345 /*****************************************************************************/
347 char *pcibios_setup(char *option)
349 /* Nothing for us to handle. */
352 /*****************************************************************************/
354 void pcibios_fixup_bus(struct pci_bus *b)
358 /*****************************************************************************/
360 void pcibios_align_resource(void *data, struct resource *res,
361 resource_size_t size, resource_size_t align)
365 /*****************************************************************************/
367 int pcibios_enable_device(struct pci_dev *dev, int mask)
371 slot = PCI_SLOT(dev->devfn);
372 if ((dev->bus == 0) && (pci_slotmask & (1 << slot)))
373 pcibios_enable_slot(slot);
377 /*****************************************************************************/
379 void pcibios_update_resource(struct pci_dev *dev, struct resource *root, struct resource *r, int resource)
381 printk(KERN_WARNING "%s(%d): no support for changing PCI resources...\n",
386 /*****************************************************************************/
389 * Local routines to interrcept the standard I/O and vector handling
390 * code. Don't include this 'till now - initialization code above needs
391 * access to the real code too.
393 #include <asm/mcfpci.h>
395 /*****************************************************************************/
397 void pci_outb(unsigned char val, unsigned int addr)
399 volatile unsigned long *rp;
400 volatile unsigned char *bp;
403 printk(KERN_DEBUG "pci_outb(val=%02x,addr=%x)\n", val, addr);
406 rp = (volatile unsigned long *) COMEM_BASE;
407 bp = (volatile unsigned char *) COMEM_BASE;
408 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
409 addr = (addr & ~0x3) + (~addr & 0x03);
410 bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
413 /*****************************************************************************/
415 void pci_outw(unsigned short val, unsigned int addr)
417 volatile unsigned long *rp;
418 volatile unsigned short *sp;
421 printk(KERN_DEBUG "pci_outw(val=%04x,addr=%x)\n", val, addr);
424 rp = (volatile unsigned long *) COMEM_BASE;
425 sp = (volatile unsigned short *) COMEM_BASE;
426 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
427 addr = (addr & ~0x3) + (~addr & 0x02);
429 val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
430 sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
433 /*****************************************************************************/
435 void pci_outl(unsigned int val, unsigned int addr)
437 volatile unsigned long *rp;
438 volatile unsigned int *lp;
441 printk(KERN_DEBUG "pci_outl(val=%08x,addr=%x)\n", val, addr);
444 rp = (volatile unsigned long *) COMEM_BASE;
445 lp = (volatile unsigned int *) COMEM_BASE;
446 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
449 val = (val << 24) | ((val & 0x0000ff00) << 8) |
450 ((val & 0x00ff0000) >> 8) | (val >> 24);
452 lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
455 /*****************************************************************************/
457 unsigned long pci_blmask[] = {
464 unsigned char pci_inb(unsigned int addr)
466 volatile unsigned long *rp;
467 volatile unsigned char *bp;
472 printk(KERN_DEBUG "pci_inb(addr=%x)\n", addr);
475 rp = (volatile unsigned long *) COMEM_BASE;
476 bp = (volatile unsigned char *) COMEM_BASE;
478 r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_blmask[(addr & 0x3)];
479 rp[LREG(COMEM_DAHBASE)] = r;
481 addr = (addr & ~0x3) + (~addr & 0x3);
482 val = bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
486 /*****************************************************************************/
488 unsigned long pci_bwmask[] = {
495 unsigned short pci_inw(unsigned int addr)
497 volatile unsigned long *rp;
498 volatile unsigned short *sp;
503 printk(KERN_DEBUG "pci_inw(addr=%x)", addr);
506 rp = (volatile unsigned long *) COMEM_BASE;
507 r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_bwmask[(addr & 0x3)];
508 rp[LREG(COMEM_DAHBASE)] = r;
510 sp = (volatile unsigned short *) COMEM_BASE;
511 addr = (addr & ~0x3) + (~addr & 0x02);
512 val = sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
514 val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
516 printk(KERN_DEBUG "=%04x\n", val);
521 /*****************************************************************************/
523 unsigned int pci_inl(unsigned int addr)
525 volatile unsigned long *rp;
526 volatile unsigned int *lp;
530 printk(KERN_DEBUG "pci_inl(addr=%x)", addr);
533 rp = (volatile unsigned long *) COMEM_BASE;
534 lp = (volatile unsigned int *) COMEM_BASE;
535 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(addr);
536 val = lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
539 val = (val << 24) | ((val & 0x0000ff00) << 8) |
540 ((val & 0x00ff0000) >> 8) | (val >> 24);
543 printk(KERN_DEBUG "=%08x\n", val);
548 /*****************************************************************************/
550 void pci_outsb(void *addr, void *buf, int len)
552 volatile unsigned long *rp;
553 volatile unsigned char *bp;
554 unsigned char *dp = (unsigned char *) buf;
555 unsigned int a = (unsigned int) addr;
558 printk(KERN_DEBUG "pci_outsb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
561 rp = (volatile unsigned long *) COMEM_BASE;
562 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
564 a = (a & ~0x3) + (~a & 0x03);
565 bp = (volatile unsigned char *)
566 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
572 /*****************************************************************************/
574 void pci_outsw(void *addr, void *buf, int len)
576 volatile unsigned long *rp;
577 volatile unsigned short *wp;
578 unsigned short w, *dp = (unsigned short *) buf;
579 unsigned int a = (unsigned int) addr;
582 printk(KERN_DEBUG "pci_outsw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
585 rp = (volatile unsigned long *) COMEM_BASE;
586 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
588 a = (a & ~0x3) + (~a & 0x2);
589 wp = (volatile unsigned short *)
590 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
595 w = ((w & 0xff) << 8) | ((w >> 8) & 0xff);
600 /*****************************************************************************/
602 void pci_outsl(void *addr, void *buf, int len)
604 volatile unsigned long *rp;
605 volatile unsigned long *lp;
606 unsigned long l, *dp = (unsigned long *) buf;
607 unsigned int a = (unsigned int) addr;
610 printk(KERN_DEBUG "pci_outsl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
613 rp = (volatile unsigned long *) COMEM_BASE;
614 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
616 lp = (volatile unsigned long *)
617 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
622 l = (l << 24) | ((l & 0x0000ff00) << 8) |
623 ((l & 0x00ff0000) >> 8) | (l >> 24);
628 /*****************************************************************************/
630 void pci_insb(void *addr, void *buf, int len)
632 volatile unsigned long *rp;
633 volatile unsigned char *bp;
634 unsigned char *dp = (unsigned char *) buf;
635 unsigned int a = (unsigned int) addr;
638 printk(KERN_DEBUG "pci_insb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
641 rp = (volatile unsigned long *) COMEM_BASE;
642 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
644 a = (a & ~0x3) + (~a & 0x03);
645 bp = (volatile unsigned char *)
646 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
652 /*****************************************************************************/
654 void pci_insw(void *addr, void *buf, int len)
656 volatile unsigned long *rp;
657 volatile unsigned short *wp;
658 unsigned short w, *dp = (unsigned short *) buf;
659 unsigned int a = (unsigned int) addr;
662 printk(KERN_DEBUG "pci_insw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
665 rp = (volatile unsigned long *) COMEM_BASE;
666 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
668 a = (a & ~0x3) + (~a & 0x2);
669 wp = (volatile unsigned short *)
670 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
675 w = ((w & 0xff) << 8) | ((w >> 8) & 0xff);
680 /*****************************************************************************/
682 void pci_insl(void *addr, void *buf, int len)
684 volatile unsigned long *rp;
685 volatile unsigned long *lp;
686 unsigned long l, *dp = (unsigned long *) buf;
687 unsigned int a = (unsigned int) addr;
690 printk(KERN_DEBUG "pci_insl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
693 rp = (volatile unsigned long *) COMEM_BASE;
694 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
696 lp = (volatile unsigned long *)
697 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
702 l = (l << 24) | ((l & 0x0000ff00) << 8) |
703 ((l & 0x00ff0000) >> 8) | (l >> 24);
708 /*****************************************************************************/
710 struct pci_localirqlist {
711 void (*handler)(int, void *, struct pt_regs *);
716 struct pci_localirqlist pci_irqlist[COMEM_MAXPCI];
718 /*****************************************************************************/
720 int pci_request_irq(unsigned int irq,
721 void (*handler)(int, void *, struct pt_regs *),
722 unsigned long flags, const char *device, void *dev_id)
727 printk(KERN_DEBUG "pci_request_irq(irq=%d,handler=%x,flags=%x,device=%s,"
728 "dev_id=%x)\n", irq, (int) handler, (int) flags, device,
732 /* Check if this interrupt handler is already lodged */
733 for (i = 0; (i < COMEM_MAXPCI); i++) {
734 if (pci_irqlist[i].handler == handler)
738 /* Find a free spot to put this handler */
739 for (i = 0; (i < COMEM_MAXPCI); i++) {
740 if (pci_irqlist[i].handler == 0) {
741 pci_irqlist[i].handler = handler;
742 pci_irqlist[i].device = device;
743 pci_irqlist[i].dev_id = dev_id;
752 /*****************************************************************************/
754 void pci_free_irq(unsigned int irq, void *dev_id)
759 printk(KERN_DEBUG "pci_free_irq(irq=%d,dev_id=%x)\n", irq, (int) dev_id);
762 if (dev_id == (void *) NULL)
765 /* Check if this interrupt handler is lodged */
766 for (i = 0; (i < COMEM_MAXPCI); i++) {
767 if (pci_irqlist[i].dev_id == dev_id) {
768 pci_irqlist[i].handler = NULL;
769 pci_irqlist[i].device = NULL;
770 pci_irqlist[i].dev_id = NULL;
776 /*****************************************************************************/
778 void pci_interrupt(int irq, void *id, struct pt_regs *fp)
783 printk(KERN_DEBUG "pci_interrupt(irq=%d,id=%x,fp=%x)\n", irq, (int) id, (int) fp);
786 for (i = 0; (i < COMEM_MAXPCI); i++) {
787 if (pci_irqlist[i].handler)
788 (*pci_irqlist[i].handler)(irq,pci_irqlist[i].dev_id,fp);
792 /*****************************************************************************/
795 * The shared memory region is broken up into contiguous 512 byte
796 * regions for easy allocation... This is not an optimal solution
797 * but it makes allocation and freeing regions really easy.
800 #define PCI_MEMSLOTSIZE 512
801 #define PCI_MEMSLOTS (COMEM_SHMEMSIZE / PCI_MEMSLOTSIZE)
803 char pci_shmemmap[PCI_MEMSLOTS];
806 void *pci_bmalloc(int size)
811 printk(KERN_DEBUG "pci_bmalloc(size=%d)\n", size);
815 return((void *) NULL);
817 nrslots = (size - 1) / PCI_MEMSLOTSIZE;
819 for (i = 0; (i < (PCI_MEMSLOTS-nrslots)); i++) {
820 if (pci_shmemmap[i] == 0) {
821 for (j = i+1; (j < (i+nrslots)); j++) {
826 for (j = i; (j <= i+nrslots); j++)
833 return((void *) (COMEM_BASE + COMEM_SHMEM + (i * PCI_MEMSLOTSIZE)));
836 /*****************************************************************************/
838 void pci_bmfree(void *mp, int size)
843 printk(KERN_DEBUG "pci_bmfree(mp=%x,size=%d)\n", (int) mp, size);
846 nrslots = size / PCI_MEMSLOTSIZE;
847 i = (((unsigned long) mp) - (COMEM_BASE + COMEM_SHMEM)) /
850 for (j = i; (j < (i+nrslots)); j++)
854 /*****************************************************************************/
856 unsigned long pci_virt_to_bus(volatile void *address)
861 printk(KERN_DEBUG "pci_virt_to_bus(address=%x)", (int) address);
864 l = ((unsigned long) address) - COMEM_BASE;
866 printk(KERN_DEBUG "=%x\n", (int) (l+pci_shmemaddr));
868 return(l + pci_shmemaddr);
871 /*****************************************************************************/
873 void *pci_bus_to_virt(unsigned long address)
878 printk(KERN_DEBUG "pci_bus_to_virt(address=%x)", (int) address);
881 l = address - pci_shmemaddr;
883 printk(KERN_DEBUG "=%x\n", (int) (address + COMEM_BASE));
885 return((void *) (address + COMEM_BASE));
888 /*****************************************************************************/
890 void pci_bmcpyto(void *dst, void *src, int len)
892 unsigned long *dp, *sp, val;
893 unsigned char *dcp, *scp;
897 printk(KERN_DEBUG "pci_bmcpyto(dst=%x,src=%x,len=%d)\n", (int)dst, (int)src, len);
900 dp = (unsigned long *) dst;
901 sp = (unsigned long *) src;
905 printk(KERN_INFO "DATA:");
906 scp = (unsigned char *) sp;
907 for (i = 0; (i < len); i++) {
908 if ((i % 16) == 0) printk(KERN_INFO "\n%04x: ", i);
909 printk(KERN_INFO "%02x ", *scp++);
911 printk(KERN_INFO "\n");
914 for (j = 0; (i >= 0); i--, j++) {
916 val = (val << 24) | ((val & 0x0000ff00) << 8) |
917 ((val & 0x00ff0000) >> 8) | (val >> 24);
922 dcp = (unsigned char *) dp;
923 scp = ((unsigned char *) sp) + 3;
924 for (i = 0; (i < (len & 0x3)); i++)
929 /*****************************************************************************/
931 void pci_bmcpyfrom(void *dst, void *src, int len)
933 unsigned long *dp, *sp, val;
934 unsigned char *dcp, *scp;
938 printk(KERN_DEBUG "pci_bmcpyfrom(dst=%x,src=%x,len=%d)\n",(int)dst,(int)src,len);
941 dp = (unsigned long *) dst;
942 sp = (unsigned long *) src;
945 for (; (i >= 0); i--) {
947 val = (val << 24) | ((val & 0x0000ff00) << 8) |
948 ((val & 0x00ff0000) >> 8) | (val >> 24);
953 dcp = ((unsigned char *) dp) + 3;
954 scp = (unsigned char *) sp;
955 for (i = 0; (i < (len & 0x3)); i++)
960 printk(KERN_INFO "DATA:");
961 dcp = (unsigned char *) dst;
962 for (i = 0; (i < len); i++) {
963 if ((i % 16) == 0) printk(KERN_INFO "\n%04x: ", i);
964 printk(KERN_INFO "%02x ", *dcp++);
966 printk(KERN_INFO "\n");
970 /*****************************************************************************/
972 void *pci_alloc_consistent(struct pci_dev *dev, size_t size, dma_addr_t *dma_addr)
975 if ((mp = pci_bmalloc(size)) != NULL) {
976 dma_addr = mp - (COMEM_BASE + COMEM_SHMEM);
979 *dma_addr = (dma_addr_t) NULL;
983 /*****************************************************************************/
985 void pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr, dma_addr_t dma_addr)
987 pci_bmfree(cpu_addr, size);
990 /*****************************************************************************/