arch/powerpc/boot/dts/mpc7448hpc2.dts

   1 /*
   2  * MPC7448HPC2 (Taiga) board Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  * 2006 Roy Zang <Roy Zang at freescale.com>.
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13
  14 / {
  15         model = "mpc7448hpc2";
  16         compatible = "mpc74xx";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         cpus {
  21                 #address-cells = <1>;
  22                 #size-cells =<0>;
  23
  24                 PowerPC,7448@0 {
  25                         device_type = "cpu";
  26                         reg = <0>;
  27                         d-cache-line-size = <20>;       // 32 bytes
  28                         i-cache-line-size = <20>;       // 32 bytes
  29                         d-cache-size = <8000>;          // L1, 32K bytes
  30                         i-cache-size = <8000>;          // L1, 32K bytes
  31                         timebase-frequency = <0>;       // 33 MHz, from uboot
  32                         clock-frequency = <0>;          // From U-Boot
  33                         bus-frequency = <0>;            // From U-Boot
  34                 };
  35         };
  36
  37         memory {
  38                 device_type = "memory";
  39                 reg = <00000000 20000000        // DDR2   512M at 0
  40                        >;
  41         };
  42
  43         tsi108@c0000000 {
  44                 #address-cells = <1>;
  45                 #size-cells = <1>;
  46                 device_type = "tsi-bridge";
  47                 ranges = <00000000 c0000000 00010000>;
  48                 reg = <c0000000 00010000>;
  49                 bus-frequency = <0>;
  50
  51                 i2c@7000 {
  52                         interrupt-parent = <&mpic>;
  53                         interrupts = <E 0>;
  54                         reg = <7000 400>;
  55                         device_type = "i2c";
  56                         compatible  = "tsi108-i2c";
  57                 };
  58
  59                 MDIO: mdio@6000 {
  60                         device_type = "mdio";
  61                         compatible = "tsi108-mdio";
  62                         reg = <6000 50>;
  63                         #address-cells = <1>;
  64                         #size-cells = <0>;
  65
  66                         phy8: ethernet-phy@8 {
  67                                 interrupt-parent = <&mpic>;
  68                                 interrupts = <2 1>;
  69                                 reg = <8>;
  70                         };
  71
  72                         phy9: ethernet-phy@9 {
  73                                 interrupt-parent = <&mpic>;
  74                                 interrupts = <2 1>;
  75                                 reg = <9>;
  76                         };
  77
  78                 };
  79
  80                 ethernet@6200 {
  81                         #size-cells = <0>;
  82                         device_type = "network";
  83                         compatible = "tsi108-ethernet";
  84                         reg = <6000 200>;
  85                         address = [ 00 06 D2 00 00 01 ];
  86                         interrupts = <10 2>;
  87                         interrupt-parent = <&mpic>;
  88                         mdio-handle = <&MDIO>;
  89                         phy-handle = <&phy8>;
  90                 };
  91
  92                 ethernet@6600 {
  93                         #address-cells = <1>;
  94                         #size-cells = <0>;
  95                         device_type = "network";
  96                         compatible = "tsi108-ethernet";
  97                         reg = <6400 200>;
  98                         address = [ 00 06 D2 00 00 02 ];
  99                         interrupts = <11 2>;
 100                         interrupt-parent = <&mpic>;
 101                         mdio-handle = <&MDIO>;
 102                         phy-handle = <&phy9>;
 103                 };
 104
 105                 serial@7808 {
 106                         device_type = "serial";
 107                         compatible = "ns16550";
 108                         reg = <7808 200>;
 109                         clock-frequency = <3f6b5a00>;
 110                         interrupts = <c 0>;
 111                         interrupt-parent = <&mpic>;
 112                 };
 113
 114                 serial@7c08 {
 115                         device_type = "serial";
 116                         compatible = "ns16550";
 117                         reg = <7c08 200>;
 118                         clock-frequency = <3f6b5a00>;
 119                         interrupts = <d 0>;
 120                         interrupt-parent = <&mpic>;
 121                 };
 122
 123                 mpic: pic@7400 {
 124                         clock-frequency = <0>;
 125                         interrupt-controller;
 126                         #address-cells = <0>;
 127                         #interrupt-cells = <2>;
 128                         reg = <7400 400>;
 129                         compatible = "chrp,open-pic";
 130                         device_type = "open-pic";
 131                         big-endian;
 132                 };
 133                 pci@1000 {
 134                         compatible = "tsi108-pci";
 135                         device_type = "pci";
 136                         #interrupt-cells = <1>;
 137                         #size-cells = <2>;
 138                         #address-cells = <3>;
 139                         reg = <1000 1000>;
 140                         bus-range = <0 0>;
 141                         ranges = <02000000 0 e0000000 e0000000 0 1A000000
 142                                   01000000 0 00000000 fa000000 0 00010000>;
 143                         clock-frequency = <7f28154>;
 144                         interrupt-parent = <&mpic>;
 145                         interrupts = <17 2>;
 146                         interrupt-map-mask = <f800 0 0 7>;
 147                         interrupt-map = <
 148
 149                                 /* IDSEL 0x11 */
 150                                 0800 0 0 1 &RT0 24 0
 151                                 0800 0 0 2 &RT0 25 0
 152                                 0800 0 0 3 &RT0 26 0
 153                                 0800 0 0 4 &RT0 27 0
 154
 155                                 /* IDSEL 0x12 */
 156                                 1000 0 0 1 &RT0 25 0
 157                                 1000 0 0 2 &RT0 26 0
 158                                 1000 0 0 3 &RT0 27 0
 159                                 1000 0 0 4 &RT0 24 0
 160
 161                                 /* IDSEL 0x13 */
 162                                 1800 0 0 1 &RT0 26 0
 163                                 1800 0 0 2 &RT0 27 0
 164                                 1800 0 0 3 &RT0 24 0
 165                                 1800 0 0 4 &RT0 25 0
 166
 167                                 /* IDSEL 0x14 */
 168                                 2000 0 0 1 &RT0 27 0
 169                                 2000 0 0 2 &RT0 24 0
 170                                 2000 0 0 3 &RT0 25 0
 171                                 2000 0 0 4 &RT0 26 0
 172                                 >;
 173
 174                         RT0: router@1180 {
 175                                 clock-frequency = <0>;
 176                                 interrupt-controller;
 177                                 device_type = "pic-router";
 178                                 #address-cells = <0>;
 179                                 #interrupt-cells = <2>;
 180                                 big-endian;
 181                                 interrupts = <17 2>;
 182                                 interrupt-parent = <&mpic>;
 183                         };
 184                 };
 185         };
 186
 187 };