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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-2.6-omap-h63xx.git] / arch / powerpc / boot / dts / mpc8379_mds.dts
1 /*
2  * MPC8379E MDS Device Tree Source
3  *
4  * Copyright 2007 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "fsl,mpc8379emds";
16         compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 serial0 = &serial0;
24                 serial1 = &serial1;
25                 pci0 = &pci0;
26         };
27
28         cpus {
29                 #address-cells = <1>;
30                 #size-cells = <0>;
31
32                 PowerPC,8379@0 {
33                         device_type = "cpu";
34                         reg = <0x0>;
35                         d-cache-line-size = <32>;
36                         i-cache-line-size = <32>;
37                         d-cache-size = <32768>;
38                         i-cache-size = <32768>;
39                         timebase-frequency = <0>;
40                         bus-frequency = <0>;
41                         clock-frequency = <0>;
42                 };
43         };
44
45         memory {
46                 device_type = "memory";
47                 reg = <0x00000000 0x20000000>;  // 512MB at 0
48         };
49
50         localbus@e0005000 {
51                 #address-cells = <2>;
52                 #size-cells = <1>;
53                 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
54                 reg = <0xe0005000 0x1000>;
55                 interrupts = <77 0x8>;
56                 interrupt-parent = <&ipic>;
57
58                 // booting from NOR flash
59                 ranges = <0 0x0 0xfe000000 0x02000000
60                           1 0x0 0xf8000000 0x00008000
61                           3 0x0 0xe0600000 0x00008000>;
62
63                 flash@0,0 {
64                         #address-cells = <1>;
65                         #size-cells = <1>;
66                         compatible = "cfi-flash";
67                         reg = <0 0x0 0x2000000>;
68                         bank-width = <2>;
69                         device-width = <1>;
70
71                         u-boot@0 {
72                                 reg = <0x0 0x100000>;
73                                 read-only;
74                         };
75
76                         fs@100000 {
77                                 reg = <0x100000 0x800000>;
78                         };
79
80                         kernel@1d00000 {
81                                 reg = <0x1d00000 0x200000>;
82                         };
83
84                         dtb@1f00000 {
85                                 reg = <0x1f00000 0x100000>;
86                         };
87                 };
88
89                 bcsr@1,0 {
90                         reg = <1 0x0 0x8000>;
91                         compatible = "fsl,mpc837xmds-bcsr";
92                 };
93
94                 nand@3,0 {
95                         #address-cells = <1>;
96                         #size-cells = <1>;
97                         compatible = "fsl,mpc8379-fcm-nand",
98                                      "fsl,elbc-fcm-nand";
99                         reg = <3 0x0 0x8000>;
100
101                         u-boot@0 {
102                                 reg = <0x0 0x100000>;
103                                 read-only;
104                         };
105
106                         kernel@100000 {
107                                 reg = <0x100000 0x300000>;
108                         };
109
110                         fs@400000 {
111                                 reg = <0x400000 0x1c00000>;
112                         };
113                 };
114         };
115
116         soc@e0000000 {
117                 #address-cells = <1>;
118                 #size-cells = <1>;
119                 device_type = "soc";
120                 compatible = "simple-bus";
121                 ranges = <0x0 0xe0000000 0x00100000>;
122                 reg = <0xe0000000 0x00000200>;
123                 bus-frequency = <0>;
124
125                 wdt@200 {
126                         compatible = "mpc83xx_wdt";
127                         reg = <0x200 0x100>;
128                 };
129
130                 i2c@3000 {
131                         #address-cells = <1>;
132                         #size-cells = <0>;
133                         cell-index = <0>;
134                         compatible = "fsl-i2c";
135                         reg = <0x3000 0x100>;
136                         interrupts = <14 0x8>;
137                         interrupt-parent = <&ipic>;
138                         dfsrr;
139                 };
140
141                 i2c@3100 {
142                         #address-cells = <1>;
143                         #size-cells = <0>;
144                         cell-index = <1>;
145                         compatible = "fsl-i2c";
146                         reg = <0x3100 0x100>;
147                         interrupts = <15 0x8>;
148                         interrupt-parent = <&ipic>;
149                         dfsrr;
150                 };
151
152                 spi@7000 {
153                         cell-index = <0>;
154                         compatible = "fsl,spi";
155                         reg = <0x7000 0x1000>;
156                         interrupts = <16 0x8>;
157                         interrupt-parent = <&ipic>;
158                         mode = "cpu";
159                 };
160
161                 dma@82a8 {
162                         #address-cells = <1>;
163                         #size-cells = <1>;
164                         compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
165                         reg = <0x82a8 4>;
166                         ranges = <0 0x8100 0x1a8>;
167                         interrupt-parent = <&ipic>;
168                         interrupts = <71 8>;
169                         cell-index = <0>;
170                         dma-channel@0 {
171                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
172                                 reg = <0 0x80>;
173                                 interrupt-parent = <&ipic>;
174                                 interrupts = <71 8>;
175                         };
176                         dma-channel@80 {
177                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
178                                 reg = <0x80 0x80>;
179                                 interrupt-parent = <&ipic>;
180                                 interrupts = <71 8>;
181                         };
182                         dma-channel@100 {
183                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
184                                 reg = <0x100 0x80>;
185                                 interrupt-parent = <&ipic>;
186                                 interrupts = <71 8>;
187                         };
188                         dma-channel@180 {
189                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
190                                 reg = <0x180 0x28>;
191                                 interrupt-parent = <&ipic>;
192                                 interrupts = <71 8>;
193                         };
194                 };
195
196                 usb@23000 {
197                         compatible = "fsl-usb2-dr";
198                         reg = <0x23000 0x1000>;
199                         #address-cells = <1>;
200                         #size-cells = <0>;
201                         interrupt-parent = <&ipic>;
202                         interrupts = <38 0x8>;
203                         dr_mode = "host";
204                         phy_type = "ulpi";
205                 };
206
207                 mdio@24520 {
208                         #address-cells = <1>;
209                         #size-cells = <0>;
210                         compatible = "fsl,gianfar-mdio";
211                         reg = <0x24520 0x20>;
212                         phy2: ethernet-phy@2 {
213                                 interrupt-parent = <&ipic>;
214                                 interrupts = <17 0x8>;
215                                 reg = <0x2>;
216                                 device_type = "ethernet-phy";
217                         };
218                         phy3: ethernet-phy@3 {
219                                 interrupt-parent = <&ipic>;
220                                 interrupts = <18 0x8>;
221                                 reg = <0x3>;
222                                 device_type = "ethernet-phy";
223                         };
224                 };
225
226                 enet0: ethernet@24000 {
227                         cell-index = <0>;
228                         device_type = "network";
229                         model = "eTSEC";
230                         compatible = "gianfar";
231                         reg = <0x24000 0x1000>;
232                         local-mac-address = [ 00 00 00 00 00 00 ];
233                         interrupts = <32 0x8 33 0x8 34 0x8>;
234                         phy-connection-type = "mii";
235                         interrupt-parent = <&ipic>;
236                         phy-handle = <&phy2>;
237                 };
238
239                 enet1: ethernet@25000 {
240                         cell-index = <1>;
241                         device_type = "network";
242                         model = "eTSEC";
243                         compatible = "gianfar";
244                         reg = <0x25000 0x1000>;
245                         local-mac-address = [ 00 00 00 00 00 00 ];
246                         interrupts = <35 0x8 36 0x8 37 0x8>;
247                         phy-connection-type = "mii";
248                         interrupt-parent = <&ipic>;
249                         phy-handle = <&phy3>;
250                 };
251
252                 serial0: serial@4500 {
253                         cell-index = <0>;
254                         device_type = "serial";
255                         compatible = "ns16550";
256                         reg = <0x4500 0x100>;
257                         clock-frequency = <0>;
258                         interrupts = <9 0x8>;
259                         interrupt-parent = <&ipic>;
260                 };
261
262                 serial1: serial@4600 {
263                         cell-index = <1>;
264                         device_type = "serial";
265                         compatible = "ns16550";
266                         reg = <0x4600 0x100>;
267                         clock-frequency = <0>;
268                         interrupts = <10 0x8>;
269                         interrupt-parent = <&ipic>;
270                 };
271
272                 crypto@30000 {
273                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
274                                      "fsl,sec2.1", "fsl,sec2.0";
275                         reg = <0x30000 0x10000>;
276                         interrupts = <11 0x8>;
277                         interrupt-parent = <&ipic>;
278                         fsl,num-channels = <4>;
279                         fsl,channel-fifo-len = <24>;
280                         fsl,exec-units-mask = <0x9fe>;
281                         fsl,descriptor-types-mask = <0x3ab0ebf>;
282                 };
283
284                 sdhc@2e000 {
285                         model = "eSDHC";
286                         compatible = "fsl,esdhc";
287                         reg = <0x2e000 0x1000>;
288                         interrupts = <42 0x8>;
289                         interrupt-parent = <&ipic>;
290                 };
291
292                 sata@18000 {
293                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
294                         reg = <0x18000 0x1000>;
295                         interrupts = <44 0x8>;
296                         interrupt-parent = <&ipic>;
297                 };
298
299                 sata@19000 {
300                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
301                         reg = <0x19000 0x1000>;
302                         interrupts = <45 0x8>;
303                         interrupt-parent = <&ipic>;
304                 };
305
306                 sata@1a000 {
307                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
308                         reg = <0x1a000 0x1000>;
309                         interrupts = <46 0x8>;
310                         interrupt-parent = <&ipic>;
311                 };
312
313                 sata@1b000 {
314                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
315                         reg = <0x1b000 0x1000>;
316                         interrupts = <47 0x8>;
317                         interrupt-parent = <&ipic>;
318                 };
319
320                 /* IPIC
321                  * interrupts cell = <intr #, sense>
322                  * sense values match linux IORESOURCE_IRQ_* defines:
323                  * sense == 8: Level, low assertion
324                  * sense == 2: Edge, high-to-low change
325                  */
326                 ipic: pic@700 {
327                         compatible = "fsl,ipic";
328                         interrupt-controller;
329                         #address-cells = <0>;
330                         #interrupt-cells = <2>;
331                         reg = <0x700 0x100>;
332                 };
333         };
334
335         pci0: pci@e0008500 {
336                 cell-index = <0>;
337                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
338                 interrupt-map = <
339
340                                 /* IDSEL 0x11 */
341                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
342                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
343                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
344                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
345
346                                 /* IDSEL 0x12 */
347                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
348                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
349                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
350                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
351
352                                 /* IDSEL 0x13 */
353                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
354                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
355                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
356                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
357
358                                 /* IDSEL 0x15 */
359                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
360                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
361                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
362                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
363
364                                 /* IDSEL 0x16 */
365                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
366                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
367                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
368                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
369
370                                 /* IDSEL 0x17 */
371                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
372                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
373                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
374                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
375
376                                 /* IDSEL 0x18 */
377                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
378                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
379                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
380                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
381                 interrupt-parent = <&ipic>;
382                 interrupts = <66 0x8>;
383                 bus-range = <0x0 0x0>;
384                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
385                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
386                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
387                 clock-frequency = <0>;
388                 #interrupt-cells = <1>;
389                 #size-cells = <2>;
390                 #address-cells = <3>;
391                 reg = <0xe0008500 0x100>;
392                 compatible = "fsl,mpc8349-pci";
393                 device_type = "pci";
394         };
395 };