2 * MPC8536 DS Device Tree Source
4 * Copyright 2008 Freescale Semiconductor, Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "fsl,mpc8536ds";
16 compatible = "fsl,mpc8536ds";
39 next-level-cache = <&L2>;
44 device_type = "memory";
45 reg = <00000000 00000000>; // Filled by U-Boot
52 compatible = "simple-bus";
53 ranges = <0x0 0xffe00000 0x100000>;
54 reg = <0xffe00000 0x1000>;
55 bus-frequency = <0>; // Filled out by uboot.
57 memory-controller@2000 {
58 compatible = "fsl,mpc8536-memory-controller";
59 reg = <0x2000 0x1000>;
60 interrupt-parent = <&mpic>;
61 interrupts = <18 0x2>;
64 L2: l2-cache-controller@20000 {
65 compatible = "fsl,mpc8536-l2-cache-controller";
66 reg = <0x20000 0x1000>;
67 interrupt-parent = <&mpic>;
68 interrupts = <16 0x2>;
75 compatible = "fsl-i2c";
77 interrupts = <43 0x2>;
78 interrupt-parent = <&mpic>;
86 compatible = "fsl-i2c";
88 interrupts = <43 0x2>;
89 interrupt-parent = <&mpic>;
92 compatible = "dallas,ds3232";
100 compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
102 ranges = <0 0x21100 0x200>;
105 compatible = "fsl,mpc8536-dma-channel",
106 "fsl,eloplus-dma-channel";
109 interrupt-parent = <&mpic>;
110 interrupts = <14 0x2>;
113 compatible = "fsl,mpc8536-dma-channel",
114 "fsl,eloplus-dma-channel";
117 interrupt-parent = <&mpic>;
118 interrupts = <15 0x2>;
121 compatible = "fsl,mpc8536-dma-channel",
122 "fsl,eloplus-dma-channel";
125 interrupt-parent = <&mpic>;
126 interrupts = <16 0x2>;
129 compatible = "fsl,mpc8536-dma-channel",
130 "fsl,eloplus-dma-channel";
133 interrupt-parent = <&mpic>;
134 interrupts = <17 0x2>;
139 #address-cells = <1>;
141 compatible = "fsl,gianfar-mdio";
142 reg = <0x24520 0x20>;
144 phy0: ethernet-phy@0 {
145 interrupt-parent = <&mpic>;
146 interrupts = <10 0x1>;
148 device_type = "ethernet-phy";
150 phy1: ethernet-phy@1 {
151 interrupt-parent = <&mpic>;
152 interrupts = <10 0x1>;
154 device_type = "ethernet-phy";
159 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
160 reg = <0x22000 0x1000>;
161 #address-cells = <1>;
163 interrupt-parent = <&mpic>;
164 interrupts = <28 0x2>;
169 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
170 reg = <0x23000 0x1000>;
171 #address-cells = <1>;
173 interrupt-parent = <&mpic>;
174 interrupts = <46 0x2>;
178 enet0: ethernet@24000 {
180 device_type = "network";
182 compatible = "gianfar";
183 reg = <0x24000 0x1000>;
184 local-mac-address = [ 00 00 00 00 00 00 ];
185 interrupts = <29 2 30 2 34 2>;
186 interrupt-parent = <&mpic>;
187 phy-handle = <&phy1>;
188 phy-connection-type = "rgmii-id";
191 enet1: ethernet@26000 {
193 device_type = "network";
195 compatible = "gianfar";
196 reg = <0x26000 0x1000>;
197 local-mac-address = [ 00 00 00 00 00 00 ];
198 interrupts = <31 2 32 2 33 2>;
199 interrupt-parent = <&mpic>;
200 phy-handle = <&phy0>;
201 phy-connection-type = "rgmii-id";
205 compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
206 reg = <0x2b000 0x1000>;
207 #address-cells = <1>;
209 interrupt-parent = <&mpic>;
210 interrupts = <60 0x2>;
211 dr_mode = "peripheral";
215 serial0: serial@4500 {
217 device_type = "serial";
218 compatible = "ns16550";
219 reg = <0x4500 0x100>;
220 clock-frequency = <0>;
221 interrupts = <42 0x2>;
222 interrupt-parent = <&mpic>;
225 serial1: serial@4600 {
227 device_type = "serial";
228 compatible = "ns16550";
229 reg = <0x4600 0x100>;
230 clock-frequency = <0>;
231 interrupts = <42 0x2>;
232 interrupt-parent = <&mpic>;
236 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
237 "fsl,sec2.1", "fsl,sec2.0";
238 reg = <0x30000 0x10000>;
239 interrupts = <45 2 58 2>;
240 interrupt-parent = <&mpic>;
241 fsl,num-channels = <4>;
242 fsl,channel-fifo-len = <24>;
243 fsl,exec-units-mask = <0x9fe>;
244 fsl,descriptor-types-mask = <0x3ab0ebf>;
248 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
249 reg = <0x18000 0x1000>;
251 interrupts = <74 0x2>;
252 interrupt-parent = <&mpic>;
256 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
257 reg = <0x19000 0x1000>;
259 interrupts = <41 0x2>;
260 interrupt-parent = <&mpic>;
263 global-utilities@e0000 { //global utilities block
264 compatible = "fsl,mpc8548-guts";
265 reg = <0xe0000 0x1000>;
270 clock-frequency = <0>;
271 interrupt-controller;
272 #address-cells = <0>;
273 #interrupt-cells = <2>;
274 reg = <0x40000 0x40000>;
275 compatible = "chrp,open-pic";
276 device_type = "open-pic";
281 compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
282 reg = <0x41600 0x80>;
283 msi-available-ranges = <0 0x100>;
293 interrupt-parent = <&mpic>;
299 compatible = "fsl,mpc8540-pci";
301 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
304 /* IDSEL 0x11 J17 Slot 1 */
305 0x8800 0 0 1 &mpic 1 1
306 0x8800 0 0 2 &mpic 2 1
307 0x8800 0 0 3 &mpic 3 1
308 0x8800 0 0 4 &mpic 4 1>;
310 interrupt-parent = <&mpic>;
311 interrupts = <24 0x2>;
312 bus-range = <0 0xff>;
313 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
314 0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
315 clock-frequency = <66666666>;
316 #interrupt-cells = <1>;
318 #address-cells = <3>;
319 reg = <0xffe08000 0x1000>;
322 pci1: pcie@ffe09000 {
324 compatible = "fsl,mpc8548-pcie";
326 #interrupt-cells = <1>;
328 #address-cells = <3>;
329 reg = <0xffe09000 0x1000>;
330 bus-range = <0 0xff>;
331 ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
332 0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
333 clock-frequency = <33333333>;
334 interrupt-parent = <&mpic>;
335 interrupts = <25 0x2>;
336 interrupt-map-mask = <0xf800 0 0 7>;
347 #address-cells = <3>;
349 ranges = <0x02000000 0 0x98000000
350 0x02000000 0 0x98000000
353 0x01000000 0 0x00000000
354 0x01000000 0 0x00000000
359 pci2: pcie@ffe0a000 {
361 compatible = "fsl,mpc8548-pcie";
363 #interrupt-cells = <1>;
365 #address-cells = <3>;
366 reg = <0xffe0a000 0x1000>;
367 bus-range = <0 0xff>;
368 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
369 0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
370 clock-frequency = <33333333>;
371 interrupt-parent = <&mpic>;
372 interrupts = <26 0x2>;
373 interrupt-map-mask = <0xf800 0 0 7>;
384 #address-cells = <3>;
386 ranges = <0x02000000 0 0x90000000
387 0x02000000 0 0x90000000
390 0x01000000 0 0x00000000
391 0x01000000 0 0x00000000
396 pci3: pcie@ffe0b000 {
398 compatible = "fsl,mpc8548-pcie";
400 #interrupt-cells = <1>;
402 #address-cells = <3>;
403 reg = <0xffe0b000 0x1000>;
404 bus-range = <0 0xff>;
405 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
406 0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
407 clock-frequency = <33333333>;
408 interrupt-parent = <&mpic>;
409 interrupts = <27 0x2>;
410 interrupt-map-mask = <0xf800 0 0 7>;
415 0000 0 0 3 &mpic 10 1
416 0000 0 0 4 &mpic 11 1
422 #address-cells = <3>;
424 ranges = <0x02000000 0 0xa0000000
425 0x02000000 0 0xa0000000
428 0x01000000 0 0x00000000
429 0x01000000 0 0x00000000