2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
4 * Rewrite, cleanup, new allocation schemes, virtual merging:
5 * Copyright (C) 2004 Olof Johansson, IBM Corporation
6 * and Ben. Herrenschmidt, IBM Corporation
8 * Dynamic DMA mapping support, bus-independent parts.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/slab.h>
30 #include <linux/spinlock.h>
31 #include <linux/string.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/init.h>
34 #include <linux/bitops.h>
37 #include <asm/iommu.h>
38 #include <asm/pci-bridge.h>
39 #include <asm/machdep.h>
40 #include <asm/kdump.h>
44 #ifdef CONFIG_IOMMU_VMERGE
45 static int novmerge = 0;
47 static int novmerge = 1;
50 static int protect4gb = 1;
52 static inline unsigned long iommu_num_pages(unsigned long vaddr,
57 npages = IOMMU_PAGE_ALIGN(vaddr + slen) - (vaddr & IOMMU_PAGE_MASK);
58 npages >>= IOMMU_PAGE_SHIFT;
63 static int __init setup_protect4gb(char *str)
65 if (strcmp(str, "on") == 0)
67 else if (strcmp(str, "off") == 0)
73 static int __init setup_iommu(char *str)
75 if (!strcmp(str, "novmerge"))
77 else if (!strcmp(str, "vmerge"))
82 __setup("protect4gb=", setup_protect4gb);
83 __setup("iommu=", setup_iommu);
85 static unsigned long iommu_range_alloc(struct iommu_table *tbl,
87 unsigned long *handle,
89 unsigned int align_order)
91 unsigned long n, end, i, start;
92 unsigned long start_addr, end_addr;
94 int largealloc = npages > 15;
96 unsigned long align_mask;
98 align_mask = 0xffffffffffffffffl >> (64 - align_order);
100 /* This allocator was derived from x86_64's bit string search */
103 if (unlikely(npages == 0)) {
104 if (printk_ratelimit())
106 return DMA_ERROR_CODE;
109 if (handle && *handle)
112 start = largealloc ? tbl->it_largehint : tbl->it_hint;
114 /* Use only half of the table for small allocs (15 pages or less) */
115 limit = largealloc ? tbl->it_size : tbl->it_halfpoint;
117 if (largealloc && start < tbl->it_halfpoint)
118 start = tbl->it_halfpoint;
120 /* The case below can happen if we have a small segment appended
121 * to a large, or when the previous alloc was at the very end of
122 * the available space. If so, go back to the initial start.
125 start = largealloc ? tbl->it_largehint : tbl->it_hint;
129 if (limit + tbl->it_offset > mask) {
130 limit = mask - tbl->it_offset + 1;
131 /* If we're constrained on address range, first try
132 * at the masked hint to avoid O(n) search complexity,
133 * but on second pass, start at 0.
135 if ((start & mask) >= limit || pass > 0)
141 n = find_next_zero_bit(tbl->it_map, limit, start);
143 /* Align allocation */
144 n = (n + align_mask) & ~align_mask;
148 if (unlikely(end >= limit)) {
149 if (likely(pass < 2)) {
150 /* First failure, just rescan the half of the table.
151 * Second failure, rescan the other half of the table.
153 start = (largealloc ^ pass) ? tbl->it_halfpoint : 0;
154 limit = pass ? tbl->it_size : limit;
158 /* Third failure, give up */
159 return DMA_ERROR_CODE;
163 /* DMA cannot cross 4 GB boundary */
164 start_addr = (n + tbl->it_offset) << PAGE_SHIFT;
165 end_addr = (end + tbl->it_offset) << PAGE_SHIFT;
166 if ((start_addr >> 32) != (end_addr >> 32)) {
167 end_addr &= 0xffffffff00000000l;
168 start = (end_addr >> PAGE_SHIFT) - tbl->it_offset;
172 for (i = n; i < end; i++)
173 if (test_bit(i, tbl->it_map)) {
178 for (i = n; i < end; i++)
179 __set_bit(i, tbl->it_map);
181 /* Bump the hint to a new block for small allocs. */
183 /* Don't bump to new block to avoid fragmentation */
184 tbl->it_largehint = end;
186 /* Overflow will be taken care of at the next allocation */
187 tbl->it_hint = (end + tbl->it_blocksize - 1) &
188 ~(tbl->it_blocksize - 1);
191 /* Update handle for SG allocations */
198 static dma_addr_t iommu_alloc(struct iommu_table *tbl, void *page,
199 unsigned int npages, enum dma_data_direction direction,
200 unsigned long mask, unsigned int align_order)
202 unsigned long entry, flags;
203 dma_addr_t ret = DMA_ERROR_CODE;
205 spin_lock_irqsave(&(tbl->it_lock), flags);
207 entry = iommu_range_alloc(tbl, npages, NULL, mask, align_order);
209 if (unlikely(entry == DMA_ERROR_CODE)) {
210 spin_unlock_irqrestore(&(tbl->it_lock), flags);
211 return DMA_ERROR_CODE;
214 entry += tbl->it_offset; /* Offset into real TCE table */
215 ret = entry << IOMMU_PAGE_SHIFT; /* Set the return dma address */
217 /* Put the TCEs in the HW table */
218 ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & IOMMU_PAGE_MASK,
222 /* Flush/invalidate TLB caches if necessary */
223 if (ppc_md.tce_flush)
224 ppc_md.tce_flush(tbl);
226 spin_unlock_irqrestore(&(tbl->it_lock), flags);
228 /* Make sure updates are seen by hardware */
234 static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
237 unsigned long entry, free_entry;
240 entry = dma_addr >> IOMMU_PAGE_SHIFT;
241 free_entry = entry - tbl->it_offset;
243 if (((free_entry + npages) > tbl->it_size) ||
244 (entry < tbl->it_offset)) {
245 if (printk_ratelimit()) {
246 printk(KERN_INFO "iommu_free: invalid entry\n");
247 printk(KERN_INFO "\tentry = 0x%lx\n", entry);
248 printk(KERN_INFO "\tdma_addr = 0x%lx\n", (u64)dma_addr);
249 printk(KERN_INFO "\tTable = 0x%lx\n", (u64)tbl);
250 printk(KERN_INFO "\tbus# = 0x%lx\n", (u64)tbl->it_busno);
251 printk(KERN_INFO "\tsize = 0x%lx\n", (u64)tbl->it_size);
252 printk(KERN_INFO "\tstartOff = 0x%lx\n", (u64)tbl->it_offset);
253 printk(KERN_INFO "\tindex = 0x%lx\n", (u64)tbl->it_index);
259 ppc_md.tce_free(tbl, entry, npages);
261 for (i = 0; i < npages; i++)
262 __clear_bit(free_entry+i, tbl->it_map);
265 static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
270 spin_lock_irqsave(&(tbl->it_lock), flags);
272 __iommu_free(tbl, dma_addr, npages);
274 /* Make sure TLB cache is flushed if the HW needs it. We do
275 * not do an mb() here on purpose, it is not needed on any of
276 * the current platforms.
278 if (ppc_md.tce_flush)
279 ppc_md.tce_flush(tbl);
281 spin_unlock_irqrestore(&(tbl->it_lock), flags);
284 int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
285 int nelems, unsigned long mask,
286 enum dma_data_direction direction)
288 dma_addr_t dma_next = 0, dma_addr;
290 struct scatterlist *s, *outs, *segstart;
291 int outcount, incount;
292 unsigned long handle;
294 BUG_ON(direction == DMA_NONE);
296 if ((nelems == 0) || !tbl)
299 outs = s = segstart = &sglist[0];
304 /* Init first segment length for backout at failure */
305 outs->dma_length = 0;
307 DBG("sg mapping %d elements:\n", nelems);
309 spin_lock_irqsave(&(tbl->it_lock), flags);
311 for (s = outs; nelems; nelems--, s++) {
312 unsigned long vaddr, npages, entry, slen;
320 /* Allocate iommu entries for that segment */
321 vaddr = (unsigned long)page_address(s->page) + s->offset;
322 npages = iommu_num_pages(vaddr, slen);
323 entry = iommu_range_alloc(tbl, npages, &handle, mask >> IOMMU_PAGE_SHIFT, 0);
325 DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen);
328 if (unlikely(entry == DMA_ERROR_CODE)) {
329 if (printk_ratelimit())
330 printk(KERN_INFO "iommu_alloc failed, tbl %p vaddr %lx"
331 " npages %lx\n", tbl, vaddr, npages);
335 /* Convert entry to a dma_addr_t */
336 entry += tbl->it_offset;
337 dma_addr = entry << IOMMU_PAGE_SHIFT;
338 dma_addr |= (s->offset & ~IOMMU_PAGE_MASK);
340 DBG(" - %lu pages, entry: %lx, dma_addr: %lx\n",
341 npages, entry, dma_addr);
343 /* Insert into HW table */
344 ppc_md.tce_build(tbl, entry, npages, vaddr & IOMMU_PAGE_MASK, direction);
346 /* If we are in an open segment, try merging */
348 DBG(" - trying merge...\n");
349 /* We cannot merge if:
350 * - allocated dma_addr isn't contiguous to previous allocation
352 if (novmerge || (dma_addr != dma_next)) {
353 /* Can't merge: create a new segment */
356 DBG(" can't merge, new segment.\n");
358 outs->dma_length += s->length;
359 DBG(" merged, new len: %ux\n", outs->dma_length);
364 /* This is a new segment, fill entries */
365 DBG(" - filling new segment.\n");
366 outs->dma_address = dma_addr;
367 outs->dma_length = slen;
370 /* Calculate next page pointer for contiguous check */
371 dma_next = dma_addr + slen;
373 DBG(" - dma next is: %lx\n", dma_next);
376 /* Flush/invalidate TLB caches if necessary */
377 if (ppc_md.tce_flush)
378 ppc_md.tce_flush(tbl);
380 spin_unlock_irqrestore(&(tbl->it_lock), flags);
382 DBG("mapped %d elements:\n", outcount);
384 /* For the sake of iommu_unmap_sg, we clear out the length in the
385 * next entry of the sglist if we didn't fill the list completely
387 if (outcount < incount) {
389 outs->dma_address = DMA_ERROR_CODE;
390 outs->dma_length = 0;
393 /* Make sure updates are seen by hardware */
399 for (s = &sglist[0]; s <= outs; s++) {
400 if (s->dma_length != 0) {
401 unsigned long vaddr, npages;
403 vaddr = s->dma_address & IOMMU_PAGE_MASK;
404 npages = iommu_num_pages(s->dma_address, s->dma_length);
405 __iommu_free(tbl, vaddr, npages);
406 s->dma_address = DMA_ERROR_CODE;
410 spin_unlock_irqrestore(&(tbl->it_lock), flags);
415 void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
416 int nelems, enum dma_data_direction direction)
420 BUG_ON(direction == DMA_NONE);
425 spin_lock_irqsave(&(tbl->it_lock), flags);
429 dma_addr_t dma_handle = sglist->dma_address;
431 if (sglist->dma_length == 0)
433 npages = iommu_num_pages(dma_handle,sglist->dma_length);
434 __iommu_free(tbl, dma_handle, npages);
438 /* Flush/invalidate TLBs if necessary. As for iommu_free(), we
439 * do not do an mb() here, the affected platforms do not need it
442 if (ppc_md.tce_flush)
443 ppc_md.tce_flush(tbl);
445 spin_unlock_irqrestore(&(tbl->it_lock), flags);
449 * Build a iommu_table structure. This contains a bit map which
450 * is used to manage allocation of the tce space.
452 struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
455 unsigned long start_index, end_index;
456 unsigned long entries_per_4g;
458 static int welcomed = 0;
461 /* Set aside 1/4 of the table for large allocations. */
462 tbl->it_halfpoint = tbl->it_size * 3 / 4;
464 /* number of bytes needed for the bitmap */
465 sz = (tbl->it_size + 7) >> 3;
467 page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz));
469 panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
470 tbl->it_map = page_address(page);
471 memset(tbl->it_map, 0, sz);
474 tbl->it_largehint = tbl->it_halfpoint;
475 spin_lock_init(&tbl->it_lock);
477 #ifdef CONFIG_CRASH_DUMP
478 if (ppc_md.tce_get) {
479 unsigned long tceval;
480 unsigned long tcecount = 0;
483 * Reserve the existing mappings left by the first kernel.
485 for (index = 0; index < tbl->it_size; index++) {
486 tceval = ppc_md.tce_get(tbl, index + tbl->it_offset);
488 * Freed TCE entry contains 0x7fffffffffffffff on JS20
490 if (tceval && (tceval != 0x7fffffffffffffffUL)) {
491 __set_bit(index, tbl->it_map);
495 if ((tbl->it_size - tcecount) < KDUMP_MIN_TCE_ENTRIES) {
496 printk(KERN_WARNING "TCE table is full; ");
497 printk(KERN_WARNING "freeing %d entries for the kdump boot\n",
498 KDUMP_MIN_TCE_ENTRIES);
499 for (index = tbl->it_size - KDUMP_MIN_TCE_ENTRIES;
500 index < tbl->it_size; index++)
501 __clear_bit(index, tbl->it_map);
505 /* Clear the hardware table in case firmware left allocations in it */
506 ppc_md.tce_free(tbl, tbl->it_offset, tbl->it_size);
510 * DMA cannot cross 4 GB boundary. Mark last entry of each 4
511 * GB chunk as reserved.
514 entries_per_4g = 0x100000000l >> IOMMU_PAGE_SHIFT;
516 /* Mark the last bit before a 4GB boundary as used */
517 start_index = tbl->it_offset | (entries_per_4g - 1);
518 start_index -= tbl->it_offset;
520 end_index = tbl->it_size;
522 for (index = start_index; index < end_index - 1; index += entries_per_4g)
523 __set_bit(index, tbl->it_map);
527 printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n",
528 novmerge ? "disabled" : "enabled");
535 void iommu_free_table(struct device_node *dn)
537 struct pci_dn *pdn = dn->data;
538 struct iommu_table *tbl = pdn->iommu_table;
539 unsigned long bitmap_sz, i;
542 if (!tbl || !tbl->it_map) {
543 printk(KERN_ERR "%s: expected TCE map for %s\n", __FUNCTION__,
548 /* verify that table contains no entries */
549 /* it_size is in entries, and we're examining 64 at a time */
550 for (i = 0; i < (tbl->it_size/64); i++) {
551 if (tbl->it_map[i] != 0) {
552 printk(KERN_WARNING "%s: Unexpected TCEs for %s\n",
553 __FUNCTION__, dn->full_name);
558 /* calculate bitmap size in bytes */
559 bitmap_sz = (tbl->it_size + 7) / 8;
562 order = get_order(bitmap_sz);
563 free_pages((unsigned long) tbl->it_map, order);
569 /* Creates TCEs for a user provided buffer. The user buffer must be
570 * contiguous real kernel storage (not vmalloc). The address of the buffer
571 * passed here is the kernel (virtual) address of the buffer. The buffer
572 * need not be page aligned, the dma_addr_t returned will point to the same
573 * byte within the page as vaddr.
575 dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr,
576 size_t size, unsigned long mask,
577 enum dma_data_direction direction)
579 dma_addr_t dma_handle = DMA_ERROR_CODE;
583 BUG_ON(direction == DMA_NONE);
585 uaddr = (unsigned long)vaddr;
586 npages = iommu_num_pages(uaddr, size);
589 dma_handle = iommu_alloc(tbl, vaddr, npages, direction,
590 mask >> IOMMU_PAGE_SHIFT, 0);
591 if (dma_handle == DMA_ERROR_CODE) {
592 if (printk_ratelimit()) {
593 printk(KERN_INFO "iommu_alloc failed, "
594 "tbl %p vaddr %p npages %d\n",
598 dma_handle |= (uaddr & ~IOMMU_PAGE_MASK);
604 void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
605 size_t size, enum dma_data_direction direction)
609 BUG_ON(direction == DMA_NONE);
612 npages = iommu_num_pages(dma_handle, size);
613 iommu_free(tbl, dma_handle, npages);
617 /* Allocates a contiguous real buffer and creates mappings over it.
618 * Returns the virtual address of the buffer and sets dma_handle
619 * to the dma address (mapping) of the first page.
621 void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size,
622 dma_addr_t *dma_handle, unsigned long mask, gfp_t flag, int node)
627 unsigned int nio_pages, io_order;
630 size = PAGE_ALIGN(size);
631 order = get_order(size);
634 * Client asked for way too much space. This is checked later
635 * anyway. It is easier to debug here for the drivers than in
638 if (order >= IOMAP_MAX_ORDER) {
639 printk("iommu_alloc_consistent size too large: 0x%lx\n", size);
646 /* Alloc enough pages (and possibly more) */
647 page = alloc_pages_node(node, flag, order);
650 ret = page_address(page);
651 memset(ret, 0, size);
653 /* Set up tces to cover the allocated range */
654 nio_pages = size >> IOMMU_PAGE_SHIFT;
655 io_order = get_iommu_order(size);
656 mapping = iommu_alloc(tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
657 mask >> IOMMU_PAGE_SHIFT, io_order);
658 if (mapping == DMA_ERROR_CODE) {
659 free_pages((unsigned long)ret, order);
662 *dma_handle = mapping;
666 void iommu_free_coherent(struct iommu_table *tbl, size_t size,
667 void *vaddr, dma_addr_t dma_handle)
670 unsigned int nio_pages;
672 size = PAGE_ALIGN(size);
673 nio_pages = size >> IOMMU_PAGE_SHIFT;
674 iommu_free(tbl, dma_handle, nio_pages);
675 size = PAGE_ALIGN(size);
676 free_pages((unsigned long)vaddr, get_order(size));