2 * arch/ppc/platforms/4xx/bubinga.h
4 * Bubinga board definitions
6 * Copyright (c) 2005 DENX Software Engineering
7 * Stefan Roese <sr@denx.de>
9 * Based on original work by
11 * 2003 (c) MontaVista Softare Inc.
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
24 #include <linux/config.h>
25 #include <platforms/4xx/ibm405ep.h>
26 #include <asm/ppcboot.h>
28 /* Memory map for the Bubinga board.
29 * Generic 4xx plus RTC.
32 #define BUBINGA_RTC_PADDR ((uint)0xf0000000)
33 #define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR
34 #define BUBINGA_RTC_SIZE ((uint)8*1024)
36 /* The UART clock is based off an internal clock -
37 * define BASE_BAUD based on the internal clock and divider(s).
38 * Since BASE_BAUD must be a constant, we will initialize it
39 * using clock/divider values which OpenBIOS initializes
40 * for typical configurations at various CPU speeds.
41 * The base baud is calculated as (FWDA / EXT UART DIV / 16)
46 #define PPC40x_FPGA_BASE 0xF0300000
47 #define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */
48 #define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
49 #define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
50 #define PPC40x_FLASH_LOW 0xFFF00000
51 #define PPC40x_FLASH_HIGH 0xFFF80000
52 #define PPC40x_FLASH_SIZE 0x80000
54 #define PPC4xx_MACHINE_NAME "IBM Bubinga"
56 #endif /* __BUBINGA_H__ */
57 #endif /* __KERNEL__ */