2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <asm/cache.h>
15 #include <asm/lowcore.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
56 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
57 STACK_SIZE = 1 << STACK_SHIFT
59 #define BASED(name) name-system_call(%r13)
61 #ifdef CONFIG_TRACE_IRQFLAGS
63 l %r1,BASED(.Ltrace_irq_on)
68 l %r1,BASED(.Ltrace_irq_off)
73 #define TRACE_IRQS_OFF
77 * Register usage in interrupt handlers:
78 * R9 - pointer to current task structure
79 * R13 - pointer to literal pool
80 * R14 - return register for function calls
81 * R15 - kernel stack pointer
84 .macro STORE_TIMER lc_offset
85 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
90 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
91 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
101 1: stm %r10,%r11,\lc_sum
105 .macro SAVE_ALL_BASE savearea
106 stm %r12,%r15,\savearea
107 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
110 .macro SAVE_ALL_SYNC psworg,savearea
112 tm \psworg+1,0x01 # test problem state bit
113 bz BASED(2f) # skip stack setup save
114 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
115 #ifdef CONFIG_CHECK_STACK
117 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
118 bz BASED(stack_overflow)
124 .macro SAVE_ALL_ASYNC psworg,savearea
126 tm \psworg+1,0x01 # test problem state bit
127 bnz BASED(1f) # from user -> load async stack
128 clc \psworg+4(4),BASED(.Lcritical_end)
130 clc \psworg+4(4),BASED(.Lcritical_start)
132 l %r14,BASED(.Lcleanup_critical)
134 tm 1(%r12),0x01 # retest problem state after cleanup
136 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
140 1: l %r15,__LC_ASYNC_STACK
141 #ifdef CONFIG_CHECK_STACK
143 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
144 bz BASED(stack_overflow)
150 .macro CREATE_STACK_FRAME psworg,savearea
151 s %r15,BASED(.Lc_spsize) # make room for registers & psw
152 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
154 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
155 icm %r12,12,__LC_SVC_ILC
156 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
158 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
160 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
163 .macro RESTORE_ALL psworg,sync
164 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
166 ni \psworg+1,0xfd # clear wait state bit
168 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
169 STORE_TIMER __LC_EXIT_TIMER
170 lpsw \psworg # back to caller
174 * Scheduler resume function, called by switch_to
175 * gpr2 = (task_struct *) prev
176 * gpr3 = (task_struct *) next
184 tm __THREAD_per(%r3),0xe8 # new process is using per ?
185 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
186 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
187 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
188 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
189 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
191 l %r4,__THREAD_info(%r2) # get thread_info of prev
192 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
193 bz __switch_to_no_mcck-__switch_to_base(%r1)
194 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
195 l %r4,__THREAD_info(%r3) # get thread_info of next
196 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
198 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
199 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
200 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
201 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
202 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
203 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
204 l %r3,__THREAD_info(%r3) # load thread_info from task struct
205 st %r3,__LC_THREAD_INFO
207 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
212 * SVC interrupt handler routine. System calls are synchronous events and
213 * are executed with interrupts enabled.
218 STORE_TIMER __LC_SYNC_ENTER_TIMER
220 SAVE_ALL_BASE __LC_SAVE_AREA
221 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
222 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
223 lh %r7,0x8a # get svc number from lowcore
224 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
226 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
227 bz BASED(sysc_do_svc)
228 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
230 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
232 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
235 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
236 sla %r7,2 # *4 and test for svc 0
237 bnz BASED(sysc_nr_ok) # svc number > 0
238 # svc 0: system call number in %r1
239 cl %r1,BASED(.Lnr_syscalls)
240 bnl BASED(sysc_nr_ok)
241 lr %r7,%r1 # copy svc number to %r7
244 mvc SP_ARGS(4,%r15),SP_R7(%r15)
246 l %r8,BASED(.Lsysc_table)
247 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
248 l %r8,0(%r7,%r8) # get system call addr.
249 bnz BASED(sysc_tracesys)
250 basr %r14,%r8 # call sys_xxxx
251 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
254 tm SP_PSW+1(%r15),0x01 # returning to user ?
255 bno BASED(sysc_leave)
256 tm __TI_flags+3(%r9),_TIF_WORK_SVC
257 bnz BASED(sysc_work) # there is work to do (signals etc.)
259 RESTORE_ALL __LC_RETURN_PSW,1
262 # recheck if there is more work to do
265 tm __TI_flags+3(%r9),_TIF_WORK_SVC
266 bz BASED(sysc_leave) # there is no work to do
268 # One of the work bits is on. Find out which one.
271 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
272 bo BASED(sysc_mcck_pending)
273 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
274 bo BASED(sysc_reschedule)
275 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
276 bnz BASED(sysc_sigpending)
277 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
278 bo BASED(sysc_restart)
279 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
280 bo BASED(sysc_singlestep)
284 # _TIF_NEED_RESCHED is set, call schedule
287 l %r1,BASED(.Lschedule)
288 la %r14,BASED(sysc_work_loop)
289 br %r1 # call scheduler
292 # _TIF_MCCK_PENDING is set, call handler
295 l %r1,BASED(.Ls390_handle_mcck)
296 la %r14,BASED(sysc_work_loop)
297 br %r1 # TIF bit will be cleared by handler
300 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
303 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
304 la %r2,SP_PTREGS(%r15) # load pt_regs
305 l %r1,BASED(.Ldo_signal)
306 basr %r14,%r1 # call do_signal
307 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
308 bo BASED(sysc_restart)
309 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
310 bo BASED(sysc_singlestep)
311 b BASED(sysc_work_loop)
314 # _TIF_RESTART_SVC is set, set up registers and restart svc
317 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
318 l %r7,SP_R2(%r15) # load new svc number
320 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
321 lm %r2,%r6,SP_R2(%r15) # load svc arguments
322 b BASED(sysc_do_restart) # restart svc
325 # _TIF_SINGLE_STEP is set, call do_single_step
328 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
329 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
330 la %r2,SP_PTREGS(%r15) # address of register-save area
331 l %r1,BASED(.Lhandle_per) # load adr. of per handler
332 la %r14,BASED(sysc_return) # load adr. of system return
333 br %r1 # branch to do_single_step
336 # call trace before and after sys_call
340 la %r2,SP_PTREGS(%r15) # load pt_regs
345 clc SP_R2(4,%r15),BASED(.Lnr_syscalls)
346 bnl BASED(sysc_tracenogo)
347 l %r8,BASED(.Lsysc_table)
348 l %r7,SP_R2(%r15) # strace might have changed the
349 sll %r7,2 # system call
352 lm %r3,%r6,SP_R3(%r15)
353 l %r2,SP_ORIG_R2(%r15)
354 basr %r14,%r8 # call sys_xxx
355 st %r2,SP_R2(%r15) # store return value
357 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
358 bz BASED(sysc_return)
360 la %r2,SP_PTREGS(%r15) # load pt_regs
362 la %r14,BASED(sysc_return)
366 # a new process exits the kernel with ret_from_fork
370 l %r13,__LC_SVC_NEW_PSW+4
371 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
372 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
374 st %r15,SP_R15(%r15) # store stack pointer for new kthread
375 0: l %r1,BASED(.Lschedtail)
378 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
382 # kernel_execve function needs to deal with pt_regs that is not
387 stm %r12,%r15,48(%r15)
389 l %r13,__LC_SVC_NEW_PSW+4
390 s %r15,BASED(.Lc_spsize)
391 st %r14,__SF_BACKCHAIN(%r15)
392 la %r12,SP_PTREGS(%r15)
393 xc 0(__PT_SIZE,%r12),0(%r12)
394 l %r1,BASED(.Ldo_execve)
399 a %r15,BASED(.Lc_spsize)
400 lm %r12,%r15,48(%r15)
403 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
404 l %r15,__LC_KERNEL_STACK # load ksp
405 s %r15,BASED(.Lc_spsize) # make room for registers & psw
406 l %r9,__LC_THREAD_INFO
407 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
408 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
409 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
410 l %r1,BASED(.Lexecve_tail)
415 * Program check handler routine
418 .globl pgm_check_handler
421 * First we need to check for a special case:
422 * Single stepping an instruction that disables the PER event mask will
423 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
424 * For a single stepped SVC the program check handler gets control after
425 * the SVC new PSW has been loaded. But we want to execute the SVC first and
426 * then handle the PER event. Therefore we update the SVC old PSW to point
427 * to the pgm_check_handler and branch to the SVC handler after we checked
428 * if we have to load the kernel stack register.
429 * For every other possible cause for PER event without the PER mask set
430 * we just ignore the PER event (FIXME: is there anything we have to do
433 STORE_TIMER __LC_SYNC_ENTER_TIMER
434 SAVE_ALL_BASE __LC_SAVE_AREA
435 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
436 bnz BASED(pgm_per) # got per exception -> special case
437 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
438 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
439 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
440 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
441 bz BASED(pgm_no_vtime)
442 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
443 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
444 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
447 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
448 l %r3,__LC_PGM_ILC # load program interruption code
452 l %r7,BASED(.Ljump_table)
454 l %r7,0(%r8,%r7) # load address of handler routine
455 la %r2,SP_PTREGS(%r15) # address of register-save area
456 la %r14,BASED(sysc_return)
457 br %r7 # branch to interrupt-handler
460 # handle per exception
463 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
464 bnz BASED(pgm_per_std) # ok, normal per event from user space
465 # ok its one of the special cases, now we need to find out which one
466 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
468 # no interesting special case, ignore PER event
469 lm %r12,%r15,__LC_SAVE_AREA
473 # Normal per exception
476 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
477 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
478 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
479 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
480 bz BASED(pgm_no_vtime2)
481 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
482 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
483 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
486 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
488 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
489 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
490 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
491 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
492 tm SP_PSW+1(%r15),0x01 # kernel per event ?
494 l %r3,__LC_PGM_ILC # load program interruption code
496 nr %r8,%r3 # clear per-event-bit and ilc
497 be BASED(sysc_return) # only per or per+check ?
501 # it was a single stepped SVC that is causing all the trouble
504 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
505 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
506 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
507 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
508 bz BASED(pgm_no_vtime3)
509 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
510 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
511 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
514 lh %r7,0x8a # get svc number from lowcore
515 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
517 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
518 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
519 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
520 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
522 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
526 # per was called from kernel, must be kprobes
529 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
530 la %r2,SP_PTREGS(%r15) # address of register-save area
531 l %r1,BASED(.Lhandle_per) # load adr. of per handler
532 la %r14,BASED(sysc_leave) # load adr. of system return
533 br %r1 # branch to do_single_step
536 * IO interrupt handler routine
539 .globl io_int_handler
541 STORE_TIMER __LC_ASYNC_ENTER_TIMER
543 SAVE_ALL_BASE __LC_SAVE_AREA+16
544 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
545 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
546 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
547 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
548 bz BASED(io_no_vtime)
549 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
550 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
551 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
554 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
556 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
557 la %r2,SP_PTREGS(%r15) # address of register-save area
558 basr %r14,%r1 # branch to standard irq handler
562 tm SP_PSW+1(%r15),0x01 # returning to user ?
563 #ifdef CONFIG_PREEMPT
564 bno BASED(io_preempt) # no -> check for preemptive scheduling
566 bno BASED(io_leave) # no-> skip resched & signal
568 tm __TI_flags+3(%r9),_TIF_WORK_INT
569 bnz BASED(io_work) # there is work to do (signals etc.)
571 RESTORE_ALL __LC_RETURN_PSW,0
574 #ifdef CONFIG_PREEMPT
576 icm %r0,15,__TI_precount(%r9)
579 s %r1,BASED(.Lc_spsize)
580 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
581 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
584 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
586 mvc __TI_precount(4,%r9),BASED(.Lc_pactive)
587 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
588 l %r1,BASED(.Lschedule)
589 basr %r14,%r1 # call schedule
590 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
591 xc __TI_precount(4,%r9),__TI_precount(%r9)
592 b BASED(io_resume_loop)
596 # switch to kernel stack, then check the TIF bits
599 l %r1,__LC_KERNEL_STACK
600 s %r1,BASED(.Lc_spsize)
601 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
602 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
605 # One of the work bits is on. Find out which one.
606 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGMASK, _TIF_NEED_RESCHED
607 # and _TIF_MCCK_PENDING
610 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
611 bo BASED(io_mcck_pending)
612 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
613 bo BASED(io_reschedule)
614 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
615 bnz BASED(io_sigpending)
619 # _TIF_MCCK_PENDING is set, call handler
622 l %r1,BASED(.Ls390_handle_mcck)
623 la %r14,BASED(io_work_loop)
624 br %r1 # TIF bit will be cleared by handler
627 # _TIF_NEED_RESCHED is set, call schedule
630 l %r1,BASED(.Lschedule)
631 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
632 basr %r14,%r1 # call scheduler
633 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
634 tm __TI_flags+3(%r9),_TIF_WORK_INT
635 bz BASED(io_leave) # there is no work to do
636 b BASED(io_work_loop)
639 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
642 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
643 la %r2,SP_PTREGS(%r15) # load pt_regs
644 l %r1,BASED(.Ldo_signal)
645 basr %r14,%r1 # call do_signal
646 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
647 b BASED(io_work_loop)
650 * External interrupt handler routine
653 .globl ext_int_handler
655 STORE_TIMER __LC_ASYNC_ENTER_TIMER
657 SAVE_ALL_BASE __LC_SAVE_AREA+16
658 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
659 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
660 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
661 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
662 bz BASED(ext_no_vtime)
663 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
664 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
665 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
668 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
670 la %r2,SP_PTREGS(%r15) # address of register-save area
671 lh %r3,__LC_EXT_INT_CODE # get interruption code
672 l %r1,BASED(.Ldo_extint)
680 * Machine check handler routines
683 .globl mcck_int_handler
685 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
686 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
687 SAVE_ALL_BASE __LC_SAVE_AREA+32
688 la %r12,__LC_MCK_OLD_PSW
689 tm __LC_MCCK_CODE,0x80 # system damage?
690 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
691 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
692 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
693 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
694 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
696 la %r14,__LC_SYNC_ENTER_TIMER
697 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
699 la %r14,__LC_ASYNC_ENTER_TIMER
700 0: clc 0(8,%r14),__LC_EXIT_TIMER
702 la %r14,__LC_EXIT_TIMER
703 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
705 la %r14,__LC_LAST_UPDATE_TIMER
707 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
710 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
711 bno BASED(mcck_int_main) # no -> skip cleanup critical
712 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
713 bnz BASED(mcck_int_main) # from user -> load async stack
714 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
715 bhe BASED(mcck_int_main)
716 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
717 bl BASED(mcck_int_main)
718 l %r14,BASED(.Lcleanup_critical)
721 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
725 l %r15,__LC_PANIC_STACK # load panic stack
726 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
727 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
728 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
729 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
730 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
731 bz BASED(mcck_no_vtime)
732 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
733 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
734 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
737 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
738 la %r2,SP_PTREGS(%r15) # load pt_regs
739 l %r1,BASED(.Ls390_mcck)
740 basr %r14,%r1 # call machine check handler
741 tm SP_PSW+1(%r15),0x01 # returning to user ?
742 bno BASED(mcck_return)
743 l %r1,__LC_KERNEL_STACK # switch to kernel stack
744 s %r1,BASED(.Lc_spsize)
745 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
746 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
748 stosm __SF_EMPTY(%r15),0x04 # turn dat on
749 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
750 bno BASED(mcck_return)
752 l %r1,BASED(.Ls390_handle_mcck)
753 basr %r14,%r1 # call machine check handler
756 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
757 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
758 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
759 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
760 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
762 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
764 lpsw __LC_RETURN_MCCK_PSW # back to caller
767 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
768 lpsw __LC_RETURN_MCCK_PSW # back to caller
770 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
774 * Restart interruption handler, kick starter for additional CPUs
776 .globl restart_int_handler
778 l %r15,__LC_SAVE_AREA+60 # load ksp
779 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
780 lam %a0,%a15,__LC_AREGS_SAVE_AREA
781 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
782 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
784 l %r14,restart_addr-.(%r14)
785 br %r14 # branch to start_secondary
787 .long start_secondary
790 * If we do not run with SMP enabled, let the new CPU crash ...
792 .globl restart_int_handler
796 lpsw restart_crash-restart_base(%r1)
799 .long 0x000a0000,0x00000000
803 #ifdef CONFIG_CHECK_STACK
805 * The synchronous or the asynchronous stack overflowed. We are dead.
806 * No need to properly save the registers, we are going to panic anyway.
807 * Setup a pt_regs so that show_trace can provide a good call trace.
810 l %r15,__LC_PANIC_STACK # change to panic stack
811 sl %r15,BASED(.Lc_spsize)
812 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
813 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
814 la %r1,__LC_SAVE_AREA
815 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
817 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
819 la %r1,__LC_SAVE_AREA+16
820 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
821 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
822 l %r1,BASED(1f) # branch to kernel_stack_overflow
823 la %r2,SP_PTREGS(%r15) # load pt_regs
825 1: .long kernel_stack_overflow
828 cleanup_table_system_call:
829 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
830 cleanup_table_sysc_return:
831 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
832 cleanup_table_sysc_leave:
833 .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000
834 cleanup_table_sysc_work_loop:
835 .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000
836 cleanup_table_io_return:
837 .long io_return + 0x80000000, io_leave + 0x80000000
838 cleanup_table_io_leave:
839 .long io_leave + 0x80000000, io_done + 0x80000000
840 cleanup_table_io_work_loop:
841 .long io_work_loop + 0x80000000, io_mcck_pending + 0x80000000
844 clc 4(4,%r12),BASED(cleanup_table_system_call)
846 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
847 bl BASED(cleanup_system_call)
849 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
851 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
852 bl BASED(cleanup_sysc_return)
854 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
856 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
857 bl BASED(cleanup_sysc_leave)
859 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
861 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
862 bl BASED(cleanup_sysc_return)
864 clc 4(4,%r12),BASED(cleanup_table_io_return)
866 clc 4(4,%r12),BASED(cleanup_table_io_return+4)
867 bl BASED(cleanup_io_return)
869 clc 4(4,%r12),BASED(cleanup_table_io_leave)
871 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
872 bl BASED(cleanup_io_leave)
874 clc 4(4,%r12),BASED(cleanup_table_io_work_loop)
876 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4)
877 bl BASED(cleanup_io_return)
882 mvc __LC_RETURN_PSW(8),0(%r12)
883 c %r12,BASED(.Lmck_old_psw)
885 la %r12,__LC_SAVE_AREA+16
887 0: la %r12,__LC_SAVE_AREA+32
889 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
890 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
892 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
893 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
894 bhe BASED(cleanup_vtime)
896 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
898 mvc __LC_SAVE_AREA(16),0(%r12)
900 st %r12,__LC_SAVE_AREA+48 # argh
901 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
902 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
903 l %r12,__LC_SAVE_AREA+48 # argh
906 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
908 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
909 bhe BASED(cleanup_stime)
910 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
911 bz BASED(cleanup_novtime)
912 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
914 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
915 bh BASED(cleanup_update)
916 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
918 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
921 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
922 la %r12,__LC_RETURN_PSW
924 cleanup_system_call_insn:
925 .long sysc_saveall + 0x80000000
926 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
927 .long system_call + 0x80000000
928 .long sysc_vtime + 0x80000000
929 .long sysc_stime + 0x80000000
930 .long sysc_update + 0x80000000
934 mvc __LC_RETURN_PSW(4),0(%r12)
935 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
936 la %r12,__LC_RETURN_PSW
940 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
942 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
943 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
944 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
947 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
948 c %r12,BASED(.Lmck_old_psw)
950 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
952 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
953 1: lm %r0,%r11,SP_R0(%r15)
955 2: la %r12,__LC_RETURN_PSW
957 cleanup_sysc_leave_insn:
958 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
959 .long sysc_leave + 14 + 0x80000000
961 .long sysc_leave + 10 + 0x80000000
964 mvc __LC_RETURN_PSW(4),0(%r12)
965 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
966 la %r12,__LC_RETURN_PSW
970 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
972 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
973 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
974 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
977 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
978 c %r12,BASED(.Lmck_old_psw)
980 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
982 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
983 1: lm %r0,%r11,SP_R0(%r15)
985 2: la %r12,__LC_RETURN_PSW
987 cleanup_io_leave_insn:
988 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
989 .long io_leave + 18 + 0x80000000
991 .long io_leave + 14 + 0x80000000
997 .Lc_spsize: .long SP_SIZE
998 .Lc_overhead: .long STACK_FRAME_OVERHEAD
999 .Lc_pactive: .long PREEMPT_ACTIVE
1000 .Lnr_syscalls: .long NR_syscalls
1001 .L0x018: .short 0x018
1002 .L0x020: .short 0x020
1003 .L0x028: .short 0x028
1004 .L0x030: .short 0x030
1005 .L0x038: .short 0x038
1011 .Ls390_mcck: .long s390_do_machine_check
1013 .long s390_handle_mcck
1014 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1015 .Ldo_IRQ: .long do_IRQ
1016 .Ldo_extint: .long do_extint
1017 .Ldo_signal: .long do_signal
1018 .Lhandle_per: .long do_single_step
1019 .Ldo_execve: .long do_execve
1020 .Lexecve_tail: .long execve_tail
1021 .Ljump_table: .long pgm_check_table
1022 .Lschedule: .long schedule
1023 .Ltrace: .long syscall_trace
1024 .Lschedtail: .long schedule_tail
1025 .Lsysc_table: .long sys_call_table
1026 #ifdef CONFIG_TRACE_IRQFLAGS
1027 .Ltrace_irq_on: .long trace_hardirqs_on
1029 .long trace_hardirqs_off
1032 .long __critical_start + 0x80000000
1034 .long __critical_end + 0x80000000
1036 .long cleanup_critical
1038 .section .rodata, "a"
1039 #define SYSCALL(esa,esame,emu) .long esa
1041 #include "syscalls.S"