2 * Pinmuxed GPIO support for SuperH.
4 * Copyright (C) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
11 #include <linux/errno.h>
12 #include <linux/kernel.h>
13 #include <linux/list.h>
14 #include <linux/module.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
18 #include <linux/irq.h>
19 #include <linux/bitops.h>
20 #include <linux/gpio.h>
22 static struct pinmux_info *registered_gpio;
24 static struct pinmux_info *gpio_controller(unsigned gpio)
29 if (gpio < registered_gpio->first_gpio)
32 if (gpio > registered_gpio->last_gpio)
35 return registered_gpio;
38 static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
40 if (enum_id < r->begin)
49 static int read_write_reg(unsigned long reg, unsigned long reg_width,
50 unsigned long field_width, unsigned long in_pos,
51 unsigned long value, int do_write)
53 unsigned long data, mask, pos;
56 mask = (1 << field_width) - 1;
57 pos = reg_width - ((in_pos + 1) * field_width);
60 pr_info("%s, addr = %lx, value = %ld, pos = %ld, "
61 "r_width = %ld, f_width = %ld\n",
62 do_write ? "write" : "read", reg, value, pos,
63 reg_width, field_width);
79 return (data >> pos) & mask;
81 data &= ~(mask << pos);
98 static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
99 struct pinmux_data_reg **drp, int *bitp)
101 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
102 struct pinmux_data_reg *data_reg;
105 if (!enum_in_range(enum_id, &gpioc->data))
110 data_reg = gpioc->data_regs + k;
112 if (!data_reg->reg_width)
115 for (n = 0; n < data_reg->reg_width; n++) {
116 if (data_reg->enum_ids[n] == enum_id) {
129 static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
130 struct pinmux_cfg_reg **crp, int *indexp,
131 unsigned long **cntp)
133 struct pinmux_cfg_reg *config_reg;
134 unsigned long r_width, f_width;
139 config_reg = gpioc->cfg_regs + k;
141 r_width = config_reg->reg_width;
142 f_width = config_reg->field_width;
146 for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) {
147 if (config_reg->enum_ids[n] == enum_id) {
150 *cntp = &config_reg->cnt[n / (1 << f_width)];
160 static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
161 int pos, pinmux_enum_t *enum_idp)
163 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
164 pinmux_enum_t *data = gpioc->gpio_data;
167 if (!enum_in_range(enum_id, &gpioc->data)) {
168 if (!enum_in_range(enum_id, &gpioc->mark)) {
169 pr_err("non data/mark enum_id for gpio %d\n", gpio);
175 *enum_idp = data[pos + 1];
179 for (k = 0; k < gpioc->gpio_data_size; k++) {
180 if (data[k] == enum_id) {
181 *enum_idp = data[k + 1];
186 pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
190 static int write_config_reg(struct pinmux_info *gpioc,
191 struct pinmux_cfg_reg *crp,
194 unsigned long ncomb, pos, value;
196 ncomb = 1 << crp->field_width;
198 value = index % ncomb;
200 return read_write_reg(crp->reg, crp->reg_width,
201 crp->field_width, pos, value, 1);
204 static int check_config_reg(struct pinmux_info *gpioc,
205 struct pinmux_cfg_reg *crp,
208 unsigned long ncomb, pos, value;
210 ncomb = 1 << crp->field_width;
212 value = index % ncomb;
214 if (read_write_reg(crp->reg, crp->reg_width,
215 crp->field_width, pos, 0, 0) == value)
221 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
223 int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
224 int pinmux_type, int cfg_mode)
226 struct pinmux_cfg_reg *cr = NULL;
227 pinmux_enum_t enum_id;
228 struct pinmux_range *range;
229 int in_range, pos, index;
232 switch (pinmux_type) {
234 case PINMUX_TYPE_FUNCTION:
238 case PINMUX_TYPE_OUTPUT:
239 range = &gpioc->output;
242 case PINMUX_TYPE_INPUT:
243 range = &gpioc->input;
246 case PINMUX_TYPE_INPUT_PULLUP:
247 range = &gpioc->input_pu;
250 case PINMUX_TYPE_INPUT_PULLDOWN:
251 range = &gpioc->input_pd;
262 pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
269 in_range = enum_in_range(enum_id, &gpioc->function);
270 if (!in_range && range)
271 in_range = enum_in_range(enum_id, range);
276 if (get_config_reg(gpioc, enum_id, &cr, &index, &cntp) != 0)
280 case GPIO_CFG_DRYRUN:
281 if (!*cntp || !check_config_reg(gpioc, cr, index))
286 if (write_config_reg(gpioc, cr, index) != 0)
302 static DEFINE_SPINLOCK(gpio_lock);
304 int __gpio_request(unsigned gpio)
306 struct pinmux_info *gpioc = gpio_controller(gpio);
307 struct pinmux_data_reg *dummy;
309 int i, ret, pinmux_type;
316 spin_lock_irqsave(&gpio_lock, flags);
318 if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
321 /* setup pin function here if no data is associated with pin */
323 if (get_data_reg(gpioc, gpio, &dummy, &i) != 0)
324 pinmux_type = PINMUX_TYPE_FUNCTION;
326 pinmux_type = PINMUX_TYPE_GPIO;
328 if (pinmux_type == PINMUX_TYPE_FUNCTION) {
329 if (pinmux_config_gpio(gpioc, gpio,
331 GPIO_CFG_DRYRUN) != 0)
334 if (pinmux_config_gpio(gpioc, gpio,
340 gpioc->gpios[gpio].flags = pinmux_type;
344 spin_unlock_irqrestore(&gpio_lock, flags);
348 EXPORT_SYMBOL(__gpio_request);
350 void gpio_free(unsigned gpio)
352 struct pinmux_info *gpioc = gpio_controller(gpio);
359 spin_lock_irqsave(&gpio_lock, flags);
361 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
362 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
363 gpioc->gpios[gpio].flags = PINMUX_TYPE_NONE;
365 spin_unlock_irqrestore(&gpio_lock, flags);
367 EXPORT_SYMBOL(gpio_free);
369 static int pinmux_direction(struct pinmux_info *gpioc,
370 unsigned gpio, int new_pinmux_type)
372 int ret, pinmux_type;
375 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
377 switch (pinmux_type) {
378 case PINMUX_TYPE_GPIO:
380 case PINMUX_TYPE_OUTPUT:
381 case PINMUX_TYPE_INPUT:
382 case PINMUX_TYPE_INPUT_PULLUP:
383 case PINMUX_TYPE_INPUT_PULLDOWN:
384 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
390 if (pinmux_config_gpio(gpioc, gpio,
392 GPIO_CFG_DRYRUN) != 0)
395 if (pinmux_config_gpio(gpioc, gpio,
400 gpioc->gpios[gpio].flags = new_pinmux_type;
407 int gpio_direction_input(unsigned gpio)
409 struct pinmux_info *gpioc = gpio_controller(gpio);
416 spin_lock_irqsave(&gpio_lock, flags);
417 ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_INPUT);
418 spin_unlock_irqrestore(&gpio_lock, flags);
422 EXPORT_SYMBOL(gpio_direction_input);
424 static int __gpio_get_set_value(struct pinmux_info *gpioc,
425 unsigned gpio, int value,
428 struct pinmux_data_reg *dr = NULL;
431 if (get_data_reg(gpioc, gpio, &dr, &bit) != 0)
434 value = read_write_reg(dr->reg, dr->reg_width,
435 1, bit, value, do_write);
440 int gpio_direction_output(unsigned gpio, int value)
442 struct pinmux_info *gpioc = gpio_controller(gpio);
449 spin_lock_irqsave(&gpio_lock, flags);
450 __gpio_get_set_value(gpioc, gpio, value, 1);
451 ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_OUTPUT);
452 spin_unlock_irqrestore(&gpio_lock, flags);
456 EXPORT_SYMBOL(gpio_direction_output);
458 int gpio_get_value(unsigned gpio)
460 struct pinmux_info *gpioc = gpio_controller(gpio);
467 spin_lock_irqsave(&gpio_lock, flags);
468 value = __gpio_get_set_value(gpioc, gpio, 0, 0);
469 spin_unlock_irqrestore(&gpio_lock, flags);
474 EXPORT_SYMBOL(gpio_get_value);
476 void gpio_set_value(unsigned gpio, int value)
478 struct pinmux_info *gpioc = gpio_controller(gpio);
484 spin_lock_irqsave(&gpio_lock, flags);
485 __gpio_get_set_value(gpioc, gpio, value, 1);
486 spin_unlock_irqrestore(&gpio_lock, flags);
489 EXPORT_SYMBOL(gpio_set_value);
491 int register_pinmux(struct pinmux_info *pip)
493 registered_gpio = pip;
494 pr_info("pinmux: %s handling gpio %d -> %d\n",
495 pip->name, pip->first_gpio, pip->last_gpio);