2 * Procedures for creating, accessing and interpreting the device tree.
4 * Paul Mackerras August 1996.
5 * Copyright (C) 1996-2005 Paul Mackerras.
7 * Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8 * {engebret|bergner}@us.ibm.com
10 * Adapted for sparc64 by David S. Miller davem@davemloft.net
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
18 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
22 #include <linux/bootmem.h>
23 #include <linux/module.h>
26 #include <asm/of_device.h>
27 #include <asm/oplib.h>
32 static struct device_node *allnodes;
34 /* use when traversing tree through the allnext, child, sibling,
35 * or parent members of struct device_node.
37 static DEFINE_RWLOCK(devtree_lock);
39 int of_device_is_compatible(const struct device_node *device,
45 cp = of_get_property(device, "compatible", &cplen);
49 if (strncmp(cp, compat, strlen(compat)) == 0)
58 EXPORT_SYMBOL(of_device_is_compatible);
60 struct device_node *of_get_parent(const struct device_node *node)
62 struct device_node *np;
71 EXPORT_SYMBOL(of_get_parent);
73 struct device_node *of_get_next_child(const struct device_node *node,
74 struct device_node *prev)
76 struct device_node *next;
78 next = prev ? prev->sibling : node->child;
79 for (; next != 0; next = next->sibling) {
85 EXPORT_SYMBOL(of_get_next_child);
87 struct device_node *of_find_node_by_path(const char *path)
89 struct device_node *np = allnodes;
91 for (; np != 0; np = np->allnext) {
92 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
98 EXPORT_SYMBOL(of_find_node_by_path);
100 struct device_node *of_find_node_by_phandle(phandle handle)
102 struct device_node *np;
104 for (np = allnodes; np != 0; np = np->allnext)
105 if (np->node == handle)
110 EXPORT_SYMBOL(of_find_node_by_phandle);
112 struct device_node *of_find_node_by_name(struct device_node *from,
115 struct device_node *np;
117 np = from ? from->allnext : allnodes;
118 for (; np != NULL; np = np->allnext)
119 if (np->name != NULL && strcmp(np->name, name) == 0)
124 EXPORT_SYMBOL(of_find_node_by_name);
126 struct device_node *of_find_node_by_type(struct device_node *from,
129 struct device_node *np;
131 np = from ? from->allnext : allnodes;
132 for (; np != 0; np = np->allnext)
133 if (np->type != 0 && strcmp(np->type, type) == 0)
138 EXPORT_SYMBOL(of_find_node_by_type);
140 struct device_node *of_find_compatible_node(struct device_node *from,
141 const char *type, const char *compatible)
143 struct device_node *np;
145 np = from ? from->allnext : allnodes;
146 for (; np != 0; np = np->allnext) {
148 && !(np->type != 0 && strcmp(np->type, type) == 0))
150 if (of_device_is_compatible(np, compatible))
156 EXPORT_SYMBOL(of_find_compatible_node);
158 struct property *of_find_property(const struct device_node *np,
164 for (pp = np->properties; pp != 0; pp = pp->next) {
165 if (strcasecmp(pp->name, name) == 0) {
173 EXPORT_SYMBOL(of_find_property);
176 * Find a property with a given name for a given node
177 * and return the value.
179 const void *of_get_property(const struct device_node *np, const char *name,
182 struct property *pp = of_find_property(np,name,lenp);
183 return pp ? pp->value : NULL;
185 EXPORT_SYMBOL(of_get_property);
187 int of_getintprop_default(struct device_node *np, const char *name, int def)
189 struct property *prop;
192 prop = of_find_property(np, name, &len);
193 if (!prop || len != 4)
196 return *(int *) prop->value;
198 EXPORT_SYMBOL(of_getintprop_default);
200 int of_n_addr_cells(struct device_node *np)
206 ip = of_get_property(np, "#address-cells", NULL);
209 } while (np->parent);
210 /* No #address-cells property for the root node, default to 2 */
213 EXPORT_SYMBOL(of_n_addr_cells);
215 int of_n_size_cells(struct device_node *np)
221 ip = of_get_property(np, "#size-cells", NULL);
224 } while (np->parent);
225 /* No #size-cells property for the root node, default to 1 */
228 EXPORT_SYMBOL(of_n_size_cells);
230 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
232 struct property **prevp;
236 new_val = kmalloc(len, GFP_KERNEL);
240 memcpy(new_val, val, len);
244 write_lock(&devtree_lock);
245 prevp = &dp->properties;
247 struct property *prop = *prevp;
249 if (!strcasecmp(prop->name, name)) {
250 void *old_val = prop->value;
253 ret = prom_setprop(dp->node, name, val, len);
256 prop->value = new_val;
259 if (OF_IS_DYNAMIC(prop))
262 OF_MARK_DYNAMIC(prop);
268 prevp = &(*prevp)->next;
270 write_unlock(&devtree_lock);
272 /* XXX Upate procfs if necessary... */
276 EXPORT_SYMBOL(of_set_property);
278 static unsigned int prom_early_allocated;
280 static void * __init prom_early_alloc(unsigned long size)
284 ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
286 memset(ret, 0, size);
288 prom_early_allocated += size;
294 /* PSYCHO interrupt mapping support. */
295 #define PSYCHO_IMAP_A_SLOT0 0x0c00UL
296 #define PSYCHO_IMAP_B_SLOT0 0x0c20UL
297 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
299 unsigned int bus = (ino & 0x10) >> 4;
300 unsigned int slot = (ino & 0x0c) >> 2;
303 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
305 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
308 #define PSYCHO_IMAP_SCSI 0x1000UL
309 #define PSYCHO_IMAP_ETH 0x1008UL
310 #define PSYCHO_IMAP_BPP 0x1010UL
311 #define PSYCHO_IMAP_AU_REC 0x1018UL
312 #define PSYCHO_IMAP_AU_PLAY 0x1020UL
313 #define PSYCHO_IMAP_PFAIL 0x1028UL
314 #define PSYCHO_IMAP_KMS 0x1030UL
315 #define PSYCHO_IMAP_FLPY 0x1038UL
316 #define PSYCHO_IMAP_SHW 0x1040UL
317 #define PSYCHO_IMAP_KBD 0x1048UL
318 #define PSYCHO_IMAP_MS 0x1050UL
319 #define PSYCHO_IMAP_SER 0x1058UL
320 #define PSYCHO_IMAP_TIM0 0x1060UL
321 #define PSYCHO_IMAP_TIM1 0x1068UL
322 #define PSYCHO_IMAP_UE 0x1070UL
323 #define PSYCHO_IMAP_CE 0x1078UL
324 #define PSYCHO_IMAP_A_ERR 0x1080UL
325 #define PSYCHO_IMAP_B_ERR 0x1088UL
326 #define PSYCHO_IMAP_PMGMT 0x1090UL
327 #define PSYCHO_IMAP_GFX 0x1098UL
328 #define PSYCHO_IMAP_EUPA 0x10a0UL
330 static unsigned long __psycho_onboard_imap_off[] = {
331 /*0x20*/ PSYCHO_IMAP_SCSI,
332 /*0x21*/ PSYCHO_IMAP_ETH,
333 /*0x22*/ PSYCHO_IMAP_BPP,
334 /*0x23*/ PSYCHO_IMAP_AU_REC,
335 /*0x24*/ PSYCHO_IMAP_AU_PLAY,
336 /*0x25*/ PSYCHO_IMAP_PFAIL,
337 /*0x26*/ PSYCHO_IMAP_KMS,
338 /*0x27*/ PSYCHO_IMAP_FLPY,
339 /*0x28*/ PSYCHO_IMAP_SHW,
340 /*0x29*/ PSYCHO_IMAP_KBD,
341 /*0x2a*/ PSYCHO_IMAP_MS,
342 /*0x2b*/ PSYCHO_IMAP_SER,
343 /*0x2c*/ PSYCHO_IMAP_TIM0,
344 /*0x2d*/ PSYCHO_IMAP_TIM1,
345 /*0x2e*/ PSYCHO_IMAP_UE,
346 /*0x2f*/ PSYCHO_IMAP_CE,
347 /*0x30*/ PSYCHO_IMAP_A_ERR,
348 /*0x31*/ PSYCHO_IMAP_B_ERR,
349 /*0x32*/ PSYCHO_IMAP_PMGMT,
350 /*0x33*/ PSYCHO_IMAP_GFX,
351 /*0x34*/ PSYCHO_IMAP_EUPA,
353 #define PSYCHO_ONBOARD_IRQ_BASE 0x20
354 #define PSYCHO_ONBOARD_IRQ_LAST 0x34
355 #define psycho_onboard_imap_offset(__ino) \
356 __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
358 #define PSYCHO_ICLR_A_SLOT0 0x1400UL
359 #define PSYCHO_ICLR_SCSI 0x1800UL
361 #define psycho_iclr_offset(ino) \
362 ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
363 (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
365 static unsigned int psycho_irq_build(struct device_node *dp,
369 unsigned long controller_regs = (unsigned long) _data;
370 unsigned long imap, iclr;
371 unsigned long imap_off, iclr_off;
375 if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
377 imap_off = psycho_pcislot_imap_offset(ino);
380 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
381 prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
384 imap_off = psycho_onboard_imap_offset(ino);
387 /* Now build the IRQ bucket. */
388 imap = controller_regs + imap_off;
391 iclr_off = psycho_iclr_offset(ino);
392 iclr = controller_regs + iclr_off;
395 if ((ino & 0x20) == 0)
396 inofixup = ino & 0x03;
398 return build_irq(inofixup, iclr, imap);
401 static void psycho_irq_trans_init(struct device_node *dp)
403 const struct linux_prom64_registers *regs;
405 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
406 dp->irq_trans->irq_build = psycho_irq_build;
408 regs = of_get_property(dp, "reg", NULL);
409 dp->irq_trans->data = (void *) regs[2].phys_addr;
412 #define sabre_read(__reg) \
414 __asm__ __volatile__("ldxa [%1] %2, %0" \
416 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
421 struct sabre_irq_data {
422 unsigned long controller_regs;
423 unsigned int pci_first_busno;
425 #define SABRE_CONFIGSPACE 0x001000000UL
426 #define SABRE_WRSYNC 0x1c20UL
428 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
429 (CONFIG_SPACE | (1UL << 24))
430 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \
431 (((unsigned long)(BUS) << 16) | \
432 ((unsigned long)(DEVFN) << 8) | \
433 ((unsigned long)(REG)))
435 /* When a device lives behind a bridge deeper in the PCI bus topology
436 * than APB, a special sequence must run to make sure all pending DMA
437 * transfers at the time of IRQ delivery are visible in the coherency
438 * domain by the cpu. This sequence is to perform a read on the far
439 * side of the non-APB bridge, then perform a read of Sabre's DMA
440 * write-sync register.
442 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
444 unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
445 struct sabre_irq_data *irq_data = _arg2;
446 unsigned long controller_regs = irq_data->controller_regs;
447 unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
448 unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
449 unsigned int bus, devfn;
452 config_space = SABRE_CONFIG_BASE(config_space);
454 bus = (phys_hi >> 16) & 0xff;
455 devfn = (phys_hi >> 8) & 0xff;
457 config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
459 __asm__ __volatile__("membar #Sync\n\t"
460 "lduha [%1] %2, %0\n\t"
463 : "r" ((u16 *) config_space),
464 "i" (ASI_PHYS_BYPASS_EC_E_L)
467 sabre_read(sync_reg);
470 #define SABRE_IMAP_A_SLOT0 0x0c00UL
471 #define SABRE_IMAP_B_SLOT0 0x0c20UL
472 #define SABRE_IMAP_SCSI 0x1000UL
473 #define SABRE_IMAP_ETH 0x1008UL
474 #define SABRE_IMAP_BPP 0x1010UL
475 #define SABRE_IMAP_AU_REC 0x1018UL
476 #define SABRE_IMAP_AU_PLAY 0x1020UL
477 #define SABRE_IMAP_PFAIL 0x1028UL
478 #define SABRE_IMAP_KMS 0x1030UL
479 #define SABRE_IMAP_FLPY 0x1038UL
480 #define SABRE_IMAP_SHW 0x1040UL
481 #define SABRE_IMAP_KBD 0x1048UL
482 #define SABRE_IMAP_MS 0x1050UL
483 #define SABRE_IMAP_SER 0x1058UL
484 #define SABRE_IMAP_UE 0x1070UL
485 #define SABRE_IMAP_CE 0x1078UL
486 #define SABRE_IMAP_PCIERR 0x1080UL
487 #define SABRE_IMAP_GFX 0x1098UL
488 #define SABRE_IMAP_EUPA 0x10a0UL
489 #define SABRE_ICLR_A_SLOT0 0x1400UL
490 #define SABRE_ICLR_B_SLOT0 0x1480UL
491 #define SABRE_ICLR_SCSI 0x1800UL
492 #define SABRE_ICLR_ETH 0x1808UL
493 #define SABRE_ICLR_BPP 0x1810UL
494 #define SABRE_ICLR_AU_REC 0x1818UL
495 #define SABRE_ICLR_AU_PLAY 0x1820UL
496 #define SABRE_ICLR_PFAIL 0x1828UL
497 #define SABRE_ICLR_KMS 0x1830UL
498 #define SABRE_ICLR_FLPY 0x1838UL
499 #define SABRE_ICLR_SHW 0x1840UL
500 #define SABRE_ICLR_KBD 0x1848UL
501 #define SABRE_ICLR_MS 0x1850UL
502 #define SABRE_ICLR_SER 0x1858UL
503 #define SABRE_ICLR_UE 0x1870UL
504 #define SABRE_ICLR_CE 0x1878UL
505 #define SABRE_ICLR_PCIERR 0x1880UL
507 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
509 unsigned int bus = (ino & 0x10) >> 4;
510 unsigned int slot = (ino & 0x0c) >> 2;
513 return SABRE_IMAP_A_SLOT0 + (slot * 8);
515 return SABRE_IMAP_B_SLOT0 + (slot * 8);
518 static unsigned long __sabre_onboard_imap_off[] = {
519 /*0x20*/ SABRE_IMAP_SCSI,
520 /*0x21*/ SABRE_IMAP_ETH,
521 /*0x22*/ SABRE_IMAP_BPP,
522 /*0x23*/ SABRE_IMAP_AU_REC,
523 /*0x24*/ SABRE_IMAP_AU_PLAY,
524 /*0x25*/ SABRE_IMAP_PFAIL,
525 /*0x26*/ SABRE_IMAP_KMS,
526 /*0x27*/ SABRE_IMAP_FLPY,
527 /*0x28*/ SABRE_IMAP_SHW,
528 /*0x29*/ SABRE_IMAP_KBD,
529 /*0x2a*/ SABRE_IMAP_MS,
530 /*0x2b*/ SABRE_IMAP_SER,
531 /*0x2c*/ 0 /* reserved */,
532 /*0x2d*/ 0 /* reserved */,
533 /*0x2e*/ SABRE_IMAP_UE,
534 /*0x2f*/ SABRE_IMAP_CE,
535 /*0x30*/ SABRE_IMAP_PCIERR,
536 /*0x31*/ 0 /* reserved */,
537 /*0x32*/ 0 /* reserved */,
538 /*0x33*/ SABRE_IMAP_GFX,
539 /*0x34*/ SABRE_IMAP_EUPA,
541 #define SABRE_ONBOARD_IRQ_BASE 0x20
542 #define SABRE_ONBOARD_IRQ_LAST 0x30
543 #define sabre_onboard_imap_offset(__ino) \
544 __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
546 #define sabre_iclr_offset(ino) \
547 ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
548 (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
550 static int sabre_device_needs_wsync(struct device_node *dp)
552 struct device_node *parent = dp->parent;
553 const char *parent_model, *parent_compat;
555 /* This traversal up towards the root is meant to
558 * 1) non-PCI bus sitting under PCI, such as 'ebus'
559 * 2) the PCI controller interrupts themselves, which
560 * will use the sabre_irq_build but do not need
561 * the DMA synchronization handling
564 if (!strcmp(parent->type, "pci"))
566 parent = parent->parent;
572 parent_model = of_get_property(parent,
575 (!strcmp(parent_model, "SUNW,sabre") ||
576 !strcmp(parent_model, "SUNW,simba")))
579 parent_compat = of_get_property(parent,
582 (!strcmp(parent_compat, "pci108e,a000") ||
583 !strcmp(parent_compat, "pci108e,a001")))
589 static unsigned int sabre_irq_build(struct device_node *dp,
593 struct sabre_irq_data *irq_data = _data;
594 unsigned long controller_regs = irq_data->controller_regs;
595 const struct linux_prom_pci_registers *regs;
596 unsigned long imap, iclr;
597 unsigned long imap_off, iclr_off;
602 if (ino < SABRE_ONBOARD_IRQ_BASE) {
604 imap_off = sabre_pcislot_imap_offset(ino);
607 if (ino > SABRE_ONBOARD_IRQ_LAST) {
608 prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
611 imap_off = sabre_onboard_imap_offset(ino);
614 /* Now build the IRQ bucket. */
615 imap = controller_regs + imap_off;
618 iclr_off = sabre_iclr_offset(ino);
619 iclr = controller_regs + iclr_off;
622 if ((ino & 0x20) == 0)
623 inofixup = ino & 0x03;
625 virt_irq = build_irq(inofixup, iclr, imap);
627 /* If the parent device is a PCI<->PCI bridge other than
628 * APB, we have to install a pre-handler to ensure that
629 * all pending DMA is drained before the interrupt handler
632 regs = of_get_property(dp, "reg", NULL);
633 if (regs && sabre_device_needs_wsync(dp)) {
634 irq_install_pre_handler(virt_irq,
636 (void *) (long) regs->phys_hi,
643 static void sabre_irq_trans_init(struct device_node *dp)
645 const struct linux_prom64_registers *regs;
646 struct sabre_irq_data *irq_data;
649 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
650 dp->irq_trans->irq_build = sabre_irq_build;
652 irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
654 regs = of_get_property(dp, "reg", NULL);
655 irq_data->controller_regs = regs[0].phys_addr;
657 busrange = of_get_property(dp, "bus-range", NULL);
658 irq_data->pci_first_busno = busrange[0];
660 dp->irq_trans->data = irq_data;
663 /* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
664 * imap/iclr registers are per-PBM.
666 #define SCHIZO_IMAP_BASE 0x1000UL
667 #define SCHIZO_ICLR_BASE 0x1400UL
669 static unsigned long schizo_imap_offset(unsigned long ino)
671 return SCHIZO_IMAP_BASE + (ino * 8UL);
674 static unsigned long schizo_iclr_offset(unsigned long ino)
676 return SCHIZO_ICLR_BASE + (ino * 8UL);
679 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
682 return pbm_regs + schizo_iclr_offset(ino) + 4;
685 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
688 return pbm_regs + schizo_imap_offset(ino) + 4;
691 #define schizo_read(__reg) \
693 __asm__ __volatile__("ldxa [%1] %2, %0" \
695 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
699 #define schizo_write(__reg, __val) \
700 __asm__ __volatile__("stxa %0, [%1] %2" \
702 : "r" (__val), "r" (__reg), \
703 "i" (ASI_PHYS_BYPASS_EC_E) \
706 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
708 unsigned long sync_reg = (unsigned long) _arg2;
709 u64 mask = 1UL << (ino & IMAP_INO);
713 schizo_write(sync_reg, mask);
718 val = schizo_read(sync_reg);
723 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
728 static unsigned char cacheline[64]
729 __attribute__ ((aligned (64)));
731 __asm__ __volatile__("rd %%fprs, %0\n\t"
733 "wr %1, 0x0, %%fprs\n\t"
734 "stda %%f0, [%5] %6\n\t"
735 "wr %0, 0x0, %%fprs\n\t"
737 : "=&r" (mask), "=&r" (val)
738 : "0" (mask), "1" (val),
739 "i" (FPRS_FEF), "r" (&cacheline[0]),
740 "i" (ASI_BLK_COMMIT_P));
744 struct schizo_irq_data {
745 unsigned long pbm_regs;
746 unsigned long sync_reg;
751 static unsigned int schizo_irq_build(struct device_node *dp,
755 struct schizo_irq_data *irq_data = _data;
756 unsigned long pbm_regs = irq_data->pbm_regs;
757 unsigned long imap, iclr;
764 /* Now build the IRQ bucket. */
765 imap = schizo_ino_to_imap(pbm_regs, ino);
766 iclr = schizo_ino_to_iclr(pbm_regs, ino);
768 /* On Schizo, no inofixup occurs. This is because each
769 * INO has it's own IMAP register. On Psycho and Sabre
770 * there is only one IMAP register for each PCI slot even
771 * though four different INOs can be generated by each
774 * But, for JBUS variants (essentially, Tomatillo), we have
775 * to fixup the lowest bit of the interrupt group number.
779 is_tomatillo = (irq_data->sync_reg != 0UL);
782 if (irq_data->portid & 1)
783 ign_fixup = (1 << 6);
786 virt_irq = build_irq(ign_fixup, iclr, imap);
789 irq_install_pre_handler(virt_irq,
790 tomatillo_wsync_handler,
791 ((irq_data->chip_version <= 4) ?
792 (void *) 1 : (void *) 0),
793 (void *) irq_data->sync_reg);
799 static void __schizo_irq_trans_init(struct device_node *dp, int is_tomatillo)
801 const struct linux_prom64_registers *regs;
802 struct schizo_irq_data *irq_data;
804 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
805 dp->irq_trans->irq_build = schizo_irq_build;
807 irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
809 regs = of_get_property(dp, "reg", NULL);
810 dp->irq_trans->data = irq_data;
812 irq_data->pbm_regs = regs[0].phys_addr;
814 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
816 irq_data->sync_reg = 0UL;
817 irq_data->portid = of_getintprop_default(dp, "portid", 0);
818 irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
821 static void schizo_irq_trans_init(struct device_node *dp)
823 __schizo_irq_trans_init(dp, 0);
826 static void tomatillo_irq_trans_init(struct device_node *dp)
828 __schizo_irq_trans_init(dp, 1);
831 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
835 u32 devhandle = (u32) (unsigned long) _data;
837 return sun4v_build_irq(devhandle, devino);
840 static void pci_sun4v_irq_trans_init(struct device_node *dp)
842 const struct linux_prom64_registers *regs;
844 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
845 dp->irq_trans->irq_build = pci_sun4v_irq_build;
847 regs = of_get_property(dp, "reg", NULL);
848 dp->irq_trans->data = (void *) (unsigned long)
849 ((regs->phys_addr >> 32UL) & 0x0fffffff);
851 #endif /* CONFIG_PCI */
854 /* INO number to IMAP register offset for SYSIO external IRQ's.
855 * This should conform to both Sunfire/Wildfire server and Fusion
858 #define SYSIO_IMAP_SLOT0 0x2c04UL
859 #define SYSIO_IMAP_SLOT1 0x2c0cUL
860 #define SYSIO_IMAP_SLOT2 0x2c14UL
861 #define SYSIO_IMAP_SLOT3 0x2c1cUL
862 #define SYSIO_IMAP_SCSI 0x3004UL
863 #define SYSIO_IMAP_ETH 0x300cUL
864 #define SYSIO_IMAP_BPP 0x3014UL
865 #define SYSIO_IMAP_AUDIO 0x301cUL
866 #define SYSIO_IMAP_PFAIL 0x3024UL
867 #define SYSIO_IMAP_KMS 0x302cUL
868 #define SYSIO_IMAP_FLPY 0x3034UL
869 #define SYSIO_IMAP_SHW 0x303cUL
870 #define SYSIO_IMAP_KBD 0x3044UL
871 #define SYSIO_IMAP_MS 0x304cUL
872 #define SYSIO_IMAP_SER 0x3054UL
873 #define SYSIO_IMAP_TIM0 0x3064UL
874 #define SYSIO_IMAP_TIM1 0x306cUL
875 #define SYSIO_IMAP_UE 0x3074UL
876 #define SYSIO_IMAP_CE 0x307cUL
877 #define SYSIO_IMAP_SBERR 0x3084UL
878 #define SYSIO_IMAP_PMGMT 0x308cUL
879 #define SYSIO_IMAP_GFX 0x3094UL
880 #define SYSIO_IMAP_EUPA 0x309cUL
882 #define bogon ((unsigned long) -1)
883 static unsigned long sysio_irq_offsets[] = {
884 /* SBUS Slot 0 --> 3, level 1 --> 7 */
885 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
886 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
887 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
888 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
889 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
890 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
891 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
892 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
894 /* Onboard devices (not relevant/used on SunFire). */
925 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
927 /* Convert Interrupt Mapping register pointer to associated
928 * Interrupt Clear register pointer, SYSIO specific version.
930 #define SYSIO_ICLR_UNUSED0 0x3400UL
931 #define SYSIO_ICLR_SLOT0 0x340cUL
932 #define SYSIO_ICLR_SLOT1 0x344cUL
933 #define SYSIO_ICLR_SLOT2 0x348cUL
934 #define SYSIO_ICLR_SLOT3 0x34ccUL
935 static unsigned long sysio_imap_to_iclr(unsigned long imap)
937 unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
941 static unsigned int sbus_of_build_irq(struct device_node *dp,
945 unsigned long reg_base = (unsigned long) _data;
946 const struct linux_prom_registers *regs;
947 unsigned long imap, iclr;
953 regs = of_get_property(dp, "reg", NULL);
955 sbus_slot = regs->which_io;
958 ino += (sbus_slot * 8);
960 imap = sysio_irq_offsets[ino];
961 if (imap == ((unsigned long)-1)) {
962 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
968 /* SYSIO inconsistency. For external SLOTS, we have to select
969 * the right ICLR register based upon the lower SBUS irq level
973 iclr = sysio_imap_to_iclr(imap);
975 sbus_level = ino & 0x7;
979 iclr = reg_base + SYSIO_ICLR_SLOT0;
982 iclr = reg_base + SYSIO_ICLR_SLOT1;
985 iclr = reg_base + SYSIO_ICLR_SLOT2;
989 iclr = reg_base + SYSIO_ICLR_SLOT3;
993 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
995 return build_irq(sbus_level, iclr, imap);
998 static void sbus_irq_trans_init(struct device_node *dp)
1000 const struct linux_prom64_registers *regs;
1002 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1003 dp->irq_trans->irq_build = sbus_of_build_irq;
1005 regs = of_get_property(dp, "reg", NULL);
1006 dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1008 #endif /* CONFIG_SBUS */
1011 static unsigned int central_build_irq(struct device_node *dp,
1015 struct device_node *central_dp = _data;
1016 struct of_device *central_op = of_find_device_by_node(central_dp);
1017 struct resource *res;
1018 unsigned long imap, iclr;
1021 if (!strcmp(dp->name, "eeprom")) {
1022 res = ¢ral_op->resource[5];
1023 } else if (!strcmp(dp->name, "zs")) {
1024 res = ¢ral_op->resource[4];
1025 } else if (!strcmp(dp->name, "clock-board")) {
1026 res = ¢ral_op->resource[3];
1031 imap = res->start + 0x00UL;
1032 iclr = res->start + 0x10UL;
1034 /* Set the INO state to idle, and disable. */
1035 upa_writel(0, iclr);
1038 tmp = upa_readl(imap);
1040 upa_writel(tmp, imap);
1042 return build_irq(0, iclr, imap);
1045 static void central_irq_trans_init(struct device_node *dp)
1047 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1048 dp->irq_trans->irq_build = central_build_irq;
1050 dp->irq_trans->data = dp;
1055 void (*init)(struct device_node *);
1059 static struct irq_trans pci_irq_trans_table[] = {
1060 { "SUNW,sabre", sabre_irq_trans_init },
1061 { "pci108e,a000", sabre_irq_trans_init },
1062 { "pci108e,a001", sabre_irq_trans_init },
1063 { "SUNW,psycho", psycho_irq_trans_init },
1064 { "pci108e,8000", psycho_irq_trans_init },
1065 { "SUNW,schizo", schizo_irq_trans_init },
1066 { "pci108e,8001", schizo_irq_trans_init },
1067 { "SUNW,schizo+", schizo_irq_trans_init },
1068 { "pci108e,8002", schizo_irq_trans_init },
1069 { "SUNW,tomatillo", tomatillo_irq_trans_init },
1070 { "pci108e,a801", tomatillo_irq_trans_init },
1071 { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1075 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1076 unsigned int devino,
1079 u32 devhandle = (u32) (unsigned long) _data;
1081 return sun4v_build_irq(devhandle, devino);
1084 static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1086 const struct linux_prom64_registers *regs;
1088 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1089 dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1091 regs = of_get_property(dp, "reg", NULL);
1092 dp->irq_trans->data = (void *) (unsigned long)
1093 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1096 static void irq_trans_init(struct device_node *dp)
1104 model = of_get_property(dp, "model", NULL);
1106 model = of_get_property(dp, "compatible", NULL);
1108 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1109 struct irq_trans *t = &pci_irq_trans_table[i];
1111 if (!strcmp(model, t->name))
1117 if (!strcmp(dp->name, "sbus") ||
1118 !strcmp(dp->name, "sbi"))
1119 return sbus_irq_trans_init(dp);
1121 if (!strcmp(dp->name, "fhc") &&
1122 !strcmp(dp->parent->name, "central"))
1123 return central_irq_trans_init(dp);
1124 if (!strcmp(dp->name, "virtual-devices"))
1125 return sun4v_vdev_irq_trans_init(dp);
1128 static int is_root_node(const struct device_node *dp)
1133 return (dp->parent == NULL);
1136 /* The following routines deal with the black magic of fully naming a
1139 * Certain well known named nodes are just the simple name string.
1141 * Actual devices have an address specifier appended to the base name
1142 * string, like this "foo@addr". The "addr" can be in any number of
1143 * formats, and the platform plus the type of the node determine the
1144 * format and how it is constructed.
1146 * For children of the ROOT node, the naming convention is fixed and
1147 * determined by whether this is a sun4u or sun4v system.
1149 * For children of other nodes, it is bus type specific. So
1150 * we walk up the tree until we discover a "device_type" property
1151 * we recognize and we go from there.
1153 * As an example, the boot device on my workstation has a full path:
1155 * /pci@1e,600000/ide@d/disk@0,0:c
1157 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1159 struct linux_prom64_registers *regs;
1160 struct property *rprop;
1161 u32 high_bits, low_bits, type;
1163 rprop = of_find_property(dp, "reg", NULL);
1167 regs = rprop->value;
1168 if (!is_root_node(dp->parent)) {
1169 sprintf(tmp_buf, "%s@%x,%x",
1171 (unsigned int) (regs->phys_addr >> 32UL),
1172 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1176 type = regs->phys_addr >> 60UL;
1177 high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1178 low_bits = (regs->phys_addr & 0xffffffffUL);
1180 if (type == 0 || type == 8) {
1181 const char *prefix = (type == 0) ? "m" : "i";
1184 sprintf(tmp_buf, "%s@%s%x,%x",
1186 high_bits, low_bits);
1188 sprintf(tmp_buf, "%s@%s%x",
1192 } else if (type == 12) {
1193 sprintf(tmp_buf, "%s@%x",
1194 dp->name, high_bits);
1198 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1200 struct linux_prom64_registers *regs;
1201 struct property *prop;
1203 prop = of_find_property(dp, "reg", NULL);
1208 if (!is_root_node(dp->parent)) {
1209 sprintf(tmp_buf, "%s@%x,%x",
1211 (unsigned int) (regs->phys_addr >> 32UL),
1212 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1216 prop = of_find_property(dp, "upa-portid", NULL);
1218 prop = of_find_property(dp, "portid", NULL);
1220 unsigned long mask = 0xffffffffUL;
1222 if (tlb_type >= cheetah)
1225 sprintf(tmp_buf, "%s@%x,%x",
1227 *(u32 *)prop->value,
1228 (unsigned int) (regs->phys_addr & mask));
1232 /* "name@slot,offset" */
1233 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1235 struct linux_prom_registers *regs;
1236 struct property *prop;
1238 prop = of_find_property(dp, "reg", NULL);
1243 sprintf(tmp_buf, "%s@%x,%x",
1249 /* "name@devnum[,func]" */
1250 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1252 struct linux_prom_pci_registers *regs;
1253 struct property *prop;
1256 prop = of_find_property(dp, "reg", NULL);
1261 devfn = (regs->phys_hi >> 8) & 0xff;
1263 sprintf(tmp_buf, "%s@%x,%x",
1268 sprintf(tmp_buf, "%s@%x",
1274 /* "name@UPA_PORTID,offset" */
1275 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1277 struct linux_prom64_registers *regs;
1278 struct property *prop;
1280 prop = of_find_property(dp, "reg", NULL);
1286 prop = of_find_property(dp, "upa-portid", NULL);
1290 sprintf(tmp_buf, "%s@%x,%x",
1292 *(u32 *) prop->value,
1293 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1297 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1299 struct property *prop;
1302 prop = of_find_property(dp, "reg", NULL);
1308 sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1311 /* "name@addrhi,addrlo" */
1312 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1314 struct linux_prom64_registers *regs;
1315 struct property *prop;
1317 prop = of_find_property(dp, "reg", NULL);
1323 sprintf(tmp_buf, "%s@%x,%x",
1325 (unsigned int) (regs->phys_addr >> 32UL),
1326 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1329 /* "name@bus,addr" */
1330 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1332 struct property *prop;
1335 prop = of_find_property(dp, "reg", NULL);
1341 /* This actually isn't right... should look at the #address-cells
1342 * property of the i2c bus node etc. etc.
1344 sprintf(tmp_buf, "%s@%x,%x",
1345 dp->name, regs[0], regs[1]);
1348 /* "name@reg0[,reg1]" */
1349 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1351 struct property *prop;
1354 prop = of_find_property(dp, "reg", NULL);
1360 if (prop->length == sizeof(u32) || regs[1] == 1) {
1361 sprintf(tmp_buf, "%s@%x",
1364 sprintf(tmp_buf, "%s@%x,%x",
1365 dp->name, regs[0], regs[1]);
1369 /* "name@reg0reg1[,reg2reg3]" */
1370 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1372 struct property *prop;
1375 prop = of_find_property(dp, "reg", NULL);
1381 if (regs[2] || regs[3]) {
1382 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1383 dp->name, regs[0], regs[1], regs[2], regs[3]);
1385 sprintf(tmp_buf, "%s@%08x%08x",
1386 dp->name, regs[0], regs[1]);
1390 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1392 struct device_node *parent = dp->parent;
1394 if (parent != NULL) {
1395 if (!strcmp(parent->type, "pci") ||
1396 !strcmp(parent->type, "pciex"))
1397 return pci_path_component(dp, tmp_buf);
1398 if (!strcmp(parent->type, "sbus"))
1399 return sbus_path_component(dp, tmp_buf);
1400 if (!strcmp(parent->type, "upa"))
1401 return upa_path_component(dp, tmp_buf);
1402 if (!strcmp(parent->type, "ebus"))
1403 return ebus_path_component(dp, tmp_buf);
1404 if (!strcmp(parent->name, "usb") ||
1405 !strcmp(parent->name, "hub"))
1406 return usb_path_component(dp, tmp_buf);
1407 if (!strcmp(parent->type, "i2c"))
1408 return i2c_path_component(dp, tmp_buf);
1409 if (!strcmp(parent->type, "firewire"))
1410 return ieee1394_path_component(dp, tmp_buf);
1411 if (!strcmp(parent->type, "virtual-devices"))
1412 return vdev_path_component(dp, tmp_buf);
1414 /* "isa" is handled with platform naming */
1417 /* Use platform naming convention. */
1418 if (tlb_type == hypervisor)
1419 return sun4v_path_component(dp, tmp_buf);
1421 return sun4u_path_component(dp, tmp_buf);
1424 static char * __init build_path_component(struct device_node *dp)
1426 char tmp_buf[64], *n;
1429 __build_path_component(dp, tmp_buf);
1430 if (tmp_buf[0] == '\0')
1431 strcpy(tmp_buf, dp->name);
1433 n = prom_early_alloc(strlen(tmp_buf) + 1);
1439 static char * __init build_full_name(struct device_node *dp)
1441 int len, ourlen, plen;
1444 plen = strlen(dp->parent->full_name);
1445 ourlen = strlen(dp->path_component_name);
1446 len = ourlen + plen + 2;
1448 n = prom_early_alloc(len);
1449 strcpy(n, dp->parent->full_name);
1450 if (!is_root_node(dp->parent)) {
1451 strcpy(n + plen, "/");
1454 strcpy(n + plen, dp->path_component_name);
1459 static unsigned int unique_id;
1461 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1463 static struct property *tmp = NULL;
1468 memset(p, 0, sizeof(*p) + 32);
1471 p = prom_early_alloc(sizeof(struct property) + 32);
1472 p->unique_id = unique_id++;
1475 p->name = (char *) (p + 1);
1477 strcpy(p->name, special_name);
1478 p->length = special_len;
1479 p->value = prom_early_alloc(special_len);
1480 memcpy(p->value, special_val, special_len);
1483 prom_firstprop(node, p->name);
1485 prom_nextprop(node, prev, p->name);
1487 if (strlen(p->name) == 0) {
1491 p->length = prom_getproplen(node, p->name);
1492 if (p->length <= 0) {
1495 p->value = prom_early_alloc(p->length + 1);
1496 prom_getproperty(node, p->name, p->value, p->length);
1497 ((unsigned char *)p->value)[p->length] = '\0';
1503 static struct property * __init build_prop_list(phandle node)
1505 struct property *head, *tail;
1507 head = tail = build_one_prop(node, NULL,
1508 ".node", &node, sizeof(node));
1510 tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1513 tail->next = build_one_prop(node, tail->name,
1521 static char * __init get_one_property(phandle node, const char *name)
1523 char *buf = "<NULL>";
1526 len = prom_getproplen(node, name);
1528 buf = prom_early_alloc(len);
1529 prom_getproperty(node, name, buf, len);
1535 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1537 struct device_node *dp;
1542 dp = prom_early_alloc(sizeof(*dp));
1543 dp->unique_id = unique_id++;
1544 dp->parent = parent;
1546 kref_init(&dp->kref);
1548 dp->name = get_one_property(node, "name");
1549 dp->type = get_one_property(node, "device_type");
1552 dp->properties = build_prop_list(node);
1559 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1561 struct device_node *dp;
1563 dp = create_node(node, parent);
1566 *nextp = &dp->allnext;
1568 dp->path_component_name = build_path_component(dp);
1569 dp->full_name = build_full_name(dp);
1571 dp->child = build_tree(dp, prom_getchild(node), nextp);
1573 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1579 void __init prom_build_devicetree(void)
1581 struct device_node **nextp;
1583 allnodes = create_node(prom_root_node, NULL);
1584 allnodes->path_component_name = "";
1585 allnodes->full_name = "/";
1587 nextp = &allnodes->allnext;
1588 allnodes->child = build_tree(allnodes,
1589 prom_getchild(allnodes->node),
1591 printk("PROM: Built device tree with %u bytes of memory.\n",
1592 prom_early_allocated);