1 #include <linux/threads.h>
2 #include <linux/cpumask.h>
3 #include <linux/string.h>
4 #include <linux/kernel.h>
5 #include <linux/ctype.h>
6 #include <linux/init.h>
9 #include <asm/genapic.h>
11 DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
13 /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
15 static cpumask_t x2apic_target_cpus(void)
17 return cpumask_of_cpu(0);
21 * for now each logical cpu is in its own vector allocation domain.
23 static cpumask_t x2apic_vector_allocation_domain(int cpu)
25 cpumask_t domain = CPU_MASK_NONE;
30 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
35 cfg = __prepare_ICR(0, vector, dest);
40 x2apic_icr_write(cfg, apicid);
44 * for now, we send the IPI's one by one in the cpumask.
45 * TBD: Based on the cpu mask, we can send the IPI's to the cluster group
46 * at once. We have 16 cpu's in a cluster. This will minimize IPI register
49 static void x2apic_send_IPI_mask(cpumask_t mask, int vector)
52 unsigned long query_cpu;
54 local_irq_save(flags);
55 for_each_cpu_mask(query_cpu, mask) {
56 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_logical_apicid, query_cpu),
57 vector, APIC_DEST_LOGICAL);
59 local_irq_restore(flags);
62 static void x2apic_send_IPI_allbutself(int vector)
64 cpumask_t mask = cpu_online_map;
66 cpu_clear(smp_processor_id(), mask);
68 if (!cpus_empty(mask))
69 x2apic_send_IPI_mask(mask, vector);
72 static void x2apic_send_IPI_all(int vector)
74 x2apic_send_IPI_mask(cpu_online_map, vector);
77 static int x2apic_apic_id_registered(void)
82 static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask)
87 * We're using fixed IRQ delivery, can only return one phys APIC ID.
88 * May as well be the first.
90 cpu = first_cpu(cpumask);
91 if ((unsigned)cpu < NR_CPUS)
92 return per_cpu(x86_cpu_to_logical_apicid, cpu);
97 static unsigned int x2apic_read_id(void)
99 return apic_read(APIC_ID);
102 static unsigned int phys_pkg_id(int index_msb)
104 return x2apic_read_id() >> index_msb;
107 static void x2apic_send_IPI_self(int vector)
109 apic_write(APIC_SELF_IPI, vector);
112 static void init_x2apic_ldr(void)
114 int cpu = smp_processor_id();
116 per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR);
120 struct genapic apic_x2apic_cluster = {
121 .name = "cluster x2apic",
122 .int_delivery_mode = dest_LowestPrio,
123 .int_dest_mode = (APIC_DEST_LOGICAL != 0),
124 .target_cpus = x2apic_target_cpus,
125 .vector_allocation_domain = x2apic_vector_allocation_domain,
126 .apic_id_registered = x2apic_apic_id_registered,
127 .init_apic_ldr = init_x2apic_ldr,
128 .send_IPI_all = x2apic_send_IPI_all,
129 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
130 .send_IPI_mask = x2apic_send_IPI_mask,
131 .send_IPI_self = x2apic_send_IPI_self,
132 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
133 .phys_pkg_id = phys_pkg_id,
134 .read_apic_id = x2apic_read_id,