2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
32 #include <asm/bios_ebda.h>
34 #include <mach_apic.h>
36 /* Have we found an MP table */
40 * Various Linux-internal data structures created from the
43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
44 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
46 static int mp_current_pci_id = 0;
48 /* Make it easy to share the UP and SMP code: */
49 #ifndef CONFIG_X86_SMP
50 unsigned int num_processors;
51 unsigned disabled_cpus __cpuinitdata;
52 #ifndef CONFIG_X86_LOCAL_APIC
53 unsigned int boot_cpu_physical_apicid = -1U;
58 * Intel MP BIOS table parsing routines:
62 * Checksum an MP configuration block.
65 static int __init mpf_checksum(unsigned char *mp, int len)
75 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
77 char *bootup_cpu = "";
79 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
83 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
84 bootup_cpu = " (Bootup-CPU)";
85 boot_cpu_physical_apicid = m->mpc_apicid;
88 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
89 generic_processor_info(m->mpc_apicid, 0);
92 static void __init MP_bus_info(struct mpc_config_bus *m)
96 memcpy(str, m->mpc_bustype, 6);
98 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
100 if (strncmp(str, "ISA", 3) == 0) {
101 set_bit(m->mpc_busid, mp_bus_not_pci);
102 } else if (strncmp(str, "PCI", 3) == 0) {
103 clear_bit(m->mpc_busid, mp_bus_not_pci);
104 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
107 printk(KERN_ERR "Unknown bustype %s\n", str);
111 static int bad_ioapic(unsigned long address)
113 if (nr_ioapics >= MAX_IO_APICS) {
114 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
115 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
116 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
119 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
120 " found in table, skipping!\n");
126 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
128 if (!(m->mpc_flags & MPC_APIC_USABLE))
131 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
134 if (bad_ioapic(m->mpc_apicaddr))
137 mp_ioapics[nr_ioapics] = *m;
141 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
143 mp_irqs[mp_irq_entries] = *m;
144 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
145 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
146 m->mpc_irqtype, m->mpc_irqflag & 3,
147 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
148 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
149 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
150 panic("Max # of irq sources exceeded!!\n");
153 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
155 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
156 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
157 m->mpc_irqtype, m->mpc_irqflag & 3,
158 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
159 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
165 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
168 int count = sizeof(*mpc);
169 unsigned char *mpt = ((unsigned char *)mpc) + count;
171 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
172 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
173 mpc->mpc_signature[0],
174 mpc->mpc_signature[1],
175 mpc->mpc_signature[2], mpc->mpc_signature[3]);
178 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
179 printk(KERN_ERR "MPTABLE: checksum error!\n");
182 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
183 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
187 if (!mpc->mpc_lapic) {
188 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
191 memcpy(str, mpc->mpc_oem, 8);
193 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
195 memcpy(str, mpc->mpc_productid, 12);
197 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
199 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
201 /* save the local APIC address, it might be non-default */
203 mp_lapic_addr = mpc->mpc_lapic;
209 * Now process the configuration blocks.
211 while (count < mpc->mpc_length) {
215 struct mpc_config_processor *m =
216 (struct mpc_config_processor *)mpt;
218 MP_processor_info(m);
225 struct mpc_config_bus *m =
226 (struct mpc_config_bus *)mpt;
234 struct mpc_config_ioapic *m =
235 (struct mpc_config_ioapic *)mpt;
243 struct mpc_config_intsrc *m =
244 (struct mpc_config_intsrc *)mpt;
253 struct mpc_config_lintsrc *m =
254 (struct mpc_config_lintsrc *)mpt;
262 setup_apic_routing();
264 printk(KERN_ERR "MPTABLE: no processors registered!\n");
265 return num_processors;
268 static int __init ELCR_trigger(unsigned int irq)
272 port = 0x4d0 + (irq >> 3);
273 return (inb(port) >> (irq & 7)) & 1;
276 static void __init construct_default_ioirq_mptable(int mpc_default_type)
278 struct mpc_config_intsrc intsrc;
280 int ELCR_fallback = 0;
282 intsrc.mpc_type = MP_INTSRC;
283 intsrc.mpc_irqflag = 0; /* conforming */
284 intsrc.mpc_srcbus = 0;
285 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
287 intsrc.mpc_irqtype = mp_INT;
290 * If true, we have an ISA/PCI system with no IRQ entries
291 * in the MP table. To prevent the PCI interrupts from being set up
292 * incorrectly, we try to use the ELCR. The sanity check to see if
293 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
294 * never be level sensitive, so we simply see if the ELCR agrees.
295 * If it does, we assume it's valid.
297 if (mpc_default_type == 5) {
298 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
299 "falling back to ELCR\n");
301 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
303 printk(KERN_ERR "ELCR contains invalid data... "
307 "Using ELCR to identify PCI interrupts\n");
312 for (i = 0; i < 16; i++) {
313 switch (mpc_default_type) {
315 if (i == 0 || i == 13)
316 continue; /* IRQ0 & IRQ13 not connected */
320 continue; /* IRQ2 is never connected */
325 * If the ELCR indicates a level-sensitive interrupt, we
326 * copy that information over to the MP table in the
327 * irqflag field (level sensitive, active high polarity).
330 intsrc.mpc_irqflag = 13;
332 intsrc.mpc_irqflag = 0;
335 intsrc.mpc_srcbusirq = i;
336 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
337 MP_intsrc_info(&intsrc);
340 intsrc.mpc_irqtype = mp_ExtINT;
341 intsrc.mpc_srcbusirq = 0;
342 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
343 MP_intsrc_info(&intsrc);
346 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
348 struct mpc_config_processor processor;
349 struct mpc_config_bus bus;
350 struct mpc_config_ioapic ioapic;
351 struct mpc_config_lintsrc lintsrc;
352 int linttypes[2] = { mp_ExtINT, mp_NMI };
356 * local APIC has default address
358 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
361 * 2 CPUs, numbered 0 & 1.
363 processor.mpc_type = MP_PROCESSOR;
364 processor.mpc_apicver = 0;
365 processor.mpc_cpuflag = CPU_ENABLED;
366 processor.mpc_cpufeature = 0;
367 processor.mpc_featureflag = 0;
368 processor.mpc_reserved[0] = 0;
369 processor.mpc_reserved[1] = 0;
370 for (i = 0; i < 2; i++) {
371 processor.mpc_apicid = i;
372 MP_processor_info(&processor);
375 bus.mpc_type = MP_BUS;
377 switch (mpc_default_type) {
379 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
384 memcpy(bus.mpc_bustype, "ISA ", 6);
388 if (mpc_default_type > 4) {
390 memcpy(bus.mpc_bustype, "PCI ", 6);
394 ioapic.mpc_type = MP_IOAPIC;
395 ioapic.mpc_apicid = 2;
396 ioapic.mpc_apicver = 0;
397 ioapic.mpc_flags = MPC_APIC_USABLE;
398 ioapic.mpc_apicaddr = 0xFEC00000;
399 MP_ioapic_info(&ioapic);
402 * We set up most of the low 16 IO-APIC pins according to MPS rules.
404 construct_default_ioirq_mptable(mpc_default_type);
406 lintsrc.mpc_type = MP_LINTSRC;
407 lintsrc.mpc_irqflag = 0; /* conforming */
408 lintsrc.mpc_srcbusid = 0;
409 lintsrc.mpc_srcbusirq = 0;
410 lintsrc.mpc_destapic = MP_APIC_ALL;
411 for (i = 0; i < 2; i++) {
412 lintsrc.mpc_irqtype = linttypes[i];
413 lintsrc.mpc_destapiclint = i;
414 MP_lintsrc_info(&lintsrc);
418 static struct intel_mp_floating *mpf_found;
421 * Scan the memory blocks for an SMP configuration block.
423 static void __init __get_smp_config(unsigned early)
425 struct intel_mp_floating *mpf = mpf_found;
427 if (acpi_lapic && early)
430 * ACPI supports both logical (e.g. Hyper-Threading) and physical
431 * processors, where MPS only supports physical.
433 if (acpi_lapic && acpi_ioapic) {
434 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
437 } else if (acpi_lapic)
438 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
439 "configuration information\n");
441 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
442 mpf->mpf_specification);
445 * Now see if we need to read further.
447 if (mpf->mpf_feature1 != 0) {
450 * local APIC has default address
452 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
456 printk(KERN_INFO "Default MP configuration #%d\n",
458 construct_default_ISA_mptable(mpf->mpf_feature1);
460 } else if (mpf->mpf_physptr) {
463 * Read the physical hardware table. Anything here will
464 * override the defaults.
466 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
467 smp_found_config = 0;
469 "BIOS bug, MP table errors detected!...\n");
470 printk(KERN_ERR "... disabling SMP support. "
471 "(tell your hw vendor)\n");
478 * If there are no explicit MP IRQ entries, then we are
479 * broken. We set up most of the low 16 IO-APIC pins to
480 * ISA defaults and hope it will work.
482 if (!mp_irq_entries) {
483 struct mpc_config_bus bus;
485 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
486 "using default mptable. "
487 "(tell your hw vendor)\n");
489 bus.mpc_type = MP_BUS;
491 memcpy(bus.mpc_bustype, "ISA ", 6);
494 construct_default_ioirq_mptable(0);
501 printk(KERN_INFO "Processors: %d\n", num_processors);
503 * Only use the first configuration found.
507 void __init early_get_smp_config(void)
512 void __init get_smp_config(void)
517 static int __init smp_scan_config(unsigned long base, unsigned long length,
520 extern void __bad_mpf_size(void);
521 unsigned int *bp = phys_to_virt(base);
522 struct intel_mp_floating *mpf;
524 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
525 if (sizeof(*mpf) != 16)
529 mpf = (struct intel_mp_floating *)bp;
530 if ((*bp == SMP_MAGIC_IDENT) &&
531 (mpf->mpf_length == 1) &&
532 !mpf_checksum((unsigned char *)bp, 16) &&
533 ((mpf->mpf_specification == 1)
534 || (mpf->mpf_specification == 4))) {
536 smp_found_config = 1;
542 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
543 if (mpf->mpf_physptr)
544 reserve_bootmem_generic(mpf->mpf_physptr,
554 static void __init __find_smp_config(unsigned reserve)
556 unsigned int address;
559 * FIXME: Linux assumes you have 640K of base ram..
560 * this continues the error...
562 * 1) Scan the bottom 1K for a signature
563 * 2) Scan the top 1K of base RAM
564 * 3) Scan the 64K of bios
566 if (smp_scan_config(0x0, 0x400, reserve) ||
567 smp_scan_config(639 * 0x400, 0x400, reserve) ||
568 smp_scan_config(0xF0000, 0x10000, reserve))
571 * If it is an SMP machine we should know now.
573 * there is a real-mode segmented pointer pointing to the
574 * 4K EBDA area at 0x40E, calculate and scan it here.
576 * NOTE! There are Linux loaders that will corrupt the EBDA
577 * area, and as such this kind of SMP config may be less
578 * trustworthy, simply because the SMP table may have been
579 * stomped on during early boot. These loaders are buggy and
582 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
585 address = get_bios_ebda();
587 smp_scan_config(address, 0x400, reserve);
590 void __init early_find_smp_config(void)
592 __find_smp_config(0);
595 void __init find_smp_config(void)
597 __find_smp_config(1);
600 /* --------------------------------------------------------------------------
601 ACPI-based MP Configuration
602 -------------------------------------------------------------------------- */
606 void __init mp_register_lapic_address(u64 address)
608 mp_lapic_addr = (unsigned long)address;
609 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
610 if (boot_cpu_physical_apicid == -1U)
611 boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
613 void __cpuinit mp_register_lapic(int id, u8 enabled)
620 generic_processor_info(id, 0);
625 #define MP_MAX_IOAPIC_PIN 127
627 extern struct mp_ioapic_routing mp_ioapic_routing[MAX_IO_APICS];
629 static int mp_find_ioapic(int gsi)
633 /* Find the IOAPIC that manages this GSI. */
634 for (i = 0; i < nr_ioapics; i++) {
635 if ((gsi >= mp_ioapic_routing[i].gsi_base)
636 && (gsi <= mp_ioapic_routing[i].gsi_end))
640 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
644 static u8 uniq_ioapic_id(u8 id)
647 DECLARE_BITMAP(used, 256);
648 bitmap_zero(used, 256);
649 for (i = 0; i < nr_ioapics; i++) {
650 struct mpc_config_ioapic *ia = &mp_ioapics[i];
651 __set_bit(ia->mpc_apicid, used);
653 if (!test_bit(id, used))
655 return find_first_zero_bit(used, 256);
658 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
662 if (bad_ioapic(address))
667 mp_ioapics[idx].mpc_type = MP_IOAPIC;
668 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
669 mp_ioapics[idx].mpc_apicaddr = address;
671 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
672 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
673 mp_ioapics[idx].mpc_apicver = 0;
676 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
677 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
679 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
680 mp_ioapic_routing[idx].gsi_base = gsi_base;
681 mp_ioapic_routing[idx].gsi_end = gsi_base +
682 io_apic_get_redir_entries(idx);
684 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
685 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
686 mp_ioapics[idx].mpc_apicaddr,
687 mp_ioapic_routing[idx].gsi_base,
688 mp_ioapic_routing[idx].gsi_end);
693 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
695 struct mpc_config_intsrc intsrc;
700 * Convert 'gsi' to 'ioapic.pin'.
702 ioapic = mp_find_ioapic(gsi);
705 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
708 * TBD: This check is for faulty timer entries, where the override
709 * erroneously sets the trigger to level, resulting in a HUGE
710 * increase of timer interrupts!
712 if ((bus_irq == 0) && (trigger == 3))
715 intsrc.mpc_type = MP_INTSRC;
716 intsrc.mpc_irqtype = mp_INT;
717 intsrc.mpc_irqflag = (trigger << 2) | polarity;
718 intsrc.mpc_srcbus = MP_ISA_BUS;
719 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
720 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
721 intsrc.mpc_dstirq = pin; /* INTIN# */
723 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
724 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
725 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
726 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
728 mp_irqs[mp_irq_entries] = intsrc;
729 if (++mp_irq_entries == MAX_IRQ_SOURCES)
730 panic("Max # of irq sources exceeded!\n");
733 void __init mp_config_acpi_legacy_irqs(void)
735 struct mpc_config_intsrc intsrc;
740 * Fabricate the legacy ISA bus (bus #31).
742 set_bit(MP_ISA_BUS, mp_bus_not_pci);
745 * Locate the IOAPIC that manages the ISA IRQs (0-15).
747 ioapic = mp_find_ioapic(0);
751 intsrc.mpc_type = MP_INTSRC;
752 intsrc.mpc_irqflag = 0; /* Conforming */
753 intsrc.mpc_srcbus = MP_ISA_BUS;
754 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
757 * Use the default configuration for the IRQs 0-15. Unless
758 * overridden by (MADT) interrupt source override entries.
760 for (i = 0; i < 16; i++) {
763 for (idx = 0; idx < mp_irq_entries; idx++) {
764 struct mpc_config_intsrc *irq = mp_irqs + idx;
766 /* Do we already have a mapping for this ISA IRQ? */
767 if (irq->mpc_srcbus == MP_ISA_BUS
768 && irq->mpc_srcbusirq == i)
771 /* Do we already have a mapping for this IOAPIC pin */
772 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
773 (irq->mpc_dstirq == i))
777 if (idx != mp_irq_entries) {
778 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
779 continue; /* IRQ already used */
782 intsrc.mpc_irqtype = mp_INT;
783 intsrc.mpc_srcbusirq = i; /* Identity mapped */
784 intsrc.mpc_dstirq = i;
786 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
787 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
788 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
789 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
792 mp_irqs[mp_irq_entries] = intsrc;
793 if (++mp_irq_entries == MAX_IRQ_SOURCES)
794 panic("Max # of irq sources exceeded!\n");
798 int mp_register_gsi(u32 gsi, int triggering, int polarity)
804 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
807 /* Don't set up the ACPI SCI because it's already set up */
808 if (acpi_gbl_FADT.sci_interrupt == gsi)
811 ioapic = mp_find_ioapic(gsi);
813 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
817 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
820 * Avoid pin reprogramming. PRTs typically include entries
821 * with redundant pin->gsi mappings (but unique PCI devices);
822 * we only program the IOAPIC on the first.
824 bit = ioapic_pin % 32;
825 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
827 printk(KERN_ERR "Invalid reference to IOAPIC pin "
828 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
832 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
833 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
834 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
838 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
840 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
841 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
842 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
845 #endif /* CONFIG_ACPI */