2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
32 #include <asm/bios_ebda.h>
34 #include <mach_apic.h>
36 /* Have we found an MP table */
40 * Various Linux-internal data structures created from the
43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
44 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
46 static int mp_current_pci_id = 0;
49 * Intel MP BIOS table parsing routines:
53 * Checksum an MP configuration block.
56 static int __init mpf_checksum(unsigned char *mp, int len)
66 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
68 char *bootup_cpu = "";
70 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
74 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
75 bootup_cpu = " (Bootup-CPU)";
76 boot_cpu_physical_apicid = m->mpc_apicid;
79 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
80 generic_processor_info(m->mpc_apicid, 0);
83 static void __init MP_bus_info(struct mpc_config_bus *m)
87 memcpy(str, m->mpc_bustype, 6);
89 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
91 if (strncmp(str, "ISA", 3) == 0) {
92 set_bit(m->mpc_busid, mp_bus_not_pci);
93 } else if (strncmp(str, "PCI", 3) == 0) {
94 clear_bit(m->mpc_busid, mp_bus_not_pci);
95 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
98 printk(KERN_ERR "Unknown bustype %s\n", str);
102 static int bad_ioapic(unsigned long address)
104 if (nr_ioapics >= MAX_IO_APICS) {
105 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
106 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
107 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
110 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
111 " found in table, skipping!\n");
117 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
119 if (!(m->mpc_flags & MPC_APIC_USABLE))
122 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
125 if (bad_ioapic(m->mpc_apicaddr))
128 mp_ioapics[nr_ioapics] = *m;
132 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
134 mp_irqs[mp_irq_entries] = *m;
135 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
136 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
137 m->mpc_irqtype, m->mpc_irqflag & 3,
138 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
139 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
140 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
141 panic("Max # of irq sources exceeded!!\n");
144 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
146 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
147 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
148 m->mpc_irqtype, m->mpc_irqflag & 3,
149 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
150 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
156 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
159 int count = sizeof(*mpc);
160 unsigned char *mpt = ((unsigned char *)mpc) + count;
162 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
163 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
164 mpc->mpc_signature[0],
165 mpc->mpc_signature[1],
166 mpc->mpc_signature[2], mpc->mpc_signature[3]);
169 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
170 printk(KERN_ERR "MPTABLE: checksum error!\n");
173 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
174 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
178 if (!mpc->mpc_lapic) {
179 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
182 memcpy(str, mpc->mpc_oem, 8);
184 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
186 memcpy(str, mpc->mpc_productid, 12);
188 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
190 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
192 /* save the local APIC address, it might be non-default */
194 mp_lapic_addr = mpc->mpc_lapic;
200 * Now process the configuration blocks.
202 while (count < mpc->mpc_length) {
206 struct mpc_config_processor *m =
207 (struct mpc_config_processor *)mpt;
209 MP_processor_info(m);
216 struct mpc_config_bus *m =
217 (struct mpc_config_bus *)mpt;
225 struct mpc_config_ioapic *m =
226 (struct mpc_config_ioapic *)mpt;
234 struct mpc_config_intsrc *m =
235 (struct mpc_config_intsrc *)mpt;
244 struct mpc_config_lintsrc *m =
245 (struct mpc_config_lintsrc *)mpt;
253 setup_apic_routing();
255 printk(KERN_ERR "MPTABLE: no processors registered!\n");
256 return num_processors;
259 static int __init ELCR_trigger(unsigned int irq)
263 port = 0x4d0 + (irq >> 3);
264 return (inb(port) >> (irq & 7)) & 1;
267 static void __init construct_default_ioirq_mptable(int mpc_default_type)
269 struct mpc_config_intsrc intsrc;
271 int ELCR_fallback = 0;
273 intsrc.mpc_type = MP_INTSRC;
274 intsrc.mpc_irqflag = 0; /* conforming */
275 intsrc.mpc_srcbus = 0;
276 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
278 intsrc.mpc_irqtype = mp_INT;
281 * If true, we have an ISA/PCI system with no IRQ entries
282 * in the MP table. To prevent the PCI interrupts from being set up
283 * incorrectly, we try to use the ELCR. The sanity check to see if
284 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
285 * never be level sensitive, so we simply see if the ELCR agrees.
286 * If it does, we assume it's valid.
288 if (mpc_default_type == 5) {
289 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
290 "falling back to ELCR\n");
292 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
294 printk(KERN_ERR "ELCR contains invalid data... "
298 "Using ELCR to identify PCI interrupts\n");
303 for (i = 0; i < 16; i++) {
304 switch (mpc_default_type) {
306 if (i == 0 || i == 13)
307 continue; /* IRQ0 & IRQ13 not connected */
311 continue; /* IRQ2 is never connected */
316 * If the ELCR indicates a level-sensitive interrupt, we
317 * copy that information over to the MP table in the
318 * irqflag field (level sensitive, active high polarity).
321 intsrc.mpc_irqflag = 13;
323 intsrc.mpc_irqflag = 0;
326 intsrc.mpc_srcbusirq = i;
327 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
328 MP_intsrc_info(&intsrc);
331 intsrc.mpc_irqtype = mp_ExtINT;
332 intsrc.mpc_srcbusirq = 0;
333 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
334 MP_intsrc_info(&intsrc);
337 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
339 struct mpc_config_processor processor;
340 struct mpc_config_bus bus;
341 struct mpc_config_ioapic ioapic;
342 struct mpc_config_lintsrc lintsrc;
343 int linttypes[2] = { mp_ExtINT, mp_NMI };
347 * local APIC has default address
349 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
352 * 2 CPUs, numbered 0 & 1.
354 processor.mpc_type = MP_PROCESSOR;
355 processor.mpc_apicver = 0;
356 processor.mpc_cpuflag = CPU_ENABLED;
357 processor.mpc_cpufeature = 0;
358 processor.mpc_featureflag = 0;
359 processor.mpc_reserved[0] = 0;
360 processor.mpc_reserved[1] = 0;
361 for (i = 0; i < 2; i++) {
362 processor.mpc_apicid = i;
363 MP_processor_info(&processor);
366 bus.mpc_type = MP_BUS;
368 switch (mpc_default_type) {
370 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
375 memcpy(bus.mpc_bustype, "ISA ", 6);
379 if (mpc_default_type > 4) {
381 memcpy(bus.mpc_bustype, "PCI ", 6);
385 ioapic.mpc_type = MP_IOAPIC;
386 ioapic.mpc_apicid = 2;
387 ioapic.mpc_apicver = 0;
388 ioapic.mpc_flags = MPC_APIC_USABLE;
389 ioapic.mpc_apicaddr = 0xFEC00000;
390 MP_ioapic_info(&ioapic);
393 * We set up most of the low 16 IO-APIC pins according to MPS rules.
395 construct_default_ioirq_mptable(mpc_default_type);
397 lintsrc.mpc_type = MP_LINTSRC;
398 lintsrc.mpc_irqflag = 0; /* conforming */
399 lintsrc.mpc_srcbusid = 0;
400 lintsrc.mpc_srcbusirq = 0;
401 lintsrc.mpc_destapic = MP_APIC_ALL;
402 for (i = 0; i < 2; i++) {
403 lintsrc.mpc_irqtype = linttypes[i];
404 lintsrc.mpc_destapiclint = i;
405 MP_lintsrc_info(&lintsrc);
409 static struct intel_mp_floating *mpf_found;
412 * Scan the memory blocks for an SMP configuration block.
414 static void __init __get_smp_config(unsigned early)
416 struct intel_mp_floating *mpf = mpf_found;
418 if (acpi_lapic && early)
421 * ACPI supports both logical (e.g. Hyper-Threading) and physical
422 * processors, where MPS only supports physical.
424 if (acpi_lapic && acpi_ioapic) {
425 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
428 } else if (acpi_lapic)
429 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
430 "configuration information\n");
432 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
433 mpf->mpf_specification);
436 * Now see if we need to read further.
438 if (mpf->mpf_feature1 != 0) {
441 * local APIC has default address
443 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
447 printk(KERN_INFO "Default MP configuration #%d\n",
449 construct_default_ISA_mptable(mpf->mpf_feature1);
451 } else if (mpf->mpf_physptr) {
454 * Read the physical hardware table. Anything here will
455 * override the defaults.
457 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
458 smp_found_config = 0;
460 "BIOS bug, MP table errors detected!...\n");
461 printk(KERN_ERR "... disabling SMP support. "
462 "(tell your hw vendor)\n");
469 * If there are no explicit MP IRQ entries, then we are
470 * broken. We set up most of the low 16 IO-APIC pins to
471 * ISA defaults and hope it will work.
473 if (!mp_irq_entries) {
474 struct mpc_config_bus bus;
476 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
477 "using default mptable. "
478 "(tell your hw vendor)\n");
480 bus.mpc_type = MP_BUS;
482 memcpy(bus.mpc_bustype, "ISA ", 6);
485 construct_default_ioirq_mptable(0);
492 printk(KERN_INFO "Processors: %d\n", num_processors);
494 * Only use the first configuration found.
498 void __init early_get_smp_config(void)
503 void __init get_smp_config(void)
508 static int __init smp_scan_config(unsigned long base, unsigned long length,
511 extern void __bad_mpf_size(void);
512 unsigned int *bp = phys_to_virt(base);
513 struct intel_mp_floating *mpf;
515 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
516 if (sizeof(*mpf) != 16)
520 mpf = (struct intel_mp_floating *)bp;
521 if ((*bp == SMP_MAGIC_IDENT) &&
522 (mpf->mpf_length == 1) &&
523 !mpf_checksum((unsigned char *)bp, 16) &&
524 ((mpf->mpf_specification == 1)
525 || (mpf->mpf_specification == 4))) {
527 smp_found_config = 1;
533 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
534 if (mpf->mpf_physptr)
535 reserve_bootmem_generic(mpf->mpf_physptr,
545 static void __init __find_smp_config(unsigned reserve)
547 unsigned int address;
550 * FIXME: Linux assumes you have 640K of base ram..
551 * this continues the error...
553 * 1) Scan the bottom 1K for a signature
554 * 2) Scan the top 1K of base RAM
555 * 3) Scan the 64K of bios
557 if (smp_scan_config(0x0, 0x400, reserve) ||
558 smp_scan_config(639 * 0x400, 0x400, reserve) ||
559 smp_scan_config(0xF0000, 0x10000, reserve))
562 * If it is an SMP machine we should know now.
564 * there is a real-mode segmented pointer pointing to the
565 * 4K EBDA area at 0x40E, calculate and scan it here.
567 * NOTE! There are Linux loaders that will corrupt the EBDA
568 * area, and as such this kind of SMP config may be less
569 * trustworthy, simply because the SMP table may have been
570 * stomped on during early boot. These loaders are buggy and
573 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
576 address = get_bios_ebda();
578 smp_scan_config(address, 0x400, reserve);
581 void __init early_find_smp_config(void)
583 __find_smp_config(0);
586 void __init find_smp_config(void)
588 __find_smp_config(1);
591 /* --------------------------------------------------------------------------
592 ACPI-based MP Configuration
593 -------------------------------------------------------------------------- */
597 void __init mp_register_lapic_address(u64 address)
599 mp_lapic_addr = (unsigned long)address;
600 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
601 if (boot_cpu_physical_apicid == -1U)
602 boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
606 #define MP_MAX_IOAPIC_PIN 127
608 extern struct mp_ioapic_routing mp_ioapic_routing[MAX_IO_APICS];
610 static int mp_find_ioapic(int gsi)
614 /* Find the IOAPIC that manages this GSI. */
615 for (i = 0; i < nr_ioapics; i++) {
616 if ((gsi >= mp_ioapic_routing[i].gsi_base)
617 && (gsi <= mp_ioapic_routing[i].gsi_end))
621 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
625 static u8 uniq_ioapic_id(u8 id)
628 DECLARE_BITMAP(used, 256);
629 bitmap_zero(used, 256);
630 for (i = 0; i < nr_ioapics; i++) {
631 struct mpc_config_ioapic *ia = &mp_ioapics[i];
632 __set_bit(ia->mpc_apicid, used);
634 if (!test_bit(id, used))
636 return find_first_zero_bit(used, 256);
639 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
643 if (bad_ioapic(address))
648 mp_ioapics[idx].mpc_type = MP_IOAPIC;
649 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
650 mp_ioapics[idx].mpc_apicaddr = address;
652 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
653 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
654 mp_ioapics[idx].mpc_apicver = 0;
657 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
658 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
660 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
661 mp_ioapic_routing[idx].gsi_base = gsi_base;
662 mp_ioapic_routing[idx].gsi_end = gsi_base +
663 io_apic_get_redir_entries(idx);
665 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
666 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
667 mp_ioapics[idx].mpc_apicaddr,
668 mp_ioapic_routing[idx].gsi_base,
669 mp_ioapic_routing[idx].gsi_end);
674 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
676 struct mpc_config_intsrc intsrc;
681 * Convert 'gsi' to 'ioapic.pin'.
683 ioapic = mp_find_ioapic(gsi);
686 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
689 * TBD: This check is for faulty timer entries, where the override
690 * erroneously sets the trigger to level, resulting in a HUGE
691 * increase of timer interrupts!
693 if ((bus_irq == 0) && (trigger == 3))
696 intsrc.mpc_type = MP_INTSRC;
697 intsrc.mpc_irqtype = mp_INT;
698 intsrc.mpc_irqflag = (trigger << 2) | polarity;
699 intsrc.mpc_srcbus = MP_ISA_BUS;
700 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
701 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
702 intsrc.mpc_dstirq = pin; /* INTIN# */
704 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
705 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
706 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
707 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
709 mp_irqs[mp_irq_entries] = intsrc;
710 if (++mp_irq_entries == MAX_IRQ_SOURCES)
711 panic("Max # of irq sources exceeded!\n");
714 void __init mp_config_acpi_legacy_irqs(void)
716 struct mpc_config_intsrc intsrc;
721 * Fabricate the legacy ISA bus (bus #31).
723 set_bit(MP_ISA_BUS, mp_bus_not_pci);
726 * Locate the IOAPIC that manages the ISA IRQs (0-15).
728 ioapic = mp_find_ioapic(0);
732 intsrc.mpc_type = MP_INTSRC;
733 intsrc.mpc_irqflag = 0; /* Conforming */
734 intsrc.mpc_srcbus = MP_ISA_BUS;
735 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
738 * Use the default configuration for the IRQs 0-15. Unless
739 * overridden by (MADT) interrupt source override entries.
741 for (i = 0; i < 16; i++) {
744 for (idx = 0; idx < mp_irq_entries; idx++) {
745 struct mpc_config_intsrc *irq = mp_irqs + idx;
747 /* Do we already have a mapping for this ISA IRQ? */
748 if (irq->mpc_srcbus == MP_ISA_BUS
749 && irq->mpc_srcbusirq == i)
752 /* Do we already have a mapping for this IOAPIC pin */
753 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
754 (irq->mpc_dstirq == i))
758 if (idx != mp_irq_entries) {
759 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
760 continue; /* IRQ already used */
763 intsrc.mpc_irqtype = mp_INT;
764 intsrc.mpc_srcbusirq = i; /* Identity mapped */
765 intsrc.mpc_dstirq = i;
767 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
768 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
769 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
770 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
773 mp_irqs[mp_irq_entries] = intsrc;
774 if (++mp_irq_entries == MAX_IRQ_SOURCES)
775 panic("Max # of irq sources exceeded!\n");
779 int mp_register_gsi(u32 gsi, int triggering, int polarity)
785 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
788 /* Don't set up the ACPI SCI because it's already set up */
789 if (acpi_gbl_FADT.sci_interrupt == gsi)
792 ioapic = mp_find_ioapic(gsi);
794 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
798 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
801 * Avoid pin reprogramming. PRTs typically include entries
802 * with redundant pin->gsi mappings (but unique PCI devices);
803 * we only program the IOAPIC on the first.
805 bit = ioapic_pin % 32;
806 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
808 printk(KERN_ERR "Invalid reference to IOAPIC pin "
809 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
813 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
814 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
815 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
819 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
821 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
822 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
823 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
826 #endif /* CONFIG_ACPI */