1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/slab.h>
6 #include <linux/sched.h>
7 #include <linux/module.h>
9 #include <linux/clockchips.h>
10 #include <linux/ftrace.h>
11 #include <asm/system.h>
13 unsigned long idle_halt;
14 EXPORT_SYMBOL(idle_halt);
15 unsigned long idle_nomwait;
16 EXPORT_SYMBOL(idle_nomwait);
18 struct kmem_cache *task_xstate_cachep;
20 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
23 if (src->thread.xstate) {
24 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
26 if (!dst->thread.xstate)
28 WARN_ON((unsigned long)dst->thread.xstate & 15);
29 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
34 void free_thread_xstate(struct task_struct *tsk)
36 if (tsk->thread.xstate) {
37 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
38 tsk->thread.xstate = NULL;
42 void free_thread_info(struct thread_info *ti)
44 free_thread_xstate(ti->task);
45 free_pages((unsigned long)ti, get_order(THREAD_SIZE));
48 void arch_task_cache_init(void)
51 kmem_cache_create("task_xstate", xstate_size,
52 __alignof__(union thread_xstate),
57 * Idle related variables and functions
59 unsigned long boot_option_idle_override = 0;
60 EXPORT_SYMBOL(boot_option_idle_override);
63 * Powermanagement idle function, if any..
65 void (*pm_idle)(void);
66 EXPORT_SYMBOL(pm_idle);
70 * This halt magic was a workaround for ancient floppy DMA
71 * wreckage. It should be safe to remove.
73 static int hlt_counter;
74 void disable_hlt(void)
78 EXPORT_SYMBOL(disable_hlt);
84 EXPORT_SYMBOL(enable_hlt);
86 static inline int hlt_use_halt(void)
88 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
91 static inline int hlt_use_halt(void)
98 * We use this if we don't have any better
101 void default_idle(void)
103 if (hlt_use_halt()) {
104 struct power_trace it;
106 trace_power_start(&it, POWER_CSTATE, 1);
107 current_thread_info()->status &= ~TS_POLLING;
109 * TS_POLLING-cleared state must be visible before we
115 safe_halt(); /* enables interrupts racelessly */
118 current_thread_info()->status |= TS_POLLING;
119 trace_power_end(&it);
122 /* loop is done by the caller */
126 #ifdef CONFIG_APM_MODULE
127 EXPORT_SYMBOL(default_idle);
130 static void do_nothing(void *unused)
135 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
136 * pm_idle and update to new pm_idle value. Required while changing pm_idle
137 * handler on SMP systems.
139 * Caller must have changed pm_idle to the new value before the call. Old
140 * pm_idle value will not be used by any CPU after the return of this function.
142 void cpu_idle_wait(void)
145 /* kick all the CPUs so that they exit out of pm_idle */
146 smp_call_function(do_nothing, NULL, 1);
148 EXPORT_SYMBOL_GPL(cpu_idle_wait);
151 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
152 * which can obviate IPI to trigger checking of need_resched.
153 * We execute MONITOR against need_resched and enter optimized wait state
154 * through MWAIT. Whenever someone changes need_resched, we would be woken
155 * up from MWAIT (without an IPI).
157 * New with Core Duo processors, MWAIT can take some hints based on CPU
160 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
162 struct power_trace it;
164 trace_power_start(&it, POWER_CSTATE, (ax>>4)+1);
165 if (!need_resched()) {
166 __monitor((void *)¤t_thread_info()->flags, 0, 0);
171 trace_power_end(&it);
174 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
175 static void mwait_idle(void)
177 struct power_trace it;
178 if (!need_resched()) {
179 trace_power_start(&it, POWER_CSTATE, 1);
180 __monitor((void *)¤t_thread_info()->flags, 0, 0);
186 trace_power_end(&it);
192 * On SMP it's slightly faster (but much more power-consuming!)
193 * to poll the ->work.need_resched flag instead of waiting for the
194 * cross-CPU IPI to arrive. Use this option with caution.
196 static void poll_idle(void)
198 struct power_trace it;
200 trace_power_start(&it, POWER_CSTATE, 0);
202 while (!need_resched())
204 trace_power_end(&it);
208 * mwait selection logic:
210 * It depends on the CPU. For AMD CPUs that support MWAIT this is
211 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
212 * then depend on a clock divisor and current Pstate of the core. If
213 * all cores of a processor are in halt state (C1) the processor can
214 * enter the C1E (C1 enhanced) state. If mwait is used this will never
217 * idle=mwait overrides this decision and forces the usage of mwait.
219 static int __cpuinitdata force_mwait;
221 #define MWAIT_INFO 0x05
222 #define MWAIT_ECX_EXTENDED_INFO 0x01
223 #define MWAIT_EDX_C1 0xf0
225 static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
227 u32 eax, ebx, ecx, edx;
232 if (c->cpuid_level < MWAIT_INFO)
235 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
236 /* Check, whether EDX has extended info about MWAIT */
237 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
241 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
244 return (edx & MWAIT_EDX_C1);
248 * Check for AMD CPUs, which have potentially C1E support
250 static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
252 if (c->x86_vendor != X86_VENDOR_AMD)
258 /* Family 0x0f models < rev F do not have C1E */
259 if (c->x86 == 0x0f && c->x86_model < 0x40)
265 static cpumask_t c1e_mask = CPU_MASK_NONE;
266 static int c1e_detected;
268 void c1e_remove_cpu(int cpu)
270 cpu_clear(cpu, c1e_mask);
274 * C1E aware idle routine. We check for C1E active in the interrupt
275 * pending message MSR. If we detect C1E, then we handle it the same
276 * way as C3 power states (local apic timer and TSC stop)
278 static void c1e_idle(void)
286 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
287 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
289 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
290 mark_tsc_unstable("TSC halt in AMD C1E");
291 printk(KERN_INFO "System has AMD C1E enabled\n");
292 set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
297 int cpu = smp_processor_id();
299 if (!cpu_isset(cpu, c1e_mask)) {
300 cpu_set(cpu, c1e_mask);
302 * Force broadcast so ACPI can not interfere. Needs
303 * to run with interrupts enabled as it uses
307 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
309 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
313 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
318 * The switch back from broadcast mode needs to be
319 * called with interrupts disabled.
322 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
328 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
330 #ifdef CONFIG_X86_SMP
331 if (pm_idle == poll_idle && smp_num_siblings > 1) {
332 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
333 " performance may degrade.\n");
339 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
341 * One CPU supports mwait => All CPUs supports mwait
343 printk(KERN_INFO "using mwait in idle threads.\n");
344 pm_idle = mwait_idle;
345 } else if (check_c1e_idle(c)) {
346 printk(KERN_INFO "using C1E aware idle routine\n");
349 pm_idle = default_idle;
352 static int __init idle_setup(char *str)
357 if (!strcmp(str, "poll")) {
358 printk("using polling idle threads.\n");
360 } else if (!strcmp(str, "mwait"))
362 else if (!strcmp(str, "halt")) {
364 * When the boot option of idle=halt is added, halt is
365 * forced to be used for CPU idle. In such case CPU C2/C3
366 * won't be used again.
367 * To continue to load the CPU idle driver, don't touch
368 * the boot_option_idle_override.
370 pm_idle = default_idle;
373 } else if (!strcmp(str, "nomwait")) {
375 * If the boot option of "idle=nomwait" is added,
376 * it means that mwait will be disabled for CPU C2/C3
377 * states. In such case it won't touch the variable
378 * of boot_option_idle_override.
385 boot_option_idle_override = 1;
388 early_param("idle", idle_setup);