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1 /*
2  * Copyright 2002 Andi Kleen, SuSE Labs.
3  * Thanks to Ben LaHaise for precious feedback.
4  */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
11
12 #include <asm/e820.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
18
19 static inline int
20 within(unsigned long addr, unsigned long start, unsigned long end)
21 {
22         return addr >= start && addr < end;
23 }
24
25 /*
26  * Flushing functions
27  */
28
29 /**
30  * clflush_cache_range - flush a cache range with clflush
31  * @addr:       virtual start address
32  * @size:       number of bytes to flush
33  *
34  * clflush is an unordered instruction which needs fencing with mfence
35  * to avoid ordering issues.
36  */
37 void clflush_cache_range(void *vaddr, unsigned int size)
38 {
39         void *vend = vaddr + size - 1;
40
41         mb();
42
43         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
44                 clflush(vaddr);
45         /*
46          * Flush any possible final partial cacheline:
47          */
48         clflush(vend);
49
50         mb();
51 }
52
53 static void __cpa_flush_all(void *arg)
54 {
55         /*
56          * Flush all to work around Errata in early athlons regarding
57          * large page flushing.
58          */
59         __flush_tlb_all();
60
61         if (boot_cpu_data.x86_model >= 4)
62                 wbinvd();
63 }
64
65 static void cpa_flush_all(void)
66 {
67         BUG_ON(irqs_disabled());
68
69         on_each_cpu(__cpa_flush_all, NULL, 1, 1);
70 }
71
72 static void __cpa_flush_range(void *arg)
73 {
74         /*
75          * We could optimize that further and do individual per page
76          * tlb invalidates for a low number of pages. Caveat: we must
77          * flush the high aliases on 64bit as well.
78          */
79         __flush_tlb_all();
80 }
81
82 static void cpa_flush_range(unsigned long start, int numpages)
83 {
84         unsigned int i, level;
85         unsigned long addr;
86
87         BUG_ON(irqs_disabled());
88         WARN_ON(PAGE_ALIGN(start) != start);
89
90         on_each_cpu(__cpa_flush_range, NULL, 1, 1);
91
92         /*
93          * We only need to flush on one CPU,
94          * clflush is a MESI-coherent instruction that
95          * will cause all other CPUs to flush the same
96          * cachelines:
97          */
98         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
99                 pte_t *pte = lookup_address(addr, &level);
100
101                 /*
102                  * Only flush present addresses:
103                  */
104                 if (pte && pte_present(*pte))
105                         clflush_cache_range((void *) addr, PAGE_SIZE);
106         }
107 }
108
109 /*
110  * Certain areas of memory on x86 require very specific protection flags,
111  * for example the BIOS area or kernel text. Callers don't always get this
112  * right (again, ioremap() on BIOS memory is not uncommon) so this function
113  * checks and fixes these known static required protection bits.
114  */
115 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
116 {
117         pgprot_t forbidden = __pgprot(0);
118
119         /*
120          * The BIOS area between 640k and 1Mb needs to be executable for
121          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
122          */
123         if (within(__pa(address), BIOS_BEGIN, BIOS_END))
124                 pgprot_val(forbidden) |= _PAGE_NX;
125
126         /*
127          * The kernel text needs to be executable for obvious reasons
128          * Does not cover __inittext since that is gone later on
129          */
130         if (within(address, (unsigned long)_text, (unsigned long)_etext))
131                 pgprot_val(forbidden) |= _PAGE_NX;
132
133 #ifdef CONFIG_DEBUG_RODATA
134         /* The .rodata section needs to be read-only */
135         if (within(address, (unsigned long)__start_rodata,
136                                 (unsigned long)__end_rodata))
137                 pgprot_val(forbidden) |= _PAGE_RW;
138 #endif
139
140         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
141
142         return prot;
143 }
144
145 pte_t *lookup_address(unsigned long address, int *level)
146 {
147         pgd_t *pgd = pgd_offset_k(address);
148         pud_t *pud;
149         pmd_t *pmd;
150
151         *level = PG_LEVEL_NONE;
152
153         if (pgd_none(*pgd))
154                 return NULL;
155         pud = pud_offset(pgd, address);
156         if (pud_none(*pud))
157                 return NULL;
158         pmd = pmd_offset(pud, address);
159         if (pmd_none(*pmd))
160                 return NULL;
161
162         *level = PG_LEVEL_2M;
163         if (pmd_large(*pmd))
164                 return (pte_t *)pmd;
165
166         *level = PG_LEVEL_4K;
167         return pte_offset_kernel(pmd, address);
168 }
169
170 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
171 {
172         /* change init_mm */
173         set_pte_atomic(kpte, pte);
174 #ifdef CONFIG_X86_32
175         if (!SHARED_KERNEL_PMD) {
176                 struct page *page;
177
178                 list_for_each_entry(page, &pgd_list, lru) {
179                         pgd_t *pgd;
180                         pud_t *pud;
181                         pmd_t *pmd;
182
183                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
184                         pud = pud_offset(pgd, address);
185                         pmd = pmd_offset(pud, address);
186                         set_pte_atomic((pte_t *)pmd, pte);
187                 }
188         }
189 #endif
190 }
191
192 static int split_large_page(pte_t *kpte, unsigned long address)
193 {
194         pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
195         gfp_t gfp_flags = GFP_KERNEL;
196         unsigned long flags;
197         unsigned long addr;
198         pte_t *pbase, *tmp;
199         struct page *base;
200         unsigned int i, level;
201
202 #ifdef CONFIG_DEBUG_PAGEALLOC
203         gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
204         gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
205 #endif
206         base = alloc_pages(gfp_flags, 0);
207         if (!base)
208                 return -ENOMEM;
209
210         spin_lock_irqsave(&pgd_lock, flags);
211         /*
212          * Check for races, another CPU might have split this page
213          * up for us already:
214          */
215         tmp = lookup_address(address, &level);
216         if (tmp != kpte) {
217                 WARN_ON_ONCE(1);
218                 goto out_unlock;
219         }
220
221         address = __pa(address);
222         addr = address & LARGE_PAGE_MASK;
223         pbase = (pte_t *)page_address(base);
224 #ifdef CONFIG_X86_32
225         paravirt_alloc_pt(&init_mm, page_to_pfn(base));
226 #endif
227
228         for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE)
229                 set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT, ref_prot));
230
231         /*
232          * Install the new, split up pagetable. Important detail here:
233          *
234          * On Intel the NX bit of all levels must be cleared to make a
235          * page executable. See section 4.13.2 of Intel 64 and IA-32
236          * Architectures Software Developer's Manual).
237          */
238         ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
239         __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
240         base = NULL;
241
242 out_unlock:
243         spin_unlock_irqrestore(&pgd_lock, flags);
244
245         if (base)
246                 __free_pages(base, 0);
247
248         return 0;
249 }
250
251 static int
252 __change_page_attr(unsigned long address, unsigned long pfn,
253                    pgprot_t mask_set, pgprot_t mask_clr)
254 {
255         struct page *kpte_page;
256         int level, err = 0;
257         pte_t *kpte;
258
259 #ifdef CONFIG_X86_32
260         BUG_ON(pfn > max_low_pfn);
261 #endif
262
263 repeat:
264         kpte = lookup_address(address, &level);
265         if (!kpte)
266                 return -EINVAL;
267
268         kpte_page = virt_to_page(kpte);
269         BUG_ON(PageLRU(kpte_page));
270         BUG_ON(PageCompound(kpte_page));
271
272         if (level == PG_LEVEL_4K) {
273                 pgprot_t new_prot = pte_pgprot(*kpte);
274                 pte_t new_pte, old_pte = *kpte;
275
276                 pgprot_val(new_prot) &= ~pgprot_val(mask_clr);
277                 pgprot_val(new_prot) |= pgprot_val(mask_set);
278
279                 new_prot = static_protections(new_prot, address);
280
281                 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
282                 BUG_ON(pte_pfn(new_pte) != pte_pfn(old_pte));
283
284                 set_pte_atomic(kpte, new_pte);
285         } else {
286                 err = split_large_page(kpte, address);
287                 if (!err)
288                         goto repeat;
289         }
290         return err;
291 }
292
293 /**
294  * change_page_attr_addr - Change page table attributes in linear mapping
295  * @address: Virtual address in linear mapping.
296  * @prot:    New page table attribute (PAGE_*)
297  *
298  * Change page attributes of a page in the direct mapping. This is a variant
299  * of change_page_attr() that also works on memory holes that do not have
300  * mem_map entry (pfn_valid() is false).
301  *
302  * See change_page_attr() documentation for more details.
303  *
304  * Modules and drivers should use the set_memory_* APIs instead.
305  */
306
307 #define HIGH_MAP_START  __START_KERNEL_map
308 #define HIGH_MAP_END    (__START_KERNEL_map + KERNEL_TEXT_SIZE)
309
310 static int
311 change_page_attr_addr(unsigned long address, pgprot_t mask_set,
312                       pgprot_t mask_clr)
313 {
314         unsigned long phys_addr = __pa(address);
315         unsigned long pfn = phys_addr >> PAGE_SHIFT;
316         int err;
317
318 #ifdef CONFIG_X86_64
319         /*
320          * If we are inside the high mapped kernel range, then we
321          * fixup the low mapping first. __va() returns the virtual
322          * address in the linear mapping:
323          */
324         if (within(address, HIGH_MAP_START, HIGH_MAP_END))
325                 address = (unsigned long) __va(phys_addr);
326 #endif
327
328         err = __change_page_attr(address, pfn, mask_set, mask_clr);
329         if (err)
330                 return err;
331
332 #ifdef CONFIG_X86_64
333         /*
334          * If the physical address is inside the kernel map, we need
335          * to touch the high mapped kernel as well:
336          */
337         if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
338                 /*
339                  * Calc the high mapping address. See __phys_addr()
340                  * for the non obvious details.
341                  */
342                 address = phys_addr + HIGH_MAP_START - phys_base;
343                 /* Make sure the kernel mappings stay executable */
344                 pgprot_val(mask_clr) |= _PAGE_NX;
345
346                 /*
347                  * Our high aliases are imprecise, because we check
348                  * everything between 0 and KERNEL_TEXT_SIZE, so do
349                  * not propagate lookup failures back to users:
350                  */
351                 __change_page_attr(address, pfn, mask_set, mask_clr);
352         }
353 #endif
354         return err;
355 }
356
357 static int __change_page_attr_set_clr(unsigned long addr, int numpages,
358                                       pgprot_t mask_set, pgprot_t mask_clr)
359 {
360         unsigned int i;
361         int ret;
362
363         for (i = 0; i < numpages ; i++, addr += PAGE_SIZE) {
364                 ret = change_page_attr_addr(addr, mask_set, mask_clr);
365                 if (ret)
366                         return ret;
367         }
368
369         return 0;
370 }
371
372 static int change_page_attr_set_clr(unsigned long addr, int numpages,
373                                     pgprot_t mask_set, pgprot_t mask_clr)
374 {
375         int ret = __change_page_attr_set_clr(addr, numpages, mask_set,
376                                              mask_clr);
377
378         /*
379          * On success we use clflush, when the CPU supports it to
380          * avoid the wbindv. If the CPU does not support it and in the
381          * error case we fall back to cpa_flush_all (which uses
382          * wbindv):
383          */
384         if (!ret && cpu_has_clflush)
385                 cpa_flush_range(addr, numpages);
386         else
387                 cpa_flush_all();
388
389         return ret;
390 }
391
392 static inline int change_page_attr_set(unsigned long addr, int numpages,
393                                        pgprot_t mask)
394 {
395         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
396 }
397
398 static inline int change_page_attr_clear(unsigned long addr, int numpages,
399                                          pgprot_t mask)
400 {
401         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
402 }
403
404 int set_memory_uc(unsigned long addr, int numpages)
405 {
406         return change_page_attr_set(addr, numpages,
407                                     __pgprot(_PAGE_PCD | _PAGE_PWT));
408 }
409 EXPORT_SYMBOL(set_memory_uc);
410
411 int set_memory_wb(unsigned long addr, int numpages)
412 {
413         return change_page_attr_clear(addr, numpages,
414                                       __pgprot(_PAGE_PCD | _PAGE_PWT));
415 }
416 EXPORT_SYMBOL(set_memory_wb);
417
418 int set_memory_x(unsigned long addr, int numpages)
419 {
420         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
421 }
422 EXPORT_SYMBOL(set_memory_x);
423
424 int set_memory_nx(unsigned long addr, int numpages)
425 {
426         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
427 }
428 EXPORT_SYMBOL(set_memory_nx);
429
430 int set_memory_ro(unsigned long addr, int numpages)
431 {
432         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
433 }
434
435 int set_memory_rw(unsigned long addr, int numpages)
436 {
437         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
438 }
439
440 int set_memory_np(unsigned long addr, int numpages)
441 {
442         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
443 }
444
445 int set_pages_uc(struct page *page, int numpages)
446 {
447         unsigned long addr = (unsigned long)page_address(page);
448
449         return set_memory_uc(addr, numpages);
450 }
451 EXPORT_SYMBOL(set_pages_uc);
452
453 int set_pages_wb(struct page *page, int numpages)
454 {
455         unsigned long addr = (unsigned long)page_address(page);
456
457         return set_memory_wb(addr, numpages);
458 }
459 EXPORT_SYMBOL(set_pages_wb);
460
461 int set_pages_x(struct page *page, int numpages)
462 {
463         unsigned long addr = (unsigned long)page_address(page);
464
465         return set_memory_x(addr, numpages);
466 }
467 EXPORT_SYMBOL(set_pages_x);
468
469 int set_pages_nx(struct page *page, int numpages)
470 {
471         unsigned long addr = (unsigned long)page_address(page);
472
473         return set_memory_nx(addr, numpages);
474 }
475 EXPORT_SYMBOL(set_pages_nx);
476
477 int set_pages_ro(struct page *page, int numpages)
478 {
479         unsigned long addr = (unsigned long)page_address(page);
480
481         return set_memory_ro(addr, numpages);
482 }
483
484 int set_pages_rw(struct page *page, int numpages)
485 {
486         unsigned long addr = (unsigned long)page_address(page);
487
488         return set_memory_rw(addr, numpages);
489 }
490
491
492 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_CPA_DEBUG)
493 static inline int __change_page_attr_set(unsigned long addr, int numpages,
494                                          pgprot_t mask)
495 {
496         return __change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
497 }
498
499 static inline int __change_page_attr_clear(unsigned long addr, int numpages,
500                                            pgprot_t mask)
501 {
502         return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
503 }
504 #endif
505
506 #ifdef CONFIG_DEBUG_PAGEALLOC
507
508 static int __set_pages_p(struct page *page, int numpages)
509 {
510         unsigned long addr = (unsigned long)page_address(page);
511
512         return __change_page_attr_set(addr, numpages,
513                                       __pgprot(_PAGE_PRESENT | _PAGE_RW));
514 }
515
516 static int __set_pages_np(struct page *page, int numpages)
517 {
518         unsigned long addr = (unsigned long)page_address(page);
519
520         return __change_page_attr_clear(addr, numpages,
521                                         __pgprot(_PAGE_PRESENT));
522 }
523
524 void kernel_map_pages(struct page *page, int numpages, int enable)
525 {
526         if (PageHighMem(page))
527                 return;
528         if (!enable) {
529                 debug_check_no_locks_freed(page_address(page),
530                                            numpages * PAGE_SIZE);
531         }
532
533         /*
534          * If page allocator is not up yet then do not call c_p_a():
535          */
536         if (!debug_pagealloc_enabled)
537                 return;
538
539         /*
540          * The return value is ignored - the calls cannot fail,
541          * large pages are disabled at boot time:
542          */
543         if (enable)
544                 __set_pages_p(page, numpages);
545         else
546                 __set_pages_np(page, numpages);
547
548         /*
549          * We should perform an IPI and flush all tlbs,
550          * but that can deadlock->flush only current cpu:
551          */
552         __flush_tlb_all();
553 }
554 #endif
555
556 /*
557  * The testcases use internal knowledge of the implementation that shouldn't
558  * be exposed to the rest of the kernel. Include these directly here.
559  */
560 #ifdef CONFIG_CPA_DEBUG
561 #include "pageattr-test.c"
562 #endif