arch/x86/mm/pageattr.c

   1 /*
   2  * Copyright 2002 Andi Kleen, SuSE Labs.
   3  * Thanks to Ben LaHaise for precious feedback.
   4  */
   5 #include <linux/highmem.h>
   6 #include <linux/bootmem.h>
   7 #include <linux/module.h>
   8 #include <linux/sched.h>
   9 #include <linux/slab.h>
  10 #include <linux/mm.h>
  11
  12 #include <asm/e820.h>
  13 #include <asm/processor.h>
  14 #include <asm/tlbflush.h>
  15 #include <asm/sections.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/pgalloc.h>
  18
  19 static inline int
  20 within(unsigned long addr, unsigned long start, unsigned long end)
  21 {
  22         return addr >= start && addr < end;
  23 }
  24
  25 /*
  26  * Flushing functions
  27  */
  28
  29
  30 /**
  31  * clflush_cache_range - flush a cache range with clflush
  32  * @addr:       virtual start address
  33  * @size:       number of bytes to flush
  34  *
  35  * clflush is an unordered instruction which needs fencing with mfence
  36  * to avoid ordering issues.
  37  */
  38 void clflush_cache_range(void *addr, int size)
  39 {
  40         int i;
  41
  42         mb();
  43         for (i = 0; i < size; i += boot_cpu_data.x86_clflush_size)
  44                 clflush(addr+i);
  45         mb();
  46 }
  47
  48 static void __cpa_flush_all(void *arg)
  49 {
  50         /*
  51          * Flush all to work around Errata in early athlons regarding
  52          * large page flushing.
  53          */
  54         __flush_tlb_all();
  55
  56         if (boot_cpu_data.x86_model >= 4)
  57                 wbinvd();
  58 }
  59
  60 static void cpa_flush_all(void)
  61 {
  62         BUG_ON(irqs_disabled());
  63
  64         on_each_cpu(__cpa_flush_all, NULL, 1, 1);
  65 }
  66
  67 static void __cpa_flush_range(void *arg)
  68 {
  69         /*
  70          * We could optimize that further and do individual per page
  71          * tlb invalidates for a low number of pages. Caveat: we must
  72          * flush the high aliases on 64bit as well.
  73          */
  74         __flush_tlb_all();
  75 }
  76
  77 static void cpa_flush_range(unsigned long addr, int numpages)
  78 {
  79         BUG_ON(irqs_disabled());
  80
  81         on_each_cpu(__cpa_flush_range, NULL, 1, 1);
  82
  83         /*
  84          * We only need to flush on one CPU,
  85          * clflush is a MESI-coherent instruction that
  86          * will cause all other CPUs to flush the same
  87          * cachelines:
  88          */
  89         clflush_cache_range((void *) addr, numpages * PAGE_SIZE);
  90 }
  91
  92 /*
  93  * Certain areas of memory on x86 require very specific protection flags,
  94  * for example the BIOS area or kernel text. Callers don't always get this
  95  * right (again, ioremap() on BIOS memory is not uncommon) so this function
  96  * checks and fixes these known static required protection bits.
  97  */
  98 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
  99 {
 100         pgprot_t forbidden = __pgprot(0);
 101
 102         /*
 103          * The BIOS area between 640k and 1Mb needs to be executable for
 104          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
 105          */
 106         if (within(__pa(address), BIOS_BEGIN, BIOS_END))
 107                 pgprot_val(forbidden) |= _PAGE_NX;
 108
 109         /*
 110          * The kernel text needs to be executable for obvious reasons
 111          * Does not cover __inittext since that is gone later on
 112          */
 113         if (within(address, (unsigned long)_text, (unsigned long)_etext))
 114                 pgprot_val(forbidden) |= _PAGE_NX;
 115
 116 #ifdef CONFIG_DEBUG_RODATA
 117         /* The .rodata section needs to be read-only */
 118         if (within(address, (unsigned long)__start_rodata,
 119                                 (unsigned long)__end_rodata))
 120                 pgprot_val(forbidden) |= _PAGE_RW;
 121 #endif
 122
 123         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
 124
 125         return prot;
 126 }
 127
 128 pte_t *lookup_address(unsigned long address, int *level)
 129 {
 130         pgd_t *pgd = pgd_offset_k(address);
 131         pud_t *pud;
 132         pmd_t *pmd;
 133
 134         *level = PG_LEVEL_NONE;
 135
 136         if (pgd_none(*pgd))
 137                 return NULL;
 138         pud = pud_offset(pgd, address);
 139         if (pud_none(*pud))
 140                 return NULL;
 141         pmd = pmd_offset(pud, address);
 142         if (pmd_none(*pmd))
 143                 return NULL;
 144
 145         *level = PG_LEVEL_2M;
 146         if (pmd_large(*pmd))
 147                 return (pte_t *)pmd;
 148
 149         *level = PG_LEVEL_4K;
 150         return pte_offset_kernel(pmd, address);
 151 }
 152
 153 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
 154 {
 155         /* change init_mm */
 156         set_pte_atomic(kpte, pte);
 157 #ifdef CONFIG_X86_32
 158         if (!SHARED_KERNEL_PMD) {
 159                 struct page *page;
 160
 161                 for (page = pgd_list; page; page = (struct page *)page->index) {
 162                         pgd_t *pgd;
 163                         pud_t *pud;
 164                         pmd_t *pmd;
 165
 166                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
 167                         pud = pud_offset(pgd, address);
 168                         pmd = pmd_offset(pud, address);
 169                         set_pte_atomic((pte_t *)pmd, pte);
 170                 }
 171         }
 172 #endif
 173 }
 174
 175 static int split_large_page(pte_t *kpte, unsigned long address)
 176 {
 177         pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
 178         gfp_t gfp_flags = GFP_KERNEL;
 179         unsigned long flags;
 180         unsigned long addr;
 181         pte_t *pbase, *tmp;
 182         struct page *base;
 183         int i, level;
 184
 185 #ifdef CONFIG_DEBUG_PAGEALLOC
 186         gfp_flags = GFP_ATOMIC;
 187 #endif
 188         base = alloc_pages(gfp_flags, 0);
 189         if (!base)
 190                 return -ENOMEM;
 191
 192         spin_lock_irqsave(&pgd_lock, flags);
 193         /*
 194          * Check for races, another CPU might have split this page
 195          * up for us already:
 196          */
 197         tmp = lookup_address(address, &level);
 198         if (tmp != kpte) {
 199                 WARN_ON_ONCE(1);
 200                 goto out_unlock;
 201         }
 202
 203         address = __pa(address);
 204         addr = address & LARGE_PAGE_MASK;
 205         pbase = (pte_t *)page_address(base);
 206 #ifdef CONFIG_X86_32
 207         paravirt_alloc_pt(&init_mm, page_to_pfn(base));
 208 #endif
 209
 210         for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE)
 211                 set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT, ref_prot));
 212
 213         /*
 214          * Install the new, split up pagetable. Important detail here:
 215          *
 216          * On Intel the NX bit of all levels must be cleared to make a
 217          * page executable. See section 4.13.2 of Intel 64 and IA-32
 218          * Architectures Software Developer's Manual).
 219          */
 220         ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
 221         __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
 222         base = NULL;
 223
 224 out_unlock:
 225         spin_unlock_irqrestore(&pgd_lock, flags);
 226
 227         if (base)
 228                 __free_pages(base, 0);
 229
 230         return 0;
 231 }
 232
 233 static int
 234 __change_page_attr(unsigned long address, unsigned long pfn, pgprot_t prot)
 235 {
 236         struct page *kpte_page;
 237         int level, err = 0;
 238         pte_t *kpte;
 239
 240 #ifdef CONFIG_X86_32
 241         BUG_ON(pfn > max_low_pfn);
 242 #endif
 243
 244 repeat:
 245         kpte = lookup_address(address, &level);
 246         if (!kpte)
 247                 return -EINVAL;
 248
 249         kpte_page = virt_to_page(kpte);
 250         BUG_ON(PageLRU(kpte_page));
 251         BUG_ON(PageCompound(kpte_page));
 252
 253         prot = static_protections(prot, address);
 254
 255         if (level == PG_LEVEL_4K) {
 256                 WARN_ON_ONCE(pgprot_val(prot) & _PAGE_PSE);
 257                 set_pte_atomic(kpte, pfn_pte(pfn, canon_pgprot(prot)));
 258         } else {
 259                 /* Clear the PSE bit for the 4k level pages ! */
 260                 pgprot_val(prot) = pgprot_val(prot) & ~_PAGE_PSE;
 261
 262                 err = split_large_page(kpte, address);
 263                 if (!err)
 264                         goto repeat;
 265         }
 266         return err;
 267 }
 268
 269 /**
 270  * change_page_attr_addr - Change page table attributes in linear mapping
 271  * @address: Virtual address in linear mapping.
 272  * @prot:    New page table attribute (PAGE_*)
 273  *
 274  * Change page attributes of a page in the direct mapping. This is a variant
 275  * of change_page_attr() that also works on memory holes that do not have
 276  * mem_map entry (pfn_valid() is false).
 277  *
 278  * See change_page_attr() documentation for more details.
 279  *
 280  * Modules and drivers should use the set_memory_* APIs instead.
 281  */
 282
 283 static int change_page_attr_addr(unsigned long address, pgprot_t prot)
 284 {
 285         int err = 0, kernel_map = 0;
 286         unsigned long pfn = __pa(address) >> PAGE_SHIFT;
 287
 288 #ifdef CONFIG_X86_64
 289         if (address >= __START_KERNEL_map &&
 290                         address < __START_KERNEL_map + KERNEL_TEXT_SIZE) {
 291
 292                 address = (unsigned long)__va(__pa(address));
 293                 kernel_map = 1;
 294         }
 295 #endif
 296
 297         if (!kernel_map || pte_present(pfn_pte(0, prot))) {
 298                 err = __change_page_attr(address, pfn, prot);
 299                 if (err)
 300                         return err;
 301         }
 302
 303 #ifdef CONFIG_X86_64
 304         /*
 305          * Handle kernel mapping too which aliases part of
 306          * lowmem:
 307          */
 308         if (__pa(address) < KERNEL_TEXT_SIZE) {
 309                 unsigned long addr2;
 310                 pgprot_t prot2;
 311
 312                 addr2 = __START_KERNEL_map + __pa(address);
 313                 /* Make sure the kernel mappings stay executable */
 314                 prot2 = pte_pgprot(pte_mkexec(pfn_pte(0, prot)));
 315                 err = __change_page_attr(addr2, pfn, prot2);
 316         }
 317 #endif
 318
 319         return err;
 320 }
 321
 322 static int __change_page_attr_set_clr(unsigned long addr, int numpages,
 323                                       pgprot_t mask_set, pgprot_t mask_clr)
 324 {
 325         pgprot_t new_prot;
 326         int level;
 327         pte_t *pte;
 328         int i, ret;
 329
 330         for (i = 0; i < numpages ; i++) {
 331
 332                 pte = lookup_address(addr, &level);
 333                 if (!pte)
 334                         return -EINVAL;
 335
 336                 new_prot = pte_pgprot(*pte);
 337
 338                 pgprot_val(new_prot) &= ~pgprot_val(mask_clr);
 339                 pgprot_val(new_prot) |= pgprot_val(mask_set);
 340
 341                 ret = change_page_attr_addr(addr, new_prot);
 342                 if (ret)
 343                         return ret;
 344                 addr += PAGE_SIZE;
 345         }
 346
 347         return 0;
 348 }
 349
 350 static int change_page_attr_set_clr(unsigned long addr, int numpages,
 351                                     pgprot_t mask_set, pgprot_t mask_clr)
 352 {
 353         int ret = __change_page_attr_set_clr(addr, numpages, mask_set,
 354                                              mask_clr);
 355
 356         /*
 357          * On success we use clflush, when the CPU supports it to
 358          * avoid the wbindv. If the CPU does not support it and in the
 359          * error case we fall back to cpa_flush_all (which uses
 360          * wbindv):
 361          */
 362         if (!ret && cpu_has_clflush)
 363                 cpa_flush_range(addr, numpages);
 364         else
 365                 cpa_flush_all();
 366
 367         return ret;
 368 }
 369
 370 static inline int change_page_attr_set(unsigned long addr, int numpages,
 371                                        pgprot_t mask)
 372 {
 373         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
 374 }
 375
 376 static inline int change_page_attr_clear(unsigned long addr, int numpages,
 377                                          pgprot_t mask)
 378 {
 379         return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
 380
 381 }
 382
 383 int set_memory_uc(unsigned long addr, int numpages)
 384 {
 385         return change_page_attr_set(addr, numpages,
 386                                     __pgprot(_PAGE_PCD | _PAGE_PWT));
 387 }
 388 EXPORT_SYMBOL(set_memory_uc);
 389
 390 int set_memory_wb(unsigned long addr, int numpages)
 391 {
 392         return change_page_attr_clear(addr, numpages,
 393                                       __pgprot(_PAGE_PCD | _PAGE_PWT));
 394 }
 395 EXPORT_SYMBOL(set_memory_wb);
 396
 397 int set_memory_x(unsigned long addr, int numpages)
 398 {
 399         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
 400 }
 401 EXPORT_SYMBOL(set_memory_x);
 402
 403 int set_memory_nx(unsigned long addr, int numpages)
 404 {
 405         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
 406 }
 407 EXPORT_SYMBOL(set_memory_nx);
 408
 409 int set_memory_ro(unsigned long addr, int numpages)
 410 {
 411         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
 412 }
 413
 414 int set_memory_rw(unsigned long addr, int numpages)
 415 {
 416         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
 417 }
 418
 419 int set_memory_np(unsigned long addr, int numpages)
 420 {
 421         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
 422 }
 423
 424 int set_pages_uc(struct page *page, int numpages)
 425 {
 426         unsigned long addr = (unsigned long)page_address(page);
 427
 428         return set_memory_uc(addr, numpages);
 429 }
 430 EXPORT_SYMBOL(set_pages_uc);
 431
 432 int set_pages_wb(struct page *page, int numpages)
 433 {
 434         unsigned long addr = (unsigned long)page_address(page);
 435
 436         return set_memory_wb(addr, numpages);
 437 }
 438 EXPORT_SYMBOL(set_pages_wb);
 439
 440 int set_pages_x(struct page *page, int numpages)
 441 {
 442         unsigned long addr = (unsigned long)page_address(page);
 443
 444         return set_memory_x(addr, numpages);
 445 }
 446 EXPORT_SYMBOL(set_pages_x);
 447
 448 int set_pages_nx(struct page *page, int numpages)
 449 {
 450         unsigned long addr = (unsigned long)page_address(page);
 451
 452         return set_memory_nx(addr, numpages);
 453 }
 454 EXPORT_SYMBOL(set_pages_nx);
 455
 456 int set_pages_ro(struct page *page, int numpages)
 457 {
 458         unsigned long addr = (unsigned long)page_address(page);
 459
 460         return set_memory_ro(addr, numpages);
 461 }
 462
 463 int set_pages_rw(struct page *page, int numpages)
 464 {
 465         unsigned long addr = (unsigned long)page_address(page);
 466
 467         return set_memory_rw(addr, numpages);
 468 }
 469
 470
 471 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_CPA_DEBUG)
 472 static inline int __change_page_attr_set(unsigned long addr, int numpages,
 473                                          pgprot_t mask)
 474 {
 475         return __change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
 476 }
 477
 478 static inline int __change_page_attr_clear(unsigned long addr, int numpages,
 479                                            pgprot_t mask)
 480 {
 481         return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
 482 }
 483 #endif
 484
 485 #ifdef CONFIG_DEBUG_PAGEALLOC
 486
 487 static int __set_pages_p(struct page *page, int numpages)
 488 {
 489         unsigned long addr = (unsigned long)page_address(page);
 490
 491         return __change_page_attr_set(addr, numpages,
 492                                       __pgprot(_PAGE_PRESENT | _PAGE_RW));
 493 }
 494
 495 static int __set_pages_np(struct page *page, int numpages)
 496 {
 497         unsigned long addr = (unsigned long)page_address(page);
 498
 499         return __change_page_attr_clear(addr, numpages,
 500                                         __pgprot(_PAGE_PRESENT));
 501 }
 502
 503 void kernel_map_pages(struct page *page, int numpages, int enable)
 504 {
 505         if (PageHighMem(page))
 506                 return;
 507         if (!enable) {
 508                 debug_check_no_locks_freed(page_address(page),
 509                                            numpages * PAGE_SIZE);
 510         }
 511
 512         /*
 513          * If page allocator is not up yet then do not call c_p_a():
 514          */
 515         if (!debug_pagealloc_enabled)
 516                 return;
 517
 518         /*
 519          * The return value is ignored - the calls cannot fail,
 520          * large pages are disabled at boot time:
 521          */
 522         if (enable)
 523                 __set_pages_p(page, numpages);
 524         else
 525                 __set_pages_np(page, numpages);
 526
 527         /*
 528          * We should perform an IPI and flush all tlbs,
 529          * but that can deadlock->flush only current cpu:
 530          */
 531         __flush_tlb_all();
 532 }
 533 #endif
 534
 535 /*
 536  * The testcases use internal knowledge of the implementation that shouldn't
 537  * be exposed to the rest of the kernel. Include these directly here.
 538  */
 539 #ifdef CONFIG_CPA_DEBUG
 540 #include "pageattr-test.c"
 541 #endif