2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/root_dev.h>
39 #include <linux/pci.h>
40 #include <linux/acpi.h>
41 #include <linux/kallsyms.h>
42 #include <linux/edd.h>
43 #include <linux/mmzone.h>
46 #include <asm/uaccess.h>
47 #include <asm/system.h>
52 #include <video/edid.h>
55 #include <asm/mpspec.h>
56 #include <asm/mmu_context.h>
57 #include <asm/bootsetup.h>
58 #include <asm/proto.h>
59 #include <asm/setup.h>
60 #include <asm/mach_apic.h>
67 struct cpuinfo_x86 boot_cpu_data;
69 unsigned long mmu_cr4_features;
72 EXPORT_SYMBOL(acpi_disabled);
73 #ifdef CONFIG_ACPI_BOOT
74 extern int __initdata acpi_ht;
75 extern acpi_interrupt_flags acpi_sci_flags;
76 int __initdata acpi_force = 0;
79 int acpi_numa __initdata;
81 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
84 unsigned long saved_video_mode;
88 EXPORT_SYMBOL(swiotlb);
94 struct drive_info_struct { char dummy[32]; } drive_info;
95 struct screen_info screen_info;
96 struct sys_desc_table_struct {
97 unsigned short length;
98 unsigned char table[0];
101 struct edid_info edid_info;
104 extern int root_mountflags;
105 extern char _text, _etext, _edata, _end;
107 char command_line[COMMAND_LINE_SIZE];
109 struct resource standard_io_resources[] = {
110 { .name = "dma1", .start = 0x00, .end = 0x1f,
111 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
112 { .name = "pic1", .start = 0x20, .end = 0x21,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "timer0", .start = 0x40, .end = 0x43,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "timer1", .start = 0x50, .end = 0x53,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "keyboard", .start = 0x60, .end = 0x6f,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "pic2", .start = 0xa0, .end = 0xa1,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "dma2", .start = 0xc0, .end = 0xdf,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "fpu", .start = 0xf0, .end = 0xff,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
130 #define STANDARD_IO_RESOURCES \
131 (sizeof standard_io_resources / sizeof standard_io_resources[0])
133 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
135 struct resource data_resource = {
136 .name = "Kernel data",
139 .flags = IORESOURCE_RAM,
141 struct resource code_resource = {
142 .name = "Kernel code",
145 .flags = IORESOURCE_RAM,
148 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
150 static struct resource system_rom_resource = {
151 .name = "System ROM",
154 .flags = IORESOURCE_ROM,
157 static struct resource extension_rom_resource = {
158 .name = "Extension ROM",
161 .flags = IORESOURCE_ROM,
164 static struct resource adapter_rom_resources[] = {
165 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
166 .flags = IORESOURCE_ROM },
167 { .name = "Adapter ROM", .start = 0, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM }
179 #define ADAPTER_ROM_RESOURCES \
180 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
182 static struct resource video_rom_resource = {
186 .flags = IORESOURCE_ROM,
189 static struct resource video_ram_resource = {
190 .name = "Video RAM area",
193 .flags = IORESOURCE_RAM,
196 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
198 static int __init romchecksum(unsigned char *rom, unsigned long length)
200 unsigned char *p, sum = 0;
202 for (p = rom; p < rom + length; p++)
207 static void __init probe_roms(void)
209 unsigned long start, length, upper;
214 upper = adapter_rom_resources[0].start;
215 for (start = video_rom_resource.start; start < upper; start += 2048) {
216 rom = isa_bus_to_virt(start);
217 if (!romsignature(rom))
220 video_rom_resource.start = start;
222 /* 0 < length <= 0x7f * 512, historically */
223 length = rom[2] * 512;
225 /* if checksum okay, trust length byte */
226 if (length && romchecksum(rom, length))
227 video_rom_resource.end = start + length - 1;
229 request_resource(&iomem_resource, &video_rom_resource);
233 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
238 request_resource(&iomem_resource, &system_rom_resource);
239 upper = system_rom_resource.start;
241 /* check for extension rom (ignore length byte!) */
242 rom = isa_bus_to_virt(extension_rom_resource.start);
243 if (romsignature(rom)) {
244 length = extension_rom_resource.end - extension_rom_resource.start + 1;
245 if (romchecksum(rom, length)) {
246 request_resource(&iomem_resource, &extension_rom_resource);
247 upper = extension_rom_resource.start;
251 /* check for adapter roms on 2k boundaries */
252 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
253 rom = isa_bus_to_virt(start);
254 if (!romsignature(rom))
257 /* 0 < length <= 0x7f * 512, historically */
258 length = rom[2] * 512;
260 /* but accept any length that fits if checksum okay */
261 if (!length || start + length > upper || !romchecksum(rom, length))
264 adapter_rom_resources[i].start = start;
265 adapter_rom_resources[i].end = start + length - 1;
266 request_resource(&iomem_resource, &adapter_rom_resources[i]);
268 start = adapter_rom_resources[i++].end & ~2047UL;
272 static __init void parse_cmdline_early (char ** cmdline_p)
274 char c = ' ', *to = command_line, *from = COMMAND_LINE;
277 /* Save unparsed command line copy for /proc/cmdline */
278 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
279 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
287 * If the BIOS enumerates physical processors before logical,
288 * maxcpus=N at enumeration-time can be used to disable HT.
290 else if (!memcmp(from, "maxcpus=", 8)) {
291 extern unsigned int maxcpus;
293 maxcpus = simple_strtoul(from + 8, NULL, 0);
296 #ifdef CONFIG_ACPI_BOOT
297 /* "acpi=off" disables both ACPI table parsing and interpreter init */
298 if (!memcmp(from, "acpi=off", 8))
301 if (!memcmp(from, "acpi=force", 10)) {
302 /* add later when we do DMI horrors: */
307 /* acpi=ht just means: do ACPI MADT parsing
308 at bootup, but don't enable the full ACPI interpreter */
309 if (!memcmp(from, "acpi=ht", 7)) {
314 else if (!memcmp(from, "pci=noacpi", 10))
316 else if (!memcmp(from, "acpi=noirq", 10))
319 else if (!memcmp(from, "acpi_sci=edge", 13))
320 acpi_sci_flags.trigger = 1;
321 else if (!memcmp(from, "acpi_sci=level", 14))
322 acpi_sci_flags.trigger = 3;
323 else if (!memcmp(from, "acpi_sci=high", 13))
324 acpi_sci_flags.polarity = 1;
325 else if (!memcmp(from, "acpi_sci=low", 12))
326 acpi_sci_flags.polarity = 3;
328 /* acpi=strict disables out-of-spec workarounds */
329 else if (!memcmp(from, "acpi=strict", 11)) {
332 #ifdef CONFIG_X86_IO_APIC
333 else if (!memcmp(from, "acpi_skip_timer_override", 24))
334 acpi_skip_timer_override = 1;
338 if (!memcmp(from, "nolapic", 7) ||
339 !memcmp(from, "disableapic", 11))
342 if (!memcmp(from, "noapic", 6))
343 skip_ioapic_setup = 1;
345 if (!memcmp(from, "apic", 4)) {
346 skip_ioapic_setup = 0;
350 if (!memcmp(from, "mem=", 4))
351 parse_memopt(from+4, &from);
354 if (!memcmp(from, "numa=", 5))
358 #ifdef CONFIG_GART_IOMMU
359 if (!memcmp(from,"iommu=",6)) {
364 if (!memcmp(from,"oops=panic", 10))
367 if (!memcmp(from, "noexec=", 7))
368 nonx_setup(from + 7);
374 if (COMMAND_LINE_SIZE <= ++len)
379 *cmdline_p = command_line;
384 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
386 unsigned long bootmap_size, bootmap;
388 memory_present(0, start_pfn, end_pfn);
389 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
390 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
392 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
393 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
394 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
395 reserve_bootmem(bootmap, bootmap_size);
399 /* Use inline assembly to define this because the nops are defined
400 as inline assembly strings in the include files and we cannot
401 get them easily into strings. */
402 asm("\t.data\nk8nops: "
403 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
406 extern unsigned char k8nops[];
407 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
413 k8nops + 1 + 2 + 3 + 4,
414 k8nops + 1 + 2 + 3 + 4 + 5,
415 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
416 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
419 /* Replace instructions with better alternatives for this CPU type.
421 This runs before SMP is initialized to avoid SMP problems with
422 self modifying code. This implies that assymetric systems where
423 APs have less capabilities than the boot processor are not handled.
424 In this case boot with "noreplacement". */
425 void apply_alternatives(void *start, void *end)
429 for (a = start; (void *)a < end; a++) {
430 if (!boot_cpu_has(a->cpuid))
433 BUG_ON(a->replacementlen > a->instrlen);
434 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
435 diff = a->instrlen - a->replacementlen;
437 /* Pad the rest with nops */
438 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
442 __inline_memcpy(a->instr + i, k8_nops[k], k);
447 static int no_replacement __initdata = 0;
449 void __init alternative_instructions(void)
451 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
454 apply_alternatives(__alt_instructions, __alt_instructions_end);
457 static int __init noreplacement_setup(char *s)
463 __setup("noreplacement", noreplacement_setup);
465 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
467 #ifdef CONFIG_EDD_MODULE
471 * copy_edd() - Copy the BIOS EDD information
472 * from boot_params into a safe place.
475 static inline void copy_edd(void)
477 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
478 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
479 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
480 edd.edd_info_nr = EDD_NR;
483 static inline void copy_edd(void)
488 #define EBDA_ADDR_POINTER 0x40E
489 static void __init reserve_ebda_region(void)
493 * there is a real-mode segmented pointer pointing to the
494 * 4K EBDA area at 0x40E
496 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
499 reserve_bootmem_generic(addr, PAGE_SIZE);
502 void __init setup_arch(char **cmdline_p)
504 unsigned long kernel_end;
506 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
507 drive_info = DRIVE_INFO;
508 screen_info = SCREEN_INFO;
509 edid_info = EDID_INFO;
510 saved_video_mode = SAVED_VIDEO_MODE;
511 bootloader_type = LOADER_TYPE;
513 #ifdef CONFIG_BLK_DEV_RAM
514 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
515 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
516 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
518 setup_memory_region();
521 if (!MOUNT_ROOT_RDONLY)
522 root_mountflags &= ~MS_RDONLY;
523 init_mm.start_code = (unsigned long) &_text;
524 init_mm.end_code = (unsigned long) &_etext;
525 init_mm.end_data = (unsigned long) &_edata;
526 init_mm.brk = (unsigned long) &_end;
528 code_resource.start = virt_to_phys(&_text);
529 code_resource.end = virt_to_phys(&_etext)-1;
530 data_resource.start = virt_to_phys(&_etext);
531 data_resource.end = virt_to_phys(&_edata)-1;
533 parse_cmdline_early(cmdline_p);
535 early_identify_cpu(&boot_cpu_data);
538 * partially used pages are not usable - thus
539 * we are rounding upwards:
541 end_pfn = e820_end_of_ram();
545 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
547 #ifdef CONFIG_ACPI_BOOT
549 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
550 * Call this early for SRAT node setup.
552 acpi_boot_table_init();
555 #ifdef CONFIG_ACPI_NUMA
557 * Parse SRAT to discover nodes.
563 numa_initmem_init(0, end_pfn);
565 contig_initmem_init(0, end_pfn);
568 /* Reserve direct mapping */
569 reserve_bootmem_generic(table_start << PAGE_SHIFT,
570 (table_end - table_start) << PAGE_SHIFT);
573 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
574 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
577 * reserve physical page 0 - it's a special BIOS page on many boxes,
578 * enabling clean reboots, SMP operation, laptop functions.
580 reserve_bootmem_generic(0, PAGE_SIZE);
582 /* reserve ebda region */
583 reserve_ebda_region();
587 * But first pinch a few for the stack/trampoline stuff
588 * FIXME: Don't need the extra page at 4K, but need to fix
589 * trampoline before removing it. (see the GDT stuff)
591 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
593 /* Reserve SMP trampoline */
594 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
597 #ifdef CONFIG_ACPI_SLEEP
599 * Reserve low memory region for sleep support.
601 acpi_reserve_bootmem();
603 #ifdef CONFIG_X86_LOCAL_APIC
605 * Find and reserve possible boot-time SMP configuration:
609 #ifdef CONFIG_BLK_DEV_INITRD
610 if (LOADER_TYPE && INITRD_START) {
611 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
612 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
614 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
615 initrd_end = initrd_start+INITRD_SIZE;
618 printk(KERN_ERR "initrd extends beyond end of memory "
619 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
620 (unsigned long)(INITRD_START + INITRD_SIZE),
621 (unsigned long)(end_pfn << PAGE_SHIFT));
632 #ifdef CONFIG_ACPI_BOOT
634 * Read APIC and some other early information from ACPI tables.
639 #ifdef CONFIG_X86_LOCAL_APIC
641 * get boot-time SMP configuration:
643 if (smp_found_config)
645 init_apic_mappings();
649 * Request address space for all standard RAM and ROM resources
650 * and also for regions reported as reserved by the e820.
653 e820_reserve_resources();
655 request_resource(&iomem_resource, &video_ram_resource);
659 /* request I/O space for devices used on all i[345]86 PCs */
660 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
661 request_resource(&ioport_resource, &standard_io_resources[i]);
666 #ifdef CONFIG_GART_IOMMU
671 #if defined(CONFIG_VGA_CONSOLE)
672 conswitchp = &vga_con;
673 #elif defined(CONFIG_DUMMY_CONSOLE)
674 conswitchp = &dummy_con;
679 static int __init get_model_name(struct cpuinfo_x86 *c)
683 if (c->extended_cpuid_level < 0x80000004)
686 v = (unsigned int *) c->x86_model_id;
687 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
688 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
689 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
690 c->x86_model_id[48] = 0;
695 static void __init display_cacheinfo(struct cpuinfo_x86 *c)
697 unsigned int n, dummy, eax, ebx, ecx, edx;
699 n = c->extended_cpuid_level;
701 if (n >= 0x80000005) {
702 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
703 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
704 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
705 c->x86_cache_size=(ecx>>24)+(edx>>24);
706 /* On K8 L1 TLB is inclusive, so don't count it */
710 if (n >= 0x80000006) {
711 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
712 ecx = cpuid_ecx(0x80000006);
713 c->x86_cache_size = ecx >> 16;
714 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
716 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
717 c->x86_cache_size, ecx & 0xFF);
721 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
722 if (n >= 0x80000008) {
723 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
724 c->x86_virt_bits = (eax >> 8) & 0xff;
725 c->x86_phys_bits = eax & 0xff;
730 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
731 * Assumes number of cores is a power of two.
733 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
736 int cpu = smp_processor_id();
739 if (c->x86_num_cores == 1)
743 while ((1 << bits) < c->x86_num_cores)
746 /* Low order bits define the core id (index of core in socket) */
747 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
748 /* Convert the APIC ID into the socket ID */
749 phys_proc_id[cpu] >>= bits;
752 /* When an ACPI SRAT table is available use the mappings from SRAT
754 if (acpi_numa <= 0) {
755 node = phys_proc_id[cpu];
756 if (!node_online(node))
757 node = first_node(node_online_map);
758 cpu_to_node[cpu] = node;
760 node = cpu_to_node[cpu];
764 printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
765 cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
769 static int __init init_amd(struct cpuinfo_x86 *c)
774 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
775 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
776 clear_bit(0*32+31, &c->x86_capability);
779 level = cpuid_eax(1);
780 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
781 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
783 r = get_model_name(c);
787 /* Should distinguish Models here, but this is only
788 a fallback anyways. */
789 strcpy(c->x86_model_id, "Hammer");
793 display_cacheinfo(c);
795 if (c->extended_cpuid_level >= 0x80000008) {
796 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
797 if (c->x86_num_cores & (c->x86_num_cores - 1))
798 c->x86_num_cores = 1;
806 static void __init detect_ht(struct cpuinfo_x86 *c)
809 u32 eax, ebx, ecx, edx;
811 int cpu = smp_processor_id();
813 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
816 cpuid(1, &eax, &ebx, &ecx, &edx);
817 smp_num_siblings = (ebx & 0xff0000) >> 16;
819 if (smp_num_siblings == 1) {
820 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
821 } else if (smp_num_siblings > 1) {
824 * At this point we only support two siblings per
827 if (smp_num_siblings > NR_CPUS) {
828 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
829 smp_num_siblings = 1;
832 tmp = smp_num_siblings;
833 while ((tmp & 0x80000000 ) == 0) {
837 if (smp_num_siblings & (smp_num_siblings - 1))
839 phys_proc_id[cpu] = phys_pkg_id(index_msb);
841 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
844 smp_num_siblings = smp_num_siblings / c->x86_num_cores;
846 tmp = smp_num_siblings;
848 while ((tmp & 0x80000000) == 0) {
852 if (smp_num_siblings & (smp_num_siblings - 1))
855 cpu_core_id[cpu] = phys_pkg_id(index_msb);
857 if (c->x86_num_cores > 1)
858 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
865 * find out the number of processor cores on the die
867 static int __init intel_num_cpu_cores(struct cpuinfo_x86 *c)
871 if (c->cpuid_level < 4)
880 return ((eax >> 26) + 1);
885 static void __init init_intel(struct cpuinfo_x86 *c)
890 init_intel_cacheinfo(c);
891 n = c->extended_cpuid_level;
892 if (n >= 0x80000008) {
893 unsigned eax = cpuid_eax(0x80000008);
894 c->x86_virt_bits = (eax >> 8) & 0xff;
895 c->x86_phys_bits = eax & 0xff;
899 c->x86_cache_alignment = c->x86_clflush_size * 2;
901 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
902 c->x86_num_cores = intel_num_cpu_cores(c);
905 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
907 char *v = c->x86_vendor_id;
909 if (!strcmp(v, "AuthenticAMD"))
910 c->x86_vendor = X86_VENDOR_AMD;
911 else if (!strcmp(v, "GenuineIntel"))
912 c->x86_vendor = X86_VENDOR_INTEL;
914 c->x86_vendor = X86_VENDOR_UNKNOWN;
917 struct cpu_model_info {
920 char *model_names[16];
923 /* Do some early cpuid on the boot CPU to get some parameter that are
924 needed before check_bugs. Everything advanced is in identify_cpu
926 void __init early_identify_cpu(struct cpuinfo_x86 *c)
930 c->loops_per_jiffy = loops_per_jiffy;
931 c->x86_cache_size = -1;
932 c->x86_vendor = X86_VENDOR_UNKNOWN;
933 c->x86_model = c->x86_mask = 0; /* So far unknown... */
934 c->x86_vendor_id[0] = '\0'; /* Unset */
935 c->x86_model_id[0] = '\0'; /* Unset */
936 c->x86_clflush_size = 64;
937 c->x86_cache_alignment = c->x86_clflush_size;
938 c->x86_num_cores = 1;
939 c->extended_cpuid_level = 0;
940 memset(&c->x86_capability, 0, sizeof c->x86_capability);
942 /* Get vendor name */
943 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
944 (unsigned int *)&c->x86_vendor_id[0],
945 (unsigned int *)&c->x86_vendor_id[8],
946 (unsigned int *)&c->x86_vendor_id[4]);
950 /* Initialize the standard set of capabilities */
951 /* Note that the vendor-specific code below might override */
953 /* Intel-defined flags: level 0x00000001 */
954 if (c->cpuid_level >= 0x00000001) {
956 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
957 &c->x86_capability[0]);
958 c->x86 = (tfms >> 8) & 0xf;
959 c->x86_model = (tfms >> 4) & 0xf;
960 c->x86_mask = tfms & 0xf;
962 c->x86 += (tfms >> 20) & 0xff;
963 c->x86_model += ((tfms >> 16) & 0xF) << 4;
965 if (c->x86_capability[0] & (1<<19))
966 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
968 /* Have CPUID level 0 only - unheard of */
973 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
978 * This does the hard work of actually picking apart the CPU stuff...
980 void __init identify_cpu(struct cpuinfo_x86 *c)
985 early_identify_cpu(c);
987 /* AMD-defined flags: level 0x80000001 */
988 xlvl = cpuid_eax(0x80000000);
989 c->extended_cpuid_level = xlvl;
990 if ((xlvl & 0xffff0000) == 0x80000000) {
991 if (xlvl >= 0x80000001) {
992 c->x86_capability[1] = cpuid_edx(0x80000001);
993 c->x86_capability[6] = cpuid_ecx(0x80000001);
995 if (xlvl >= 0x80000004)
996 get_model_name(c); /* Default name */
999 /* Transmeta-defined flags: level 0x80860001 */
1000 xlvl = cpuid_eax(0x80860000);
1001 if ((xlvl & 0xffff0000) == 0x80860000) {
1002 /* Don't set x86_cpuid_level here for now to not confuse. */
1003 if (xlvl >= 0x80860001)
1004 c->x86_capability[2] = cpuid_edx(0x80860001);
1008 * Vendor-specific initialization. In this section we
1009 * canonicalize the feature flags, meaning if there are
1010 * features a certain CPU supports which CPUID doesn't
1011 * tell us, CPUID claiming incorrect flags, or other bugs,
1012 * we handle them here.
1014 * At the end of this section, c->x86_capability better
1015 * indicate the features this CPU genuinely supports!
1017 switch (c->x86_vendor) {
1018 case X86_VENDOR_AMD:
1022 case X86_VENDOR_INTEL:
1026 case X86_VENDOR_UNKNOWN:
1028 display_cacheinfo(c);
1032 select_idle_routine(c);
1036 * On SMP, boot_cpu_data holds the common feature set between
1037 * all CPUs; so make sure that we indicate which features are
1038 * common between the CPUs. The first time this routine gets
1039 * executed, c == &boot_cpu_data.
1041 if (c != &boot_cpu_data) {
1042 /* AND the already accumulated flags with these */
1043 for (i = 0 ; i < NCAPINTS ; i++)
1044 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1047 #ifdef CONFIG_X86_MCE
1051 if (c != &boot_cpu_data)
1052 numa_add_cpu(c - cpu_data);
1057 void __init print_cpu_info(struct cpuinfo_x86 *c)
1059 if (c->x86_model_id[0])
1060 printk("%s", c->x86_model_id);
1062 if (c->x86_mask || c->cpuid_level >= 0)
1063 printk(" stepping %02x\n", c->x86_mask);
1069 * Get CPU information for use by the procfs.
1072 static int show_cpuinfo(struct seq_file *m, void *v)
1074 struct cpuinfo_x86 *c = v;
1077 * These flag bits must match the definitions in <asm/cpufeature.h>.
1078 * NULL means this bit is undefined or reserved; either way it doesn't
1079 * have meaning as far as Linux is concerned. Note that it's important
1080 * to realize there is a difference between this table and CPUID -- if
1081 * applications want to get the raw CPUID data, they should access
1082 * /dev/cpu/<cpu_nr>/cpuid instead.
1084 static char *x86_cap_flags[] = {
1086 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1087 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1088 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1089 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1092 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1093 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1094 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1095 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1097 /* Transmeta-defined */
1098 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1099 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1100 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1101 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1103 /* Other (Linux-defined) */
1104 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1105 "constant_tsc", NULL, NULL,
1106 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1107 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1108 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1110 /* Intel-defined (#2) */
1111 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
1112 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1113 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1114 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1116 /* VIA/Cyrix/Centaur-defined */
1117 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1118 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1119 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1120 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1122 /* AMD-defined (#2) */
1123 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1124 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1125 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1126 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1128 static char *x86_power_flags[] = {
1129 "ts", /* temperature sensor */
1130 "fid", /* frequency id control */
1131 "vid", /* voltage id control */
1132 "ttp", /* thermal trip */
1139 if (!cpu_online(c-cpu_data))
1143 seq_printf(m,"processor\t: %u\n"
1145 "cpu family\t: %d\n"
1147 "model name\t: %s\n",
1148 (unsigned)(c-cpu_data),
1149 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1152 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1154 if (c->x86_mask || c->cpuid_level >= 0)
1155 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1157 seq_printf(m, "stepping\t: unknown\n");
1159 if (cpu_has(c,X86_FEATURE_TSC)) {
1160 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1161 cpu_khz / 1000, (cpu_khz % 1000));
1165 if (c->x86_cache_size >= 0)
1166 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1169 if (smp_num_siblings * c->x86_num_cores > 1) {
1170 int cpu = c - cpu_data;
1171 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1172 seq_printf(m, "siblings\t: %d\n",
1173 c->x86_num_cores * smp_num_siblings);
1174 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1175 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
1181 "fpu_exception\t: yes\n"
1182 "cpuid level\t: %d\n"
1189 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1190 if ( test_bit(i, &c->x86_capability) &&
1191 x86_cap_flags[i] != NULL )
1192 seq_printf(m, " %s", x86_cap_flags[i]);
1195 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1196 c->loops_per_jiffy/(500000/HZ),
1197 (c->loops_per_jiffy/(5000/HZ)) % 100);
1199 if (c->x86_tlbsize > 0)
1200 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1201 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1202 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1204 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1205 c->x86_phys_bits, c->x86_virt_bits);
1207 seq_printf(m, "power management:");
1210 for (i = 0; i < 32; i++)
1211 if (c->x86_power & (1 << i)) {
1212 if (i < ARRAY_SIZE(x86_power_flags))
1213 seq_printf(m, " %s", x86_power_flags[i]);
1215 seq_printf(m, " [%d]", i);
1219 seq_printf(m, "\n\n");
1224 static void *c_start(struct seq_file *m, loff_t *pos)
1226 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1229 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1232 return c_start(m, pos);
1235 static void c_stop(struct seq_file *m, void *v)
1239 struct seq_operations cpuinfo_op = {
1243 .show = show_cpuinfo,