2 * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
4 * This is an 64bit optimized version that always keeps the full mmconfig
5 * space mapped. This allows lockless config space operation.
9 #include <linux/init.h>
10 #include <linux/acpi.h>
11 #include <linux/bitmap.h>
16 /* aperture is up to 256MB but BIOS may reserve less */
17 #define MMCONFIG_APER_MIN (2 * 1024*1024)
18 #define MMCONFIG_APER_MAX (256 * 1024*1024)
20 /* Verify the first 16 busses. We assume that systems with more busses
22 #define MAX_CHECK_BUS 16
24 static DECLARE_BITMAP(fallback_slots, 32*MAX_CHECK_BUS);
26 /* Static virtual mapping of the MMCONFIG aperture */
28 struct acpi_table_mcfg_config *cfg;
31 static struct mmcfg_virt *pci_mmcfg_virt;
33 static char __iomem *get_virt(unsigned int seg, unsigned bus)
36 struct acpi_table_mcfg_config *cfg;
40 if (cfg_num >= pci_mmcfg_config_num)
42 cfg = pci_mmcfg_virt[cfg_num].cfg;
43 if (cfg->pci_segment_group_number != seg)
45 if ((cfg->start_bus_number <= bus) &&
46 (cfg->end_bus_number >= bus))
47 return pci_mmcfg_virt[cfg_num].virt;
50 /* Handle more broken MCFG tables on Asus etc.
51 They only contain a single entry for bus 0-0. Assume
52 this applies to all busses. */
53 cfg = &pci_mmcfg_config[0];
54 if (pci_mmcfg_config_num == 1 &&
55 cfg->pci_segment_group_number == 0 &&
56 (cfg->start_bus_number | cfg->end_bus_number) == 0)
57 return pci_mmcfg_virt[0].virt;
59 /* Fall back to type 0 */
63 static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
66 if (seg == 0 && bus < MAX_CHECK_BUS &&
67 test_bit(32*bus + PCI_SLOT(devfn), fallback_slots))
69 addr = get_virt(seg, bus);
72 return addr + ((bus << 20) | (devfn << 12));
75 static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
76 unsigned int devfn, int reg, int len, u32 *value)
80 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
81 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) {
86 addr = pci_dev_base(seg, bus, devfn);
88 return pci_conf1_read(seg,bus,devfn,reg,len,value);
92 *value = readb(addr + reg);
95 *value = readw(addr + reg);
98 *value = readl(addr + reg);
105 static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
106 unsigned int devfn, int reg, int len, u32 value)
110 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
111 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
114 addr = pci_dev_base(seg, bus, devfn);
116 return pci_conf1_write(seg,bus,devfn,reg,len,value);
120 writeb(value, addr + reg);
123 writew(value, addr + reg);
126 writel(value, addr + reg);
133 static struct pci_raw_ops pci_mmcfg = {
134 .read = pci_mmcfg_read,
135 .write = pci_mmcfg_write,
138 /* K8 systems have some devices (typically in the builtin northbridge)
139 that are only accessible using type1
140 Normally this can be expressed in the MCFG by not listing them
141 and assigning suitable _SEGs, but this isn't implemented in some BIOS.
142 Instead try to discover all devices on bus 0 that are unreachable using MM
143 and fallback for them. */
144 static __init void unreachable_devices(void)
147 /* Use the max bus number from ACPI here? */
148 for (k = 0; k < MAX_CHECK_BUS; k++) {
149 for (i = 0; i < 32; i++) {
153 pci_conf1_read(0, k, PCI_DEVFN(i,0), 0, 4, &val1);
154 if (val1 == 0xffffffff)
156 addr = pci_dev_base(0, k, PCI_DEVFN(i, 0));
157 if (addr == NULL|| readl(addr) != val1) {
158 set_bit(i + 32*k, fallback_slots);
159 printk(KERN_NOTICE "PCI: No mmconfig possible"
160 " on device %02x:%02x\n", k, i);
166 static __init void pci_mmcfg_insert_resources(void)
168 #define PCI_MMCFG_RESOURCE_NAME_LEN 19
170 struct resource *res;
174 res = kcalloc(PCI_MMCFG_RESOURCE_NAME_LEN + sizeof(*res),
175 pci_mmcfg_config_num, GFP_KERNEL);
178 printk(KERN_ERR "PCI: Unable to allocate MMCONFIG resources\n");
182 names = (void *)&res[pci_mmcfg_config_num];
183 for (i = 0; i < pci_mmcfg_config_num; i++, res++) {
184 num_buses = pci_mmcfg_config[i].end_bus_number -
185 pci_mmcfg_config[i].start_bus_number + 1;
187 snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN, "PCI MMCONFIG %u",
188 pci_mmcfg_config[i].pci_segment_group_number);
189 res->start = pci_mmcfg_config[i].base_address;
190 res->end = res->start + (num_buses << 20) - 1;
191 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
192 insert_resource(&iomem_resource, res);
193 names += PCI_MMCFG_RESOURCE_NAME_LEN;
197 void __init pci_mmcfg_init(int type)
201 if ((pci_probe & PCI_PROBE_MMCONF) == 0)
204 acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg);
205 if ((pci_mmcfg_config_num == 0) ||
206 (pci_mmcfg_config == NULL) ||
207 (pci_mmcfg_config[0].base_address == 0))
210 /* Only do this check when type 1 works. If it doesn't work
211 assume we run on a Mac and always use MCFG */
212 if (type == 1 && !e820_all_mapped(pci_mmcfg_config[0].base_address,
213 pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN,
215 printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n",
216 pci_mmcfg_config[0].base_address);
217 printk(KERN_ERR "PCI: Not using MMCONFIG.\n");
221 pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL);
222 if (pci_mmcfg_virt == NULL) {
223 printk("PCI: Can not allocate memory for mmconfig structures\n");
226 for (i = 0; i < pci_mmcfg_config_num; ++i) {
227 pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i];
228 pci_mmcfg_virt[i].virt = ioremap_nocache(pci_mmcfg_config[i].base_address,
230 if (!pci_mmcfg_virt[i].virt) {
231 printk("PCI: Cannot map mmconfig aperture for segment %d\n",
232 pci_mmcfg_config[i].pci_segment_group_number);
235 printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[i].base_address);
238 unreachable_devices();
239 pci_mmcfg_insert_resources();
241 raw_pci_ops = &pci_mmcfg;
242 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;