3 * Header for the Direct Rendering Manager
5 * \author Rickard E. (Rik) Faith <faith@valinux.com>
7 * \par Acknowledgments:
8 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
14 * All rights reserved.
16 * Permission is hereby granted, free of charge, to any person obtaining a
17 * copy of this software and associated documentation files (the "Software"),
18 * to deal in the Software without restriction, including without limitation
19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
20 * and/or sell copies of the Software, and to permit persons to whom the
21 * Software is furnished to do so, subject to the following conditions:
23 * The above copyright notice and this permission notice (including the next
24 * paragraph) shall be included in all copies or substantial portions of the
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
28 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
31 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
33 * OTHER DEALINGS IN THE SOFTWARE.
39 #if defined(__linux__)
40 #if defined(__KERNEL__)
42 #include <asm/ioctl.h> /* For _IO* macros */
43 #define DRM_IOCTL_NR(n) _IOC_NR(n)
44 #define DRM_IOC_VOID _IOC_NONE
45 #define DRM_IOC_READ _IOC_READ
46 #define DRM_IOC_WRITE _IOC_WRITE
47 #define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
48 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
49 #elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)
50 #if defined(__FreeBSD__) && defined(IN_MODULE)
51 /* Prevent name collision when including sys/ioccom.h */
53 #include <sys/ioccom.h>
54 #define ioctl(a,b,c) xf86ioctl(a,b,c)
56 #include <sys/ioccom.h>
57 #endif /* __FreeBSD__ && xf86ioctl */
58 #define DRM_IOCTL_NR(n) ((n) & 0xff)
59 #define DRM_IOC_VOID IOC_VOID
60 #define DRM_IOC_READ IOC_OUT
61 #define DRM_IOC_WRITE IOC_IN
62 #define DRM_IOC_READWRITE IOC_INOUT
63 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
66 #define XFREE86_VERSION(major,minor,patch,snap) \
67 ((major << 16) | (minor << 8) | patch)
69 #ifndef CONFIG_XFREE86_VERSION
70 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
73 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
74 #define DRM_PROC_DEVICES "/proc/devices"
75 #define DRM_PROC_MISC "/proc/misc"
76 #define DRM_PROC_DRM "/proc/drm"
77 #define DRM_DEV_DRM "/dev/drm"
78 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
83 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
85 #define DRM_MAX_MINOR 15
87 #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
88 #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
89 #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
90 #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
92 #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
93 #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
94 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
95 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
96 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
98 typedef unsigned int drm_handle_t;
99 typedef unsigned int drm_context_t;
100 typedef unsigned int drm_drawable_t;
101 typedef unsigned int drm_magic_t;
106 * \warning: If you change this structure, make sure you change
107 * XF86DRIClipRectRec in the server as well
109 * \note KW: Actually it's illegal to change either for
110 * backwards-compatibility reasons.
112 struct drm_clip_rect {
120 * Drawable information.
122 struct drm_drawable_info {
123 unsigned int num_rects;
124 struct drm_clip_rect *rects;
130 struct drm_tex_region {
133 unsigned char in_use;
134 unsigned char padding;
141 * The lock structure is a simple cache-line aligned integer. To avoid
142 * processor bus contention on a multiprocessor system, there should not be any
143 * other data stored in the same cache line.
146 __volatile__ unsigned int lock; /**< lock variable */
147 char padding[60]; /**< Pad to cache line */
151 * DRM_IOCTL_VERSION ioctl argument type.
153 * \sa drmGetVersion().
156 int version_major; /**< Major version */
157 int version_minor; /**< Minor version */
158 int version_patchlevel; /**< Patch level */
159 size_t name_len; /**< Length of name buffer */
160 char __user *name; /**< Name of driver */
161 size_t date_len; /**< Length of date buffer */
162 char __user *date; /**< User-space buffer to hold date */
163 size_t desc_len; /**< Length of desc buffer */
164 char __user *desc; /**< User-space buffer to hold desc */
168 * DRM_IOCTL_GET_UNIQUE ioctl argument type.
170 * \sa drmGetBusid() and drmSetBusId().
173 size_t unique_len; /**< Length of unique */
174 char __user *unique; /**< Unique name for driver instantiation */
178 int count; /**< Length of user-space structures */
179 struct drm_version __user *version;
187 * DRM_IOCTL_CONTROL ioctl argument type.
189 * \sa drmCtlInstHandler() and drmCtlUninstHandler().
202 * Type of memory to map.
205 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
206 _DRM_REGISTERS = 1, /**< no caching, no core dump */
207 _DRM_SHM = 2, /**< shared, cached */
208 _DRM_AGP = 3, /**< AGP/GART */
209 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
210 _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
214 * Memory mapping flags.
217 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
218 _DRM_READ_ONLY = 0x02,
219 _DRM_LOCKED = 0x04, /**< shared, cached, locked */
220 _DRM_KERNEL = 0x08, /**< kernel requires access */
221 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
222 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
223 _DRM_REMOVABLE = 0x40 /**< Removable mapping */
226 struct drm_ctx_priv_map {
227 unsigned int ctx_id; /**< Context requesting private mapping */
228 void *handle; /**< Handle of map */
232 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
238 unsigned long offset; /**< Requested physical address (0 for SAREA)*/
239 unsigned long size; /**< Requested physical size (bytes) */
240 enum drm_map_type type; /**< Type of memory to map */
241 enum drm_map_flags flags; /**< Flags */
242 void *handle; /**< User-space: "Handle" to pass to mmap() */
243 /**< Kernel-space: kernel-virtual address */
244 int mtrr; /**< MTRR slot used */
249 * DRM_IOCTL_GET_CLIENT ioctl argument type.
252 int idx; /**< Which client desired? */
253 int auth; /**< Is client authenticated? */
254 unsigned long pid; /**< Process ID */
255 unsigned long uid; /**< User ID */
256 unsigned long magic; /**< Magic */
257 unsigned long iocs; /**< Ioctl count */
267 _DRM_STAT_VALUE, /**< Generic value */
268 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
269 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
271 _DRM_STAT_IRQ, /**< IRQ */
272 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
273 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
274 _DRM_STAT_DMA, /**< DMA */
275 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
276 _DRM_STAT_MISSED /**< Missed DMA opportunity */
277 /* Add to the *END* of the list */
281 * DRM_IOCTL_GET_STATS ioctl argument type.
287 enum drm_stat_type type;
292 * Hardware locking flags.
294 enum drm_lock_flags {
295 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
296 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
297 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
298 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
299 /* These *HALT* flags aren't supported yet
300 -- they will be used to support the
301 full-screen DGA-like mode. */
302 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
303 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
307 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
309 * \sa drmGetLock() and drmUnlock().
313 enum drm_lock_flags flags;
320 * These values \e must match xf86drm.h.
325 /* Flags for DMA buffer dispatch */
326 _DRM_DMA_BLOCK = 0x01, /**<
327 * Block until buffer dispatched.
329 * \note The buffer may not yet have
330 * been processed by the hardware --
331 * getting a hardware lock with the
332 * hardware quiescent will ensure
333 * that the buffer has been
336 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
337 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
339 /* Flags for DMA buffer request */
340 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
341 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
342 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
346 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
350 struct drm_buf_desc {
351 int count; /**< Number of buffers of this size */
352 int size; /**< Size in bytes */
353 int low_mark; /**< Low water mark */
354 int high_mark; /**< High water mark */
356 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
357 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
358 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
359 _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
360 _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
362 unsigned long agp_start; /**<
363 * Start address of where the AGP buffers are
364 * in the AGP aperture
369 * DRM_IOCTL_INFO_BUFS ioctl argument type.
371 struct drm_buf_info {
372 int count; /**< Entries in list */
373 struct drm_buf_desc __user *list;
377 * DRM_IOCTL_FREE_BUFS ioctl argument type.
379 struct drm_buf_free {
390 int idx; /**< Index into the master buffer list */
391 int total; /**< Buffer size */
392 int used; /**< Amount of buffer in use (for DMA) */
393 void __user *address; /**< Address of buffer */
397 * DRM_IOCTL_MAP_BUFS ioctl argument type.
400 int count; /**< Length of the buffer list */
401 void __user *virtual; /**< Mmap'd area in user-virtual */
402 struct drm_buf_pub __user *list; /**< Buffer information */
406 * DRM_IOCTL_DMA ioctl argument type.
408 * Indices here refer to the offset into the buffer list in drm_buf_get.
413 int context; /**< Context handle */
414 int send_count; /**< Number of buffers to send */
415 int __user *send_indices; /**< List of handles to buffers */
416 int __user *send_sizes; /**< Lengths of data to send */
417 enum drm_dma_flags flags; /**< Flags */
418 int request_count; /**< Number of buffers requested */
419 int request_size; /**< Desired size for buffers */
420 int __user *request_indices; /**< Buffer information */
421 int __user *request_sizes;
422 int granted_count; /**< Number of buffers granted */
426 _DRM_CONTEXT_PRESERVED = 0x01,
427 _DRM_CONTEXT_2DONLY = 0x02
431 * DRM_IOCTL_ADD_CTX ioctl argument type.
433 * \sa drmCreateContext() and drmDestroyContext().
436 drm_context_t handle;
437 enum drm_ctx_flags flags;
441 * DRM_IOCTL_RES_CTX ioctl argument type.
445 struct drm_ctx __user *contexts;
449 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
452 drm_drawable_t handle;
456 * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
459 DRM_DRAWABLE_CLIPRECTS,
460 } drm_drawable_info_type_t;
462 struct drm_update_draw {
463 drm_drawable_t handle;
466 unsigned long long data;
470 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
477 * DRM_IOCTL_IRQ_BUSID ioctl argument type.
479 * \sa drmGetInterruptFromBusID().
481 struct drm_irq_busid {
482 int irq; /**< IRQ number */
483 int busnum; /**< bus number */
484 int devnum; /**< device number */
485 int funcnum; /**< function number */
488 enum drm_vblank_seq_type {
489 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
490 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
491 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
492 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
493 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
496 #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
497 #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \
498 _DRM_VBLANK_NEXTONMISS)
500 struct drm_wait_vblank_request {
501 enum drm_vblank_seq_type type;
502 unsigned int sequence;
503 unsigned long signal;
506 struct drm_wait_vblank_reply {
507 enum drm_vblank_seq_type type;
508 unsigned int sequence;
514 * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
516 * \sa drmWaitVBlank().
518 union drm_wait_vblank {
519 struct drm_wait_vblank_request request;
520 struct drm_wait_vblank_reply reply;
524 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
526 * \sa drmAgpEnable().
528 struct drm_agp_mode {
529 unsigned long mode; /**< AGP mode */
533 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
535 * \sa drmAgpAlloc() and drmAgpFree().
537 struct drm_agp_buffer {
538 unsigned long size; /**< In bytes -- will round to page boundary */
539 unsigned long handle; /**< Used for binding / unbinding */
540 unsigned long type; /**< Type of memory to allocate */
541 unsigned long physical; /**< Physical used by i810 */
545 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
547 * \sa drmAgpBind() and drmAgpUnbind().
549 struct drm_agp_binding {
550 unsigned long handle; /**< From drm_agp_buffer */
551 unsigned long offset; /**< In bytes -- will round to page boundary */
555 * DRM_IOCTL_AGP_INFO ioctl argument type.
557 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
558 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
559 * drmAgpVendorId() and drmAgpDeviceId().
561 struct drm_agp_info {
562 int agp_version_major;
563 int agp_version_minor;
565 unsigned long aperture_base; /* physical address */
566 unsigned long aperture_size; /* bytes */
567 unsigned long memory_allowed; /* bytes */
568 unsigned long memory_used;
570 /* PCI information */
571 unsigned short id_vendor;
572 unsigned short id_device;
576 * DRM_IOCTL_SG_ALLOC ioctl argument type.
578 struct drm_scatter_gather {
579 unsigned long size; /**< In bytes -- will round to page boundary */
580 unsigned long handle; /**< Used for mapping / unmapping */
584 * DRM_IOCTL_SET_VERSION ioctl argument type.
586 struct drm_set_version {
593 #define DRM_IOCTL_BASE 'd'
594 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
595 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
596 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
597 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
599 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
600 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
601 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
602 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
603 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
604 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
605 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
606 #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
608 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
609 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
610 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
611 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
612 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
613 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
614 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
615 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
616 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
617 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
618 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
620 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
622 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
623 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
625 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
626 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
627 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
628 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
629 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
630 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
631 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
632 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
633 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
634 #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
635 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
636 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
637 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
639 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
640 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
641 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
642 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
643 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
644 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
645 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
646 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
648 #define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, struct drm_scatter_gather)
649 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
651 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
653 #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
656 * Device specific ioctls should only be in their respective headers
657 * The device specific ioctl range is from 0x40 to 0x99.
658 * Generic IOCTLS restart at 0xA0.
660 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
661 * drmCommandReadWrite().
663 #define DRM_COMMAND_BASE 0x40
664 #define DRM_COMMAND_END 0xA0
668 typedef struct drm_clip_rect drm_clip_rect_t;
669 typedef struct drm_drawable_info drm_drawable_info_t;
670 typedef struct drm_tex_region drm_tex_region_t;
671 typedef struct drm_hw_lock drm_hw_lock_t;
672 typedef struct drm_version drm_version_t;
673 typedef struct drm_unique drm_unique_t;
674 typedef struct drm_list drm_list_t;
675 typedef struct drm_block drm_block_t;
676 typedef struct drm_control drm_control_t;
677 typedef enum drm_map_type drm_map_type_t;
678 typedef enum drm_map_flags drm_map_flags_t;
679 typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
680 typedef struct drm_map drm_map_t;
681 typedef struct drm_client drm_client_t;
682 typedef enum drm_stat_type drm_stat_type_t;
683 typedef struct drm_stats drm_stats_t;
684 typedef enum drm_lock_flags drm_lock_flags_t;
685 typedef struct drm_lock drm_lock_t;
686 typedef enum drm_dma_flags drm_dma_flags_t;
687 typedef struct drm_buf_desc drm_buf_desc_t;
688 typedef struct drm_buf_info drm_buf_info_t;
689 typedef struct drm_buf_free drm_buf_free_t;
690 typedef struct drm_buf_pub drm_buf_pub_t;
691 typedef struct drm_buf_map drm_buf_map_t;
692 typedef struct drm_dma drm_dma_t;
693 typedef union drm_wait_vblank drm_wait_vblank_t;
694 typedef struct drm_agp_mode drm_agp_mode_t;
695 typedef enum drm_ctx_flags drm_ctx_flags_t;
696 typedef struct drm_ctx drm_ctx_t;
697 typedef struct drm_ctx_res drm_ctx_res_t;
698 typedef struct drm_draw drm_draw_t;
699 typedef struct drm_update_draw drm_update_draw_t;
700 typedef struct drm_auth drm_auth_t;
701 typedef struct drm_irq_busid drm_irq_busid_t;
702 typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
704 typedef struct drm_agp_buffer drm_agp_buffer_t;
705 typedef struct drm_agp_binding drm_agp_binding_t;
706 typedef struct drm_agp_info drm_agp_info_t;
707 typedef struct drm_scatter_gather drm_scatter_gather_t;
708 typedef struct drm_set_version drm_set_version_t;