2 * RocketPort device driver for Linux
4 * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
6 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Kernel Synchronization:
26 * This driver has 2 kernel control paths - exception handlers (calls into the driver
27 * from user mode) and the timer bottom half (tasklet). This is a polled driver, interrupts
31 * - rp_table[], accessed through passed "info" pointers, is a global (static) array of
32 * serial port state information and the xmit_buf circular buffer. Protected by
33 * a per port spinlock.
34 * - xmit_flags[], an array of ints indexed by line (port) number, indicating that there
35 * is data to be transmitted. Protected by atomic bit operations.
36 * - rp_num_ports, int indicating number of open ports, protected by atomic operations.
38 * rp_write() and rp_write_char() functions use a per port semaphore to protect against
39 * simultaneous access to the same port by more than one process.
42 /****** Defines ******/
43 #define ROCKET_PARANOIA_CHECK
44 #define ROCKET_DISABLE_SIMUSAGE
46 #undef ROCKET_SOFT_FLOW
47 #undef ROCKET_DEBUG_OPEN
48 #undef ROCKET_DEBUG_INTR
49 #undef ROCKET_DEBUG_WRITE
50 #undef ROCKET_DEBUG_FLOW
51 #undef ROCKET_DEBUG_THROTTLE
52 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
53 #undef ROCKET_DEBUG_RECEIVE
54 #undef ROCKET_DEBUG_HANGUP
56 #undef ROCKET_DEBUG_IO
58 #define POLL_PERIOD HZ/100 /* Polling period .01 seconds (10ms) */
60 /****** Kernel includes ******/
62 #include <linux/module.h>
63 #include <linux/errno.h>
64 #include <linux/major.h>
65 #include <linux/kernel.h>
66 #include <linux/signal.h>
67 #include <linux/slab.h>
69 #include <linux/sched.h>
70 #include <linux/timer.h>
71 #include <linux/interrupt.h>
72 #include <linux/tty.h>
73 #include <linux/tty_driver.h>
74 #include <linux/tty_flip.h>
75 #include <linux/serial.h>
76 #include <linux/string.h>
77 #include <linux/fcntl.h>
78 #include <linux/ptrace.h>
79 #include <linux/mutex.h>
80 #include <linux/ioport.h>
81 #include <linux/delay.h>
82 #include <linux/completion.h>
83 #include <linux/wait.h>
84 #include <linux/pci.h>
85 #include <linux/uaccess.h>
86 #include <asm/atomic.h>
87 #include <asm/unaligned.h>
88 #include <linux/bitops.h>
89 #include <linux/spinlock.h>
90 #include <linux/init.h>
92 /****** RocketPort includes ******/
94 #include "rocket_int.h"
97 #define ROCKET_VERSION "2.09"
98 #define ROCKET_DATE "12-June-2003"
100 /****** RocketPort Local Variables ******/
102 static void rp_do_poll(unsigned long dummy);
104 static struct tty_driver *rocket_driver;
106 static struct rocket_version driver_version = {
107 ROCKET_VERSION, ROCKET_DATE
110 static struct r_port *rp_table[MAX_RP_PORTS]; /* The main repository of serial port state information. */
111 static unsigned int xmit_flags[NUM_BOARDS]; /* Bit significant, indicates port had data to transmit. */
112 /* eg. Bit 0 indicates port 0 has xmit data, ... */
113 static atomic_t rp_num_ports_open; /* Number of serial ports open */
114 static DEFINE_TIMER(rocket_timer, rp_do_poll, 0, 0);
116 static unsigned long board1; /* ISA addresses, retrieved from rocketport.conf */
117 static unsigned long board2;
118 static unsigned long board3;
119 static unsigned long board4;
120 static unsigned long controller;
121 static int support_low_speed;
122 static unsigned long modem1;
123 static unsigned long modem2;
124 static unsigned long modem3;
125 static unsigned long modem4;
126 static unsigned long pc104_1[8];
127 static unsigned long pc104_2[8];
128 static unsigned long pc104_3[8];
129 static unsigned long pc104_4[8];
130 static unsigned long *pc104[4] = { pc104_1, pc104_2, pc104_3, pc104_4 };
132 static int rp_baud_base[NUM_BOARDS]; /* Board config info (Someday make a per-board structure) */
133 static unsigned long rcktpt_io_addr[NUM_BOARDS];
134 static int rcktpt_type[NUM_BOARDS];
135 static int is_PCI[NUM_BOARDS];
136 static rocketModel_t rocketModel[NUM_BOARDS];
137 static int max_board;
138 static const struct tty_port_operations rocket_port_ops;
141 * The following arrays define the interrupt bits corresponding to each AIOP.
142 * These bits are different between the ISA and regular PCI boards and the
143 * Universal PCI boards.
146 static Word_t aiop_intr_bits[AIOP_CTL_SIZE] = {
153 static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = {
154 UPCI_AIOP_INTR_BIT_0,
155 UPCI_AIOP_INTR_BIT_1,
156 UPCI_AIOP_INTR_BIT_2,
160 static Byte_t RData[RDATASIZE] = {
161 0x00, 0x09, 0xf6, 0x82,
162 0x02, 0x09, 0x86, 0xfb,
163 0x04, 0x09, 0x00, 0x0a,
164 0x06, 0x09, 0x01, 0x0a,
165 0x08, 0x09, 0x8a, 0x13,
166 0x0a, 0x09, 0xc5, 0x11,
167 0x0c, 0x09, 0x86, 0x85,
168 0x0e, 0x09, 0x20, 0x0a,
169 0x10, 0x09, 0x21, 0x0a,
170 0x12, 0x09, 0x41, 0xff,
171 0x14, 0x09, 0x82, 0x00,
172 0x16, 0x09, 0x82, 0x7b,
173 0x18, 0x09, 0x8a, 0x7d,
174 0x1a, 0x09, 0x88, 0x81,
175 0x1c, 0x09, 0x86, 0x7a,
176 0x1e, 0x09, 0x84, 0x81,
177 0x20, 0x09, 0x82, 0x7c,
178 0x22, 0x09, 0x0a, 0x0a
181 static Byte_t RRegData[RREGDATASIZE] = {
182 0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
183 0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
184 0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
185 0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
186 0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
187 0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
188 0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
189 0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
190 0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
191 0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
192 0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
193 0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
194 0x22, 0x09, 0x0a, 0x0a /* 30: Rx FIFO Enable */
197 static CONTROLLER_T sController[CTL_SIZE] = {
198 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
199 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
200 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
201 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
202 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
203 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
204 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
205 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
208 static Byte_t sBitMapClrTbl[8] = {
209 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
212 static Byte_t sBitMapSetTbl[8] = {
213 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
216 static int sClockPrescale = 0x14;
219 * Line number is the ttySIx number (x), the Minor number. We
220 * assign them sequentially, starting at zero. The following
221 * array keeps track of the line number assigned to a given board/aiop/channel.
223 static unsigned char lineNumbers[MAX_RP_PORTS];
224 static unsigned long nextLineNumber;
226 /***** RocketPort Static Prototypes *********/
227 static int __init init_ISA(int i);
228 static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
229 static void rp_flush_buffer(struct tty_struct *tty);
230 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model);
231 static unsigned char GetLineNumber(int ctrl, int aiop, int ch);
232 static unsigned char SetLineNumber(int ctrl, int aiop, int ch);
233 static void rp_start(struct tty_struct *tty);
234 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
236 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode);
237 static void sFlushRxFIFO(CHANNEL_T * ChP);
238 static void sFlushTxFIFO(CHANNEL_T * ChP);
239 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags);
240 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags);
241 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on);
242 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on);
243 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data);
244 static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
245 ByteIO_t * AiopIOList, int AiopIOListSize,
246 WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
247 int PeriodicOnly, int altChanRingIndicator,
249 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
250 ByteIO_t * AiopIOList, int AiopIOListSize,
251 int IRQNum, Byte_t Frequency, int PeriodicOnly);
252 static int sReadAiopID(ByteIO_t io);
253 static int sReadAiopNumChan(WordIO_t io);
255 MODULE_AUTHOR("Theodore Ts'o");
256 MODULE_DESCRIPTION("Comtrol RocketPort driver");
257 module_param(board1, ulong, 0);
258 MODULE_PARM_DESC(board1, "I/O port for (ISA) board #1");
259 module_param(board2, ulong, 0);
260 MODULE_PARM_DESC(board2, "I/O port for (ISA) board #2");
261 module_param(board3, ulong, 0);
262 MODULE_PARM_DESC(board3, "I/O port for (ISA) board #3");
263 module_param(board4, ulong, 0);
264 MODULE_PARM_DESC(board4, "I/O port for (ISA) board #4");
265 module_param(controller, ulong, 0);
266 MODULE_PARM_DESC(controller, "I/O port for (ISA) rocketport controller");
267 module_param(support_low_speed, bool, 0);
268 MODULE_PARM_DESC(support_low_speed, "1 means support 50 baud, 0 means support 460400 baud");
269 module_param(modem1, ulong, 0);
270 MODULE_PARM_DESC(modem1, "1 means (ISA) board #1 is a RocketModem");
271 module_param(modem2, ulong, 0);
272 MODULE_PARM_DESC(modem2, "1 means (ISA) board #2 is a RocketModem");
273 module_param(modem3, ulong, 0);
274 MODULE_PARM_DESC(modem3, "1 means (ISA) board #3 is a RocketModem");
275 module_param(modem4, ulong, 0);
276 MODULE_PARM_DESC(modem4, "1 means (ISA) board #4 is a RocketModem");
277 module_param_array(pc104_1, ulong, NULL, 0);
278 MODULE_PARM_DESC(pc104_1, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
279 module_param_array(pc104_2, ulong, NULL, 0);
280 MODULE_PARM_DESC(pc104_2, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
281 module_param_array(pc104_3, ulong, NULL, 0);
282 MODULE_PARM_DESC(pc104_3, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
283 module_param_array(pc104_4, ulong, NULL, 0);
284 MODULE_PARM_DESC(pc104_4, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
286 static int rp_init(void);
287 static void rp_cleanup_module(void);
289 module_init(rp_init);
290 module_exit(rp_cleanup_module);
293 MODULE_LICENSE("Dual BSD/GPL");
295 /*************************************************************************/
296 /* Module code starts here */
298 static inline int rocket_paranoia_check(struct r_port *info,
301 #ifdef ROCKET_PARANOIA_CHECK
304 if (info->magic != RPORT_MAGIC) {
305 printk(KERN_WARNING "Warning: bad magic number for rocketport "
306 "struct in %s\n", routine);
314 /* Serial port receive data function. Called (from timer poll) when an AIOPIC signals
315 * that receive data is present on a serial port. Pulls data from FIFO, moves it into the
318 static void rp_do_receive(struct r_port *info,
319 struct tty_struct *tty,
320 CHANNEL_t * cp, unsigned int ChanStatus)
322 unsigned int CharNStat;
323 int ToRecv, wRecv, space;
326 ToRecv = sGetRxCnt(cp);
327 #ifdef ROCKET_DEBUG_INTR
328 printk(KERN_INFO "rp_do_receive(%d)...\n", ToRecv);
334 * if status indicates there are errored characters in the
335 * FIFO, then enter status mode (a word in FIFO holds
336 * character and status).
338 if (ChanStatus & (RXFOVERFL | RXBREAK | RXFRAME | RXPARITY)) {
339 if (!(ChanStatus & STATMODE)) {
340 #ifdef ROCKET_DEBUG_RECEIVE
341 printk(KERN_INFO "Entering STATMODE...\n");
343 ChanStatus |= STATMODE;
349 * if we previously entered status mode, then read down the
350 * FIFO one word at a time, pulling apart the character and
351 * the status. Update error counters depending on status
353 if (ChanStatus & STATMODE) {
354 #ifdef ROCKET_DEBUG_RECEIVE
355 printk(KERN_INFO "Ignore %x, read %x...\n",
356 info->ignore_status_mask, info->read_status_mask);
361 CharNStat = sInW(sGetTxRxDataIO(cp));
362 #ifdef ROCKET_DEBUG_RECEIVE
363 printk(KERN_INFO "%x...\n", CharNStat);
365 if (CharNStat & STMBREAKH)
366 CharNStat &= ~(STMFRAMEH | STMPARITYH);
367 if (CharNStat & info->ignore_status_mask) {
371 CharNStat &= info->read_status_mask;
372 if (CharNStat & STMBREAKH)
374 else if (CharNStat & STMPARITYH)
376 else if (CharNStat & STMFRAMEH)
378 else if (CharNStat & STMRCVROVRH)
382 tty_insert_flip_char(tty, CharNStat & 0xff, flag);
387 * after we've emptied the FIFO in status mode, turn
388 * status mode back off
390 if (sGetRxCnt(cp) == 0) {
391 #ifdef ROCKET_DEBUG_RECEIVE
392 printk(KERN_INFO "Status mode off.\n");
394 sDisRxStatusMode(cp);
398 * we aren't in status mode, so read down the FIFO two
399 * characters at time by doing repeated word IO
402 space = tty_prepare_flip_string(tty, &cbuf, ToRecv);
403 if (space < ToRecv) {
404 #ifdef ROCKET_DEBUG_RECEIVE
405 printk(KERN_INFO "rp_do_receive:insufficient space ToRecv=%d space=%d\n", ToRecv, space);
413 sInStrW(sGetTxRxDataIO(cp), (unsigned short *) cbuf, wRecv);
415 cbuf[ToRecv - 1] = sInB(sGetTxRxDataIO(cp));
417 /* Push the data up to the tty layer */
418 tty_flip_buffer_push(tty);
422 * Serial port transmit data function. Called from the timer polling loop as a
423 * result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
424 * to be sent out the serial port. Data is buffered in rp_table[line].xmit_buf, it is
425 * moved to the port's xmit FIFO. *info is critical data, protected by spinlocks.
427 static void rp_do_transmit(struct r_port *info)
430 CHANNEL_t *cp = &info->channel;
431 struct tty_struct *tty;
434 #ifdef ROCKET_DEBUG_INTR
435 printk(KERN_DEBUG "%s\n", __func__);
439 if (!info->port.tty) {
440 printk(KERN_WARNING "rp: WARNING %s called with "
441 "info->port.tty==NULL\n", __func__);
442 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
446 spin_lock_irqsave(&info->slock, flags);
447 tty = info->port.tty;
448 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
450 /* Loop sending data to FIFO until done or FIFO full */
452 if (tty->stopped || tty->hw_stopped)
454 c = min(info->xmit_fifo_room, info->xmit_cnt);
455 c = min(c, XMIT_BUF_SIZE - info->xmit_tail);
456 if (c <= 0 || info->xmit_fifo_room <= 0)
458 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) (info->xmit_buf + info->xmit_tail), c / 2);
460 sOutB(sGetTxRxDataIO(cp), info->xmit_buf[info->xmit_tail + c - 1]);
461 info->xmit_tail += c;
462 info->xmit_tail &= XMIT_BUF_SIZE - 1;
464 info->xmit_fifo_room -= c;
465 #ifdef ROCKET_DEBUG_INTR
466 printk(KERN_INFO "tx %d chars...\n", c);
470 if (info->xmit_cnt == 0)
471 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
473 if (info->xmit_cnt < WAKEUP_CHARS) {
475 #ifdef ROCKETPORT_HAVE_POLL_WAIT
476 wake_up_interruptible(&tty->poll_wait);
480 spin_unlock_irqrestore(&info->slock, flags);
482 #ifdef ROCKET_DEBUG_INTR
483 printk(KERN_DEBUG "(%d,%d,%d,%d)...\n", info->xmit_cnt, info->xmit_head,
484 info->xmit_tail, info->xmit_fifo_room);
489 * Called when a serial port signals it has read data in it's RX FIFO.
490 * It checks what interrupts are pending and services them, including
491 * receiving serial data.
493 static void rp_handle_port(struct r_port *info)
496 struct tty_struct *tty;
497 unsigned int IntMask, ChanStatus;
502 if ((info->port.flags & ASYNC_INITIALIZED) == 0) {
503 printk(KERN_WARNING "rp: WARNING: rp_handle_port called with "
504 "info->flags & NOT_INIT\n");
507 if (!info->port.tty) {
508 printk(KERN_WARNING "rp: WARNING: rp_handle_port called with "
509 "info->port.tty==NULL\n");
513 tty = info->port.tty;
515 IntMask = sGetChanIntID(cp) & info->intmask;
516 #ifdef ROCKET_DEBUG_INTR
517 printk(KERN_INFO "rp_interrupt %02x...\n", IntMask);
519 ChanStatus = sGetChanStatus(cp);
520 if (IntMask & RXF_TRIG) { /* Rx FIFO trigger level */
521 rp_do_receive(info, tty, cp, ChanStatus);
523 if (IntMask & DELTA_CD) { /* CD change */
524 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || defined(ROCKET_DEBUG_HANGUP))
525 printk(KERN_INFO "ttyR%d CD now %s...\n", info->line,
526 (ChanStatus & CD_ACT) ? "on" : "off");
528 if (!(ChanStatus & CD_ACT) && info->cd_status) {
529 #ifdef ROCKET_DEBUG_HANGUP
530 printk(KERN_INFO "CD drop, calling hangup.\n");
534 info->cd_status = (ChanStatus & CD_ACT) ? 1 : 0;
535 wake_up_interruptible(&info->port.open_wait);
537 #ifdef ROCKET_DEBUG_INTR
538 if (IntMask & DELTA_CTS) { /* CTS change */
539 printk(KERN_INFO "CTS change...\n");
541 if (IntMask & DELTA_DSR) { /* DSR change */
542 printk(KERN_INFO "DSR change...\n");
548 * The top level polling routine. Repeats every 1/100 HZ (10ms).
550 static void rp_do_poll(unsigned long dummy)
553 int ctrl, aiop, ch, line;
554 unsigned int xmitmask, i;
555 unsigned int CtlMask;
556 unsigned char AiopMask;
559 /* Walk through all the boards (ctrl's) */
560 for (ctrl = 0; ctrl < max_board; ctrl++) {
561 if (rcktpt_io_addr[ctrl] <= 0)
564 /* Get a ptr to the board's control struct */
565 ctlp = sCtlNumToCtlPtr(ctrl);
567 /* Get the interrupt status from the board */
569 if (ctlp->BusType == isPCI)
570 CtlMask = sPCIGetControllerIntStatus(ctlp);
573 CtlMask = sGetControllerIntStatus(ctlp);
575 /* Check if any AIOP read bits are set */
576 for (aiop = 0; CtlMask; aiop++) {
577 bit = ctlp->AiopIntrBits[aiop];
580 AiopMask = sGetAiopIntStatus(ctlp, aiop);
582 /* Check if any port read bits are set */
583 for (ch = 0; AiopMask; AiopMask >>= 1, ch++) {
586 /* Get the line number (/dev/ttyRx number). */
587 /* Read the data from the port. */
588 line = GetLineNumber(ctrl, aiop, ch);
589 rp_handle_port(rp_table[line]);
595 xmitmask = xmit_flags[ctrl];
598 * xmit_flags contains bit-significant flags, indicating there is data
599 * to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port
600 * 1, ... (32 total possible). The variable i has the aiop and ch
601 * numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
604 for (i = 0; i < rocketModel[ctrl].numPorts; i++) {
605 if (xmitmask & (1 << i)) {
606 aiop = (i & 0x18) >> 3;
608 line = GetLineNumber(ctrl, aiop, ch);
609 rp_do_transmit(rp_table[line]);
616 * Reset the timer so we get called at the next clock tick (10ms).
618 if (atomic_read(&rp_num_ports_open))
619 mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
623 * Initializes the r_port structure for a port, as well as enabling the port on
625 * Inputs: board, aiop, chan numbers
627 static void init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev)
634 /* Get the next available line number */
635 line = SetLineNumber(board, aiop, chan);
637 ctlp = sCtlNumToCtlPtr(board);
639 /* Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
640 info = kzalloc(sizeof (struct r_port), GFP_KERNEL);
642 printk(KERN_ERR "Couldn't allocate info struct for line #%d\n",
647 info->magic = RPORT_MAGIC;
653 tty_port_init(&info->port);
654 info->port.ops = &rocket_port_ops;
655 init_completion(&info->close_wait);
656 info->flags &= ~ROCKET_MODE_MASK;
657 switch (pc104[board][line]) {
659 info->flags |= ROCKET_MODE_RS422;
662 info->flags |= ROCKET_MODE_RS485;
666 info->flags |= ROCKET_MODE_RS232;
670 info->intmask = RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR;
671 if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {
672 printk(KERN_ERR "RocketPort sInitChan(%d, %d, %d) failed!\n",
678 rocketMode = info->flags & ROCKET_MODE_MASK;
680 if ((info->flags & ROCKET_RTS_TOGGLE) || (rocketMode == ROCKET_MODE_RS485))
681 sEnRTSToggle(&info->channel);
683 sDisRTSToggle(&info->channel);
685 if (ctlp->boardType == ROCKET_TYPE_PC104) {
686 switch (rocketMode) {
687 case ROCKET_MODE_RS485:
688 sSetInterfaceMode(&info->channel, InterfaceModeRS485);
690 case ROCKET_MODE_RS422:
691 sSetInterfaceMode(&info->channel, InterfaceModeRS422);
693 case ROCKET_MODE_RS232:
695 if (info->flags & ROCKET_RTS_TOGGLE)
696 sSetInterfaceMode(&info->channel, InterfaceModeRS232T);
698 sSetInterfaceMode(&info->channel, InterfaceModeRS232);
702 spin_lock_init(&info->slock);
703 mutex_init(&info->write_mtx);
704 rp_table[line] = info;
705 tty_register_device(rocket_driver, line, pci_dev ? &pci_dev->dev :
710 * Configures a rocketport port according to its termio settings. Called from
711 * user mode into the driver (exception handler). *info CD manipulation is spinlock protected.
713 static void configure_r_port(struct r_port *info,
714 struct ktermios *old_termios)
719 int bits, baud, divisor;
721 struct ktermios *t = info->port.tty->termios;
726 /* Byte size and parity */
727 if ((cflag & CSIZE) == CS8) {
734 if (cflag & CSTOPB) {
741 if (cflag & PARENB) {
744 if (cflag & PARODD) {
754 baud = tty_get_baud_rate(info->port.tty);
757 divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1;
758 if ((divisor >= 8192 || divisor < 0) && old_termios) {
759 baud = tty_termios_baud_rate(old_termios);
762 divisor = (rp_baud_base[info->board] / baud) - 1;
764 if (divisor >= 8192 || divisor < 0) {
766 divisor = (rp_baud_base[info->board] / baud) - 1;
768 info->cps = baud / bits;
769 sSetBaud(cp, divisor);
771 /* FIXME: Should really back compute a baud rate from the divisor */
772 tty_encode_baud_rate(info->port.tty, baud, baud);
774 if (cflag & CRTSCTS) {
775 info->intmask |= DELTA_CTS;
778 info->intmask &= ~DELTA_CTS;
781 if (cflag & CLOCAL) {
782 info->intmask &= ~DELTA_CD;
784 spin_lock_irqsave(&info->slock, flags);
785 if (sGetChanStatus(cp) & CD_ACT)
789 info->intmask |= DELTA_CD;
790 spin_unlock_irqrestore(&info->slock, flags);
794 * Handle software flow control in the board
796 #ifdef ROCKET_SOFT_FLOW
797 if (I_IXON(info->port.tty)) {
798 sEnTxSoftFlowCtl(cp);
799 if (I_IXANY(info->port.tty)) {
804 sSetTxXONChar(cp, START_CHAR(info->port.tty));
805 sSetTxXOFFChar(cp, STOP_CHAR(info->port.tty));
807 sDisTxSoftFlowCtl(cp);
814 * Set up ignore/read mask words
816 info->read_status_mask = STMRCVROVRH | 0xFF;
817 if (I_INPCK(info->port.tty))
818 info->read_status_mask |= STMFRAMEH | STMPARITYH;
819 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
820 info->read_status_mask |= STMBREAKH;
823 * Characters to ignore
825 info->ignore_status_mask = 0;
826 if (I_IGNPAR(info->port.tty))
827 info->ignore_status_mask |= STMFRAMEH | STMPARITYH;
828 if (I_IGNBRK(info->port.tty)) {
829 info->ignore_status_mask |= STMBREAKH;
831 * If we're ignoring parity and break indicators,
832 * ignore overruns too. (For real raw support).
834 if (I_IGNPAR(info->port.tty))
835 info->ignore_status_mask |= STMRCVROVRH;
838 rocketMode = info->flags & ROCKET_MODE_MASK;
840 if ((info->flags & ROCKET_RTS_TOGGLE)
841 || (rocketMode == ROCKET_MODE_RS485))
846 sSetRTS(&info->channel);
848 if (cp->CtlP->boardType == ROCKET_TYPE_PC104) {
849 switch (rocketMode) {
850 case ROCKET_MODE_RS485:
851 sSetInterfaceMode(cp, InterfaceModeRS485);
853 case ROCKET_MODE_RS422:
854 sSetInterfaceMode(cp, InterfaceModeRS422);
856 case ROCKET_MODE_RS232:
858 if (info->flags & ROCKET_RTS_TOGGLE)
859 sSetInterfaceMode(cp, InterfaceModeRS232T);
861 sSetInterfaceMode(cp, InterfaceModeRS232);
867 static int carrier_raised(struct tty_port *port)
869 struct r_port *info = container_of(port, struct r_port, port);
870 return (sGetChanStatusLo(&info->channel) & CD_ACT) ? 1 : 0;
873 static void raise_dtr_rts(struct tty_port *port)
875 struct r_port *info = container_of(port, struct r_port, port);
876 sSetDTR(&info->channel);
877 sSetRTS(&info->channel);
880 /* info->port.count is considered critical, protected by spinlocks. */
881 static int block_til_ready(struct tty_struct *tty, struct file *filp,
884 DECLARE_WAITQUEUE(wait, current);
885 struct tty_port *port = &info->port;
887 int do_clocal = 0, extra_count = 0;
891 * If the device is in the middle of being closed, then block
892 * until it's done, and then try again.
894 if (tty_hung_up_p(filp))
895 return ((info->port.flags & ASYNC_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
896 if (info->flags & ASYNC_CLOSING) {
897 if (wait_for_completion_interruptible(&info->close_wait))
899 return ((info->port.flags & ASYNC_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
903 * If non-blocking mode is set, or the port is not enabled,
904 * then make the check up front and then exit.
906 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
907 info->port.flags |= ASYNC_NORMAL_ACTIVE;
910 if (tty->termios->c_cflag & CLOCAL)
914 * Block waiting for the carrier detect and the line to become free. While we are in
915 * this loop, port->count is dropped by one, so that rp_close() knows when to free things.
916 * We restore it upon exit, either normal or abnormal.
919 add_wait_queue(&port->open_wait, &wait);
920 #ifdef ROCKET_DEBUG_OPEN
921 printk(KERN_INFO "block_til_ready before block: ttyR%d, count = %d\n", info->line, port->count);
923 spin_lock_irqsave(&port->lock, flags);
925 #ifdef ROCKET_DISABLE_SIMUSAGE
926 info->port.flags |= ASYNC_NORMAL_ACTIVE;
928 if (!tty_hung_up_p(filp)) {
933 port->blocked_open++;
935 spin_unlock_irqrestore(&port->lock, flags);
938 if (tty->termios->c_cflag & CBAUD)
939 tty_port_raise_dtr_rts(port);
940 set_current_state(TASK_INTERRUPTIBLE);
941 if (tty_hung_up_p(filp) || !(info->port.flags & ASYNC_INITIALIZED)) {
942 if (info->port.flags & ASYNC_HUP_NOTIFY)
945 retval = -ERESTARTSYS;
948 if (!(info->port.flags & ASYNC_CLOSING) &&
949 (do_clocal || tty_port_carrier_raised(port)))
951 if (signal_pending(current)) {
952 retval = -ERESTARTSYS;
955 #ifdef ROCKET_DEBUG_OPEN
956 printk(KERN_INFO "block_til_ready blocking: ttyR%d, count = %d, flags=0x%0x\n",
957 info->line, port->count, info->port.flags);
959 schedule(); /* Don't hold spinlock here, will hang PC */
961 __set_current_state(TASK_RUNNING);
962 remove_wait_queue(&port->open_wait, &wait);
964 spin_lock_irqsave(&port->lock, flags);
968 port->blocked_open--;
970 spin_unlock_irqrestore(&port->lock, flags);
972 #ifdef ROCKET_DEBUG_OPEN
973 printk(KERN_INFO "block_til_ready after blocking: ttyR%d, count = %d\n",
974 info->line, port->count);
978 info->port.flags |= ASYNC_NORMAL_ACTIVE;
983 * Exception handler that opens a serial port. Creates xmit_buf storage, fills in
984 * port's r_port struct. Initializes the port hardware.
986 static int rp_open(struct tty_struct *tty, struct file *filp)
989 int line = 0, retval;
994 if ((line < 0) || (line >= MAX_RP_PORTS) || ((info = rp_table[line]) == NULL))
997 page = __get_free_page(GFP_KERNEL);
1001 if (info->port.flags & ASYNC_CLOSING) {
1002 retval = wait_for_completion_interruptible(&info->close_wait);
1006 return ((info->port.flags & ASYNC_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
1010 * We must not sleep from here until the port is marked fully in use.
1015 info->xmit_buf = (unsigned char *) page;
1017 tty->driver_data = info;
1018 info->port.tty = tty;
1020 if (info->port.count++ == 0) {
1021 atomic_inc(&rp_num_ports_open);
1023 #ifdef ROCKET_DEBUG_OPEN
1024 printk(KERN_INFO "rocket mod++ = %d...\n",
1025 atomic_read(&rp_num_ports_open));
1028 #ifdef ROCKET_DEBUG_OPEN
1029 printk(KERN_INFO "rp_open ttyR%d, count=%d\n", info->line, info->port.count);
1033 * Info->count is now 1; so it's safe to sleep now.
1035 if ((info->port.flags & ASYNC_INITIALIZED) == 0) {
1036 cp = &info->channel;
1037 sSetRxTrigger(cp, TRIG_1);
1038 if (sGetChanStatus(cp) & CD_ACT)
1039 info->cd_status = 1;
1041 info->cd_status = 0;
1042 sDisRxStatusMode(cp);
1046 sEnInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1047 sSetRxTrigger(cp, TRIG_1);
1050 sDisRxStatusMode(cp);
1054 sDisTxSoftFlowCtl(cp);
1059 info->port.flags |= ASYNC_INITIALIZED;
1062 * Set up the tty->alt_speed kludge
1064 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_HI)
1065 info->port.tty->alt_speed = 57600;
1066 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_VHI)
1067 info->port.tty->alt_speed = 115200;
1068 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_SHI)
1069 info->port.tty->alt_speed = 230400;
1070 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_WARP)
1071 info->port.tty->alt_speed = 460800;
1073 configure_r_port(info, NULL);
1074 if (tty->termios->c_cflag & CBAUD) {
1079 /* Starts (or resets) the maint polling loop */
1080 mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
1082 retval = block_til_ready(tty, filp, info);
1084 #ifdef ROCKET_DEBUG_OPEN
1085 printk(KERN_INFO "rp_open returning after block_til_ready with %d\n", retval);
1093 * Exception handler that closes a serial port. info->port.count is considered critical.
1095 static void rp_close(struct tty_struct *tty, struct file *filp)
1097 struct r_port *info = tty->driver_data;
1098 struct tty_port *port = &info->port;
1099 unsigned long flags;
1103 if (rocket_paranoia_check(info, "rp_close"))
1106 #ifdef ROCKET_DEBUG_OPEN
1107 printk(KERN_INFO "rp_close ttyR%d, count = %d\n", info->line, info->port.count);
1110 if (tty_hung_up_p(filp))
1112 spin_lock_irqsave(&port->lock, flags);
1114 if (tty->count == 1 && port->count != 1) {
1116 * Uh, oh. tty->count is 1, which means that the tty
1117 * structure will be freed. Info->count should always
1118 * be one in these conditions. If it's greater than
1119 * one, we've got real problems, since it means the
1120 * serial port won't be shutdown.
1122 printk(KERN_WARNING "rp_close: bad serial port count; "
1123 "tty->count is 1, info->port.count is %d\n", info->port.count);
1126 if (--port->count < 0) {
1127 printk(KERN_WARNING "rp_close: bad serial port count for "
1128 "ttyR%d: %d\n", info->line, info->port.count);
1132 spin_unlock_irqrestore(&port->lock, flags);
1135 info->port.flags |= ASYNC_CLOSING;
1136 spin_unlock_irqrestore(&port->lock, flags);
1138 cp = &info->channel;
1141 * Notify the line discpline to only process XON/XOFF characters
1146 * If transmission was throttled by the application request,
1147 * just flush the xmit buffer.
1149 if (tty->flow_stopped)
1150 rp_flush_buffer(tty);
1153 * Wait for the transmit buffer to clear
1155 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
1156 tty_wait_until_sent(tty, port->closing_wait);
1158 * Before we drop DTR, make sure the UART transmitter
1159 * has completely drained; this is especially
1160 * important if there is a transmit FIFO!
1162 timeout = (sGetTxCnt(cp) + 1) * HZ / info->cps;
1165 rp_wait_until_sent(tty, timeout);
1166 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1169 sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1171 sDisTxSoftFlowCtl(cp);
1179 rp_flush_buffer(tty);
1181 tty_ldisc_flush(tty);
1183 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1185 if (port->blocked_open) {
1186 if (port->close_delay) {
1187 msleep_interruptible(jiffies_to_msecs(port->close_delay));
1189 wake_up_interruptible(&port->open_wait);
1191 if (info->xmit_buf) {
1192 free_page((unsigned long) info->xmit_buf);
1193 info->xmit_buf = NULL;
1196 info->port.flags &= ~(ASYNC_INITIALIZED | ASYNC_CLOSING | ASYNC_NORMAL_ACTIVE);
1198 complete_all(&info->close_wait);
1199 atomic_dec(&rp_num_ports_open);
1201 #ifdef ROCKET_DEBUG_OPEN
1202 printk(KERN_INFO "rocket mod-- = %d...\n",
1203 atomic_read(&rp_num_ports_open));
1204 printk(KERN_INFO "rp_close ttyR%d complete shutdown\n", info->line);
1209 static void rp_set_termios(struct tty_struct *tty,
1210 struct ktermios *old_termios)
1212 struct r_port *info = tty->driver_data;
1216 if (rocket_paranoia_check(info, "rp_set_termios"))
1219 cflag = tty->termios->c_cflag;
1222 * This driver doesn't support CS5 or CS6
1224 if (((cflag & CSIZE) == CS5) || ((cflag & CSIZE) == CS6))
1225 tty->termios->c_cflag =
1226 ((cflag & ~CSIZE) | (old_termios->c_cflag & CSIZE));
1228 tty->termios->c_cflag &= ~CMSPAR;
1230 configure_r_port(info, old_termios);
1232 cp = &info->channel;
1234 /* Handle transition to B0 status */
1235 if ((old_termios->c_cflag & CBAUD) && !(tty->termios->c_cflag & CBAUD)) {
1240 /* Handle transition away from B0 status */
1241 if (!(old_termios->c_cflag & CBAUD) && (tty->termios->c_cflag & CBAUD)) {
1242 if (!tty->hw_stopped || !(tty->termios->c_cflag & CRTSCTS))
1247 if ((old_termios->c_cflag & CRTSCTS) && !(tty->termios->c_cflag & CRTSCTS)) {
1248 tty->hw_stopped = 0;
1253 static int rp_break(struct tty_struct *tty, int break_state)
1255 struct r_port *info = tty->driver_data;
1256 unsigned long flags;
1258 if (rocket_paranoia_check(info, "rp_break"))
1261 spin_lock_irqsave(&info->slock, flags);
1262 if (break_state == -1)
1263 sSendBreak(&info->channel);
1265 sClrBreak(&info->channel);
1266 spin_unlock_irqrestore(&info->slock, flags);
1271 * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1272 * the UPCI boards was added, it was decided to make this a function because
1273 * the macro was getting too complicated. All cases except the first one
1274 * (UPCIRingInd) are taken directly from the original macro.
1276 static int sGetChanRI(CHANNEL_T * ChP)
1278 CONTROLLER_t *CtlP = ChP->CtlP;
1279 int ChanNum = ChP->ChanNum;
1282 if (CtlP->UPCIRingInd)
1283 RingInd = !(sInB(CtlP->UPCIRingInd) & sBitMapSetTbl[ChanNum]);
1284 else if (CtlP->AltChanRingIndicator)
1285 RingInd = sInB((ByteIO_t) (ChP->ChanStat + 8)) & DSR_ACT;
1286 else if (CtlP->boardType == ROCKET_TYPE_PC104)
1287 RingInd = !(sInB(CtlP->AiopIO[3]) & sBitMapSetTbl[ChanNum]);
1292 /********************************************************************************************/
1293 /* Here are the routines used by rp_ioctl. These are all called from exception handlers. */
1296 * Returns the state of the serial modem control lines. These next 2 functions
1297 * are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1299 static int rp_tiocmget(struct tty_struct *tty, struct file *file)
1301 struct r_port *info = tty->driver_data;
1302 unsigned int control, result, ChanStatus;
1304 ChanStatus = sGetChanStatusLo(&info->channel);
1305 control = info->channel.TxControl[3];
1306 result = ((control & SET_RTS) ? TIOCM_RTS : 0) |
1307 ((control & SET_DTR) ? TIOCM_DTR : 0) |
1308 ((ChanStatus & CD_ACT) ? TIOCM_CAR : 0) |
1309 (sGetChanRI(&info->channel) ? TIOCM_RNG : 0) |
1310 ((ChanStatus & DSR_ACT) ? TIOCM_DSR : 0) |
1311 ((ChanStatus & CTS_ACT) ? TIOCM_CTS : 0);
1317 * Sets the modem control lines
1319 static int rp_tiocmset(struct tty_struct *tty, struct file *file,
1320 unsigned int set, unsigned int clear)
1322 struct r_port *info = tty->driver_data;
1324 if (set & TIOCM_RTS)
1325 info->channel.TxControl[3] |= SET_RTS;
1326 if (set & TIOCM_DTR)
1327 info->channel.TxControl[3] |= SET_DTR;
1328 if (clear & TIOCM_RTS)
1329 info->channel.TxControl[3] &= ~SET_RTS;
1330 if (clear & TIOCM_DTR)
1331 info->channel.TxControl[3] &= ~SET_DTR;
1333 out32(info->channel.IndexAddr, info->channel.TxControl);
1337 static int get_config(struct r_port *info, struct rocket_config __user *retinfo)
1339 struct rocket_config tmp;
1343 memset(&tmp, 0, sizeof (tmp));
1344 tmp.line = info->line;
1345 tmp.flags = info->flags;
1346 tmp.close_delay = info->port.close_delay;
1347 tmp.closing_wait = info->port.closing_wait;
1348 tmp.port = rcktpt_io_addr[(info->line >> 5) & 3];
1350 if (copy_to_user(retinfo, &tmp, sizeof (*retinfo)))
1355 static int set_config(struct r_port *info, struct rocket_config __user *new_info)
1357 struct rocket_config new_serial;
1359 if (copy_from_user(&new_serial, new_info, sizeof (new_serial)))
1362 if (!capable(CAP_SYS_ADMIN))
1364 if ((new_serial.flags & ~ROCKET_USR_MASK) != (info->flags & ~ROCKET_USR_MASK))
1366 info->flags = ((info->flags & ~ROCKET_USR_MASK) | (new_serial.flags & ROCKET_USR_MASK));
1367 configure_r_port(info, NULL);
1371 info->flags = ((info->flags & ~ROCKET_FLAGS) | (new_serial.flags & ROCKET_FLAGS));
1372 info->port.close_delay = new_serial.close_delay;
1373 info->port.closing_wait = new_serial.closing_wait;
1375 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_HI)
1376 info->port.tty->alt_speed = 57600;
1377 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_VHI)
1378 info->port.tty->alt_speed = 115200;
1379 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_SHI)
1380 info->port.tty->alt_speed = 230400;
1381 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_WARP)
1382 info->port.tty->alt_speed = 460800;
1384 configure_r_port(info, NULL);
1389 * This function fills in a rocket_ports struct with information
1390 * about what boards/ports are in the system. This info is passed
1391 * to user space. See setrocket.c where the info is used to create
1392 * the /dev/ttyRx ports.
1394 static int get_ports(struct r_port *info, struct rocket_ports __user *retports)
1396 struct rocket_ports tmp;
1401 memset(&tmp, 0, sizeof (tmp));
1402 tmp.tty_major = rocket_driver->major;
1404 for (board = 0; board < 4; board++) {
1405 tmp.rocketModel[board].model = rocketModel[board].model;
1406 strcpy(tmp.rocketModel[board].modelString, rocketModel[board].modelString);
1407 tmp.rocketModel[board].numPorts = rocketModel[board].numPorts;
1408 tmp.rocketModel[board].loadrm2 = rocketModel[board].loadrm2;
1409 tmp.rocketModel[board].startingPortNumber = rocketModel[board].startingPortNumber;
1411 if (copy_to_user(retports, &tmp, sizeof (*retports)))
1416 static int reset_rm2(struct r_port *info, void __user *arg)
1420 if (!capable(CAP_SYS_ADMIN))
1423 if (copy_from_user(&reset, arg, sizeof (int)))
1428 if (rcktpt_type[info->board] != ROCKET_TYPE_MODEMII &&
1429 rcktpt_type[info->board] != ROCKET_TYPE_MODEMIII)
1432 if (info->ctlp->BusType == isISA)
1433 sModemReset(info->ctlp, info->chan, reset);
1435 sPCIModemReset(info->ctlp, info->chan, reset);
1440 static int get_version(struct r_port *info, struct rocket_version __user *retvers)
1442 if (copy_to_user(retvers, &driver_version, sizeof (*retvers)))
1447 /* IOCTL call handler into the driver */
1448 static int rp_ioctl(struct tty_struct *tty, struct file *file,
1449 unsigned int cmd, unsigned long arg)
1451 struct r_port *info = tty->driver_data;
1452 void __user *argp = (void __user *)arg;
1455 if (cmd != RCKP_GET_PORTS && rocket_paranoia_check(info, "rp_ioctl"))
1461 case RCKP_GET_STRUCT:
1462 if (copy_to_user(argp, info, sizeof (struct r_port)))
1465 case RCKP_GET_CONFIG:
1466 ret = get_config(info, argp);
1468 case RCKP_SET_CONFIG:
1469 ret = set_config(info, argp);
1471 case RCKP_GET_PORTS:
1472 ret = get_ports(info, argp);
1474 case RCKP_RESET_RM2:
1475 ret = reset_rm2(info, argp);
1477 case RCKP_GET_VERSION:
1478 ret = get_version(info, argp);
1487 static void rp_send_xchar(struct tty_struct *tty, char ch)
1489 struct r_port *info = tty->driver_data;
1492 if (rocket_paranoia_check(info, "rp_send_xchar"))
1495 cp = &info->channel;
1497 sWriteTxPrioByte(cp, ch);
1499 sWriteTxByte(sGetTxRxDataIO(cp), ch);
1502 static void rp_throttle(struct tty_struct *tty)
1504 struct r_port *info = tty->driver_data;
1507 #ifdef ROCKET_DEBUG_THROTTLE
1508 printk(KERN_INFO "throttle %s: %d....\n", tty->name,
1509 tty->ldisc.chars_in_buffer(tty));
1512 if (rocket_paranoia_check(info, "rp_throttle"))
1515 cp = &info->channel;
1517 rp_send_xchar(tty, STOP_CHAR(tty));
1519 sClrRTS(&info->channel);
1522 static void rp_unthrottle(struct tty_struct *tty)
1524 struct r_port *info = tty->driver_data;
1526 #ifdef ROCKET_DEBUG_THROTTLE
1527 printk(KERN_INFO "unthrottle %s: %d....\n", tty->name,
1528 tty->ldisc.chars_in_buffer(tty));
1531 if (rocket_paranoia_check(info, "rp_throttle"))
1534 cp = &info->channel;
1536 rp_send_xchar(tty, START_CHAR(tty));
1538 sSetRTS(&info->channel);
1542 * ------------------------------------------------------------
1543 * rp_stop() and rp_start()
1545 * This routines are called before setting or resetting tty->stopped.
1546 * They enable or disable transmitter interrupts, as necessary.
1547 * ------------------------------------------------------------
1549 static void rp_stop(struct tty_struct *tty)
1551 struct r_port *info = tty->driver_data;
1553 #ifdef ROCKET_DEBUG_FLOW
1554 printk(KERN_INFO "stop %s: %d %d....\n", tty->name,
1555 info->xmit_cnt, info->xmit_fifo_room);
1558 if (rocket_paranoia_check(info, "rp_stop"))
1561 if (sGetTxCnt(&info->channel))
1562 sDisTransmit(&info->channel);
1565 static void rp_start(struct tty_struct *tty)
1567 struct r_port *info = tty->driver_data;
1569 #ifdef ROCKET_DEBUG_FLOW
1570 printk(KERN_INFO "start %s: %d %d....\n", tty->name,
1571 info->xmit_cnt, info->xmit_fifo_room);
1574 if (rocket_paranoia_check(info, "rp_stop"))
1577 sEnTransmit(&info->channel);
1578 set_bit((info->aiop * 8) + info->chan,
1579 (void *) &xmit_flags[info->board]);
1583 * rp_wait_until_sent() --- wait until the transmitter is empty
1585 static void rp_wait_until_sent(struct tty_struct *tty, int timeout)
1587 struct r_port *info = tty->driver_data;
1589 unsigned long orig_jiffies;
1590 int check_time, exit_time;
1593 if (rocket_paranoia_check(info, "rp_wait_until_sent"))
1596 cp = &info->channel;
1598 orig_jiffies = jiffies;
1599 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1600 printk(KERN_INFO "In RP_wait_until_sent(%d) (jiff=%lu)...\n", timeout,
1602 printk(KERN_INFO "cps=%d...\n", info->cps);
1606 txcnt = sGetTxCnt(cp);
1608 if (sGetChanStatusLo(cp) & TXSHRMT)
1610 check_time = (HZ / info->cps) / 5;
1612 check_time = HZ * txcnt / info->cps;
1615 exit_time = orig_jiffies + timeout - jiffies;
1618 if (exit_time < check_time)
1619 check_time = exit_time;
1621 if (check_time == 0)
1623 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1624 printk(KERN_INFO "txcnt = %d (jiff=%lu,check=%d)...\n", txcnt,
1625 jiffies, check_time);
1627 msleep_interruptible(jiffies_to_msecs(check_time));
1628 if (signal_pending(current))
1631 __set_current_state(TASK_RUNNING);
1633 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1634 printk(KERN_INFO "txcnt = %d (jiff=%lu)...done\n", txcnt, jiffies);
1639 * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1641 static void rp_hangup(struct tty_struct *tty)
1644 struct r_port *info = tty->driver_data;
1646 if (rocket_paranoia_check(info, "rp_hangup"))
1649 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1650 printk(KERN_INFO "rp_hangup of ttyR%d...\n", info->line);
1652 rp_flush_buffer(tty);
1653 if (info->port.flags & ASYNC_CLOSING)
1655 if (info->port.count)
1656 atomic_dec(&rp_num_ports_open);
1657 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1659 info->port.count = 0;
1660 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
1661 info->port.tty = NULL;
1663 cp = &info->channel;
1666 sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1668 sDisTxSoftFlowCtl(cp);
1670 info->port.flags &= ~ASYNC_INITIALIZED;
1672 wake_up_interruptible(&info->port.open_wait);
1676 * Exception handler - write char routine. The RocketPort driver uses a
1677 * double-buffering strategy, with the twist that if the in-memory CPU
1678 * buffer is empty, and there's space in the transmit FIFO, the
1679 * writing routines will write directly to transmit FIFO.
1680 * Write buffer and counters protected by spinlocks
1682 static int rp_put_char(struct tty_struct *tty, unsigned char ch)
1684 struct r_port *info = tty->driver_data;
1686 unsigned long flags;
1688 if (rocket_paranoia_check(info, "rp_put_char"))
1692 * Grab the port write mutex, locking out other processes that try to
1693 * write to this port
1695 mutex_lock(&info->write_mtx);
1697 #ifdef ROCKET_DEBUG_WRITE
1698 printk(KERN_INFO "rp_put_char %c...\n", ch);
1701 spin_lock_irqsave(&info->slock, flags);
1702 cp = &info->channel;
1704 if (!tty->stopped && !tty->hw_stopped && info->xmit_fifo_room == 0)
1705 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1707 if (tty->stopped || tty->hw_stopped || info->xmit_fifo_room == 0 || info->xmit_cnt != 0) {
1708 info->xmit_buf[info->xmit_head++] = ch;
1709 info->xmit_head &= XMIT_BUF_SIZE - 1;
1711 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1713 sOutB(sGetTxRxDataIO(cp), ch);
1714 info->xmit_fifo_room--;
1716 spin_unlock_irqrestore(&info->slock, flags);
1717 mutex_unlock(&info->write_mtx);
1722 * Exception handler - write routine, called when user app writes to the device.
1723 * A per port write mutex is used to protect from another process writing to
1724 * this port at the same time. This other process could be running on the other CPU
1725 * or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out).
1726 * Spinlocks protect the info xmit members.
1728 static int rp_write(struct tty_struct *tty,
1729 const unsigned char *buf, int count)
1731 struct r_port *info = tty->driver_data;
1733 const unsigned char *b;
1735 unsigned long flags;
1737 if (count <= 0 || rocket_paranoia_check(info, "rp_write"))
1740 if (mutex_lock_interruptible(&info->write_mtx))
1741 return -ERESTARTSYS;
1743 #ifdef ROCKET_DEBUG_WRITE
1744 printk(KERN_INFO "rp_write %d chars...\n", count);
1746 cp = &info->channel;
1748 if (!tty->stopped && !tty->hw_stopped && info->xmit_fifo_room < count)
1749 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1752 * If the write queue for the port is empty, and there is FIFO space, stuff bytes
1753 * into FIFO. Use the write queue for temp storage.
1755 if (!tty->stopped && !tty->hw_stopped && info->xmit_cnt == 0 && info->xmit_fifo_room > 0) {
1756 c = min(count, info->xmit_fifo_room);
1759 /* Push data into FIFO, 2 bytes at a time */
1760 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) b, c / 2);
1762 /* If there is a byte remaining, write it */
1764 sOutB(sGetTxRxDataIO(cp), b[c - 1]);
1770 spin_lock_irqsave(&info->slock, flags);
1771 info->xmit_fifo_room -= c;
1772 spin_unlock_irqrestore(&info->slock, flags);
1775 /* If count is zero, we wrote it all and are done */
1779 /* Write remaining data into the port's xmit_buf */
1781 if (!info->port.tty) /* Seemingly obligatory check... */
1783 c = min(count, XMIT_BUF_SIZE - info->xmit_cnt - 1);
1784 c = min(c, XMIT_BUF_SIZE - info->xmit_head);
1789 memcpy(info->xmit_buf + info->xmit_head, b, c);
1791 spin_lock_irqsave(&info->slock, flags);
1793 (info->xmit_head + c) & (XMIT_BUF_SIZE - 1);
1794 info->xmit_cnt += c;
1795 spin_unlock_irqrestore(&info->slock, flags);
1802 if ((retval > 0) && !tty->stopped && !tty->hw_stopped)
1803 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1806 if (info->xmit_cnt < WAKEUP_CHARS) {
1808 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1809 wake_up_interruptible(&tty->poll_wait);
1812 mutex_unlock(&info->write_mtx);
1817 * Return the number of characters that can be sent. We estimate
1818 * only using the in-memory transmit buffer only, and ignore the
1819 * potential space in the transmit FIFO.
1821 static int rp_write_room(struct tty_struct *tty)
1823 struct r_port *info = tty->driver_data;
1826 if (rocket_paranoia_check(info, "rp_write_room"))
1829 ret = XMIT_BUF_SIZE - info->xmit_cnt - 1;
1832 #ifdef ROCKET_DEBUG_WRITE
1833 printk(KERN_INFO "rp_write_room returns %d...\n", ret);
1839 * Return the number of characters in the buffer. Again, this only
1840 * counts those characters in the in-memory transmit buffer.
1842 static int rp_chars_in_buffer(struct tty_struct *tty)
1844 struct r_port *info = tty->driver_data;
1847 if (rocket_paranoia_check(info, "rp_chars_in_buffer"))
1850 cp = &info->channel;
1852 #ifdef ROCKET_DEBUG_WRITE
1853 printk(KERN_INFO "rp_chars_in_buffer returns %d...\n", info->xmit_cnt);
1855 return info->xmit_cnt;
1859 * Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1860 * r_port struct for the port. Note that spinlock are used to protect info members,
1861 * do not call this function if the spinlock is already held.
1863 static void rp_flush_buffer(struct tty_struct *tty)
1865 struct r_port *info = tty->driver_data;
1867 unsigned long flags;
1869 if (rocket_paranoia_check(info, "rp_flush_buffer"))
1872 spin_lock_irqsave(&info->slock, flags);
1873 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1874 spin_unlock_irqrestore(&info->slock, flags);
1876 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1877 wake_up_interruptible(&tty->poll_wait);
1881 cp = &info->channel;
1887 static struct pci_device_id __devinitdata rocket_pci_ids[] = {
1888 { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_ANY_ID) },
1891 MODULE_DEVICE_TABLE(pci, rocket_pci_ids);
1894 * Called when a PCI card is found. Retrieves and stores model information,
1895 * init's aiopic and serial port hardware.
1896 * Inputs: i is the board number (0-n)
1898 static __init int register_PCI(int i, struct pci_dev *dev)
1900 int num_aiops, aiop, max_num_aiops, num_chan, chan;
1901 unsigned int aiopio[MAX_AIOPS_PER_BOARD];
1902 char *str, *board_type;
1906 int altChanRingIndicator = 0;
1907 int ports_per_aiop = 8;
1908 WordIO_t ConfigIO = 0;
1909 ByteIO_t UPCIRingInd = 0;
1911 if (!dev || pci_enable_device(dev))
1914 rcktpt_io_addr[i] = pci_resource_start(dev, 0);
1916 rcktpt_type[i] = ROCKET_TYPE_NORMAL;
1917 rocketModel[i].loadrm2 = 0;
1918 rocketModel[i].startingPortNumber = nextLineNumber;
1920 /* Depending on the model, set up some config variables */
1921 switch (dev->device) {
1922 case PCI_DEVICE_ID_RP4QUAD:
1926 rocketModel[i].model = MODEL_RP4QUAD;
1927 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/quad cable");
1928 rocketModel[i].numPorts = 4;
1930 case PCI_DEVICE_ID_RP8OCTA:
1933 rocketModel[i].model = MODEL_RP8OCTA;
1934 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/octa cable");
1935 rocketModel[i].numPorts = 8;
1937 case PCI_DEVICE_ID_URP8OCTA:
1940 rocketModel[i].model = MODEL_UPCI_RP8OCTA;
1941 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/octa cable");
1942 rocketModel[i].numPorts = 8;
1944 case PCI_DEVICE_ID_RP8INTF:
1947 rocketModel[i].model = MODEL_RP8INTF;
1948 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/external I/F");
1949 rocketModel[i].numPorts = 8;
1951 case PCI_DEVICE_ID_URP8INTF:
1954 rocketModel[i].model = MODEL_UPCI_RP8INTF;
1955 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/external I/F");
1956 rocketModel[i].numPorts = 8;
1958 case PCI_DEVICE_ID_RP8J:
1961 rocketModel[i].model = MODEL_RP8J;
1962 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/RJ11 connectors");
1963 rocketModel[i].numPorts = 8;
1965 case PCI_DEVICE_ID_RP4J:
1969 rocketModel[i].model = MODEL_RP4J;
1970 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/RJ45 connectors");
1971 rocketModel[i].numPorts = 4;
1973 case PCI_DEVICE_ID_RP8SNI:
1974 str = "8 (DB78 Custom)";
1976 rocketModel[i].model = MODEL_RP8SNI;
1977 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/ custom DB78");
1978 rocketModel[i].numPorts = 8;
1980 case PCI_DEVICE_ID_RP16SNI:
1981 str = "16 (DB78 Custom)";
1983 rocketModel[i].model = MODEL_RP16SNI;
1984 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/ custom DB78");
1985 rocketModel[i].numPorts = 16;
1987 case PCI_DEVICE_ID_RP16INTF:
1990 rocketModel[i].model = MODEL_RP16INTF;
1991 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/external I/F");
1992 rocketModel[i].numPorts = 16;
1994 case PCI_DEVICE_ID_URP16INTF:
1997 rocketModel[i].model = MODEL_UPCI_RP16INTF;
1998 strcpy(rocketModel[i].modelString, "RocketPort UPCI 16 port w/external I/F");
1999 rocketModel[i].numPorts = 16;
2001 case PCI_DEVICE_ID_CRP16INTF:
2004 rocketModel[i].model = MODEL_CPCI_RP16INTF;
2005 strcpy(rocketModel[i].modelString, "RocketPort Compact PCI 16 port w/external I/F");
2006 rocketModel[i].numPorts = 16;
2008 case PCI_DEVICE_ID_RP32INTF:
2011 rocketModel[i].model = MODEL_RP32INTF;
2012 strcpy(rocketModel[i].modelString, "RocketPort 32 port w/external I/F");
2013 rocketModel[i].numPorts = 32;
2015 case PCI_DEVICE_ID_URP32INTF:
2018 rocketModel[i].model = MODEL_UPCI_RP32INTF;
2019 strcpy(rocketModel[i].modelString, "RocketPort UPCI 32 port w/external I/F");
2020 rocketModel[i].numPorts = 32;
2022 case PCI_DEVICE_ID_RPP4:
2023 str = "Plus Quadcable";
2026 altChanRingIndicator++;
2028 rocketModel[i].model = MODEL_RPP4;
2029 strcpy(rocketModel[i].modelString, "RocketPort Plus 4 port");
2030 rocketModel[i].numPorts = 4;
2032 case PCI_DEVICE_ID_RPP8:
2033 str = "Plus Octacable";
2036 altChanRingIndicator++;
2038 rocketModel[i].model = MODEL_RPP8;
2039 strcpy(rocketModel[i].modelString, "RocketPort Plus 8 port");
2040 rocketModel[i].numPorts = 8;
2042 case PCI_DEVICE_ID_RP2_232:
2043 str = "Plus 2 (RS-232)";
2046 altChanRingIndicator++;
2048 rocketModel[i].model = MODEL_RP2_232;
2049 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS232");
2050 rocketModel[i].numPorts = 2;
2052 case PCI_DEVICE_ID_RP2_422:
2053 str = "Plus 2 (RS-422)";
2056 altChanRingIndicator++;
2058 rocketModel[i].model = MODEL_RP2_422;
2059 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS422");
2060 rocketModel[i].numPorts = 2;
2062 case PCI_DEVICE_ID_RP6M:
2068 /* If revision is 1, the rocketmodem flash must be loaded.
2069 * If it is 2 it is a "socketed" version. */
2070 if (dev->revision == 1) {
2071 rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2072 rocketModel[i].loadrm2 = 1;
2074 rcktpt_type[i] = ROCKET_TYPE_MODEM;
2077 rocketModel[i].model = MODEL_RP6M;
2078 strcpy(rocketModel[i].modelString, "RocketModem 6 port");
2079 rocketModel[i].numPorts = 6;
2081 case PCI_DEVICE_ID_RP4M:
2085 if (dev->revision == 1) {
2086 rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2087 rocketModel[i].loadrm2 = 1;
2089 rcktpt_type[i] = ROCKET_TYPE_MODEM;
2092 rocketModel[i].model = MODEL_RP4M;
2093 strcpy(rocketModel[i].modelString, "RocketModem 4 port");
2094 rocketModel[i].numPorts = 4;
2097 str = "(unknown/unsupported)";
2103 * Check for UPCI boards.
2106 switch (dev->device) {
2107 case PCI_DEVICE_ID_URP32INTF:
2108 case PCI_DEVICE_ID_URP8INTF:
2109 case PCI_DEVICE_ID_URP16INTF:
2110 case PCI_DEVICE_ID_CRP16INTF:
2111 case PCI_DEVICE_ID_URP8OCTA:
2112 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2113 ConfigIO = pci_resource_start(dev, 1);
2114 if (dev->device == PCI_DEVICE_ID_URP8OCTA) {
2115 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2118 * Check for octa or quad cable.
2121 (sInW(ConfigIO + _PCI_9030_GPIO_CTRL) &
2122 PCI_GPIO_CTRL_8PORT)) {
2125 rocketModel[i].numPorts = 4;
2129 case PCI_DEVICE_ID_UPCI_RM3_8PORT:
2132 rocketModel[i].model = MODEL_UPCI_RM3_8PORT;
2133 strcpy(rocketModel[i].modelString, "RocketModem III 8 port");
2134 rocketModel[i].numPorts = 8;
2135 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2136 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2137 ConfigIO = pci_resource_start(dev, 1);
2138 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2140 case PCI_DEVICE_ID_UPCI_RM3_4PORT:
2143 rocketModel[i].model = MODEL_UPCI_RM3_4PORT;
2144 strcpy(rocketModel[i].modelString, "RocketModem III 4 port");
2145 rocketModel[i].numPorts = 4;
2146 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2147 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2148 ConfigIO = pci_resource_start(dev, 1);
2149 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2155 switch (rcktpt_type[i]) {
2156 case ROCKET_TYPE_MODEM:
2157 board_type = "RocketModem";
2159 case ROCKET_TYPE_MODEMII:
2160 board_type = "RocketModem II";
2162 case ROCKET_TYPE_MODEMIII:
2163 board_type = "RocketModem III";
2166 board_type = "RocketPort";
2171 sClockPrescale = 0x12; /* mod 2 (divide by 3) */
2172 rp_baud_base[i] = 921600;
2175 * If support_low_speed is set, use the slow clock
2176 * prescale, which supports 50 bps
2178 if (support_low_speed) {
2179 /* mod 9 (divide by 10) prescale */
2180 sClockPrescale = 0x19;
2181 rp_baud_base[i] = 230400;
2183 /* mod 4 (devide by 5) prescale */
2184 sClockPrescale = 0x14;
2185 rp_baud_base[i] = 460800;
2189 for (aiop = 0; aiop < max_num_aiops; aiop++)
2190 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x40);
2191 ctlp = sCtlNumToCtlPtr(i);
2192 num_aiops = sPCIInitController(ctlp, i, aiopio, max_num_aiops, ConfigIO, 0, FREQ_DIS, 0, altChanRingIndicator, UPCIRingInd);
2193 for (aiop = 0; aiop < max_num_aiops; aiop++)
2194 ctlp->AiopNumChan[aiop] = ports_per_aiop;
2196 dev_info(&dev->dev, "comtrol PCI controller #%d found at "
2197 "address %04lx, %d AIOP(s) (%s), creating ttyR%d - %ld\n",
2198 i, rcktpt_io_addr[i], num_aiops, rocketModel[i].modelString,
2199 rocketModel[i].startingPortNumber,
2200 rocketModel[i].startingPortNumber + rocketModel[i].numPorts-1);
2202 if (num_aiops <= 0) {
2203 rcktpt_io_addr[i] = 0;
2208 /* Reset the AIOPIC, init the serial ports */
2209 for (aiop = 0; aiop < num_aiops; aiop++) {
2210 sResetAiopByNum(ctlp, aiop);
2211 num_chan = ports_per_aiop;
2212 for (chan = 0; chan < num_chan; chan++)
2213 init_r_port(i, aiop, chan, dev);
2216 /* Rocket modems must be reset */
2217 if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) ||
2218 (rcktpt_type[i] == ROCKET_TYPE_MODEMII) ||
2219 (rcktpt_type[i] == ROCKET_TYPE_MODEMIII)) {
2220 num_chan = ports_per_aiop;
2221 for (chan = 0; chan < num_chan; chan++)
2222 sPCIModemReset(ctlp, chan, 1);
2224 for (chan = 0; chan < num_chan; chan++)
2225 sPCIModemReset(ctlp, chan, 0);
2227 rmSpeakerReset(ctlp, rocketModel[i].model);
2233 * Probes for PCI cards, inits them if found
2234 * Input: board_found = number of ISA boards already found, or the
2235 * starting board number
2236 * Returns: Number of PCI boards found
2238 static int __init init_PCI(int boards_found)
2240 struct pci_dev *dev = NULL;
2243 /* Work through the PCI device list, pulling out ours */
2244 while ((dev = pci_get_device(PCI_VENDOR_ID_RP, PCI_ANY_ID, dev))) {
2245 if (register_PCI(count + boards_found, dev))
2251 #endif /* CONFIG_PCI */
2254 * Probes for ISA cards
2255 * Input: i = the board number to look for
2256 * Returns: 1 if board found, 0 else
2258 static int __init init_ISA(int i)
2260 int num_aiops, num_chan = 0, total_num_chan = 0;
2262 unsigned int aiopio[MAX_AIOPS_PER_BOARD];
2266 /* If io_addr is zero, no board configured */
2267 if (rcktpt_io_addr[i] == 0)
2270 /* Reserve the IO region */
2271 if (!request_region(rcktpt_io_addr[i], 64, "Comtrol RocketPort")) {
2272 printk(KERN_ERR "Unable to reserve IO region for configured "
2273 "ISA RocketPort at address 0x%lx, board not "
2274 "installed...\n", rcktpt_io_addr[i]);
2275 rcktpt_io_addr[i] = 0;
2279 ctlp = sCtlNumToCtlPtr(i);
2281 ctlp->boardType = rcktpt_type[i];
2283 switch (rcktpt_type[i]) {
2284 case ROCKET_TYPE_PC104:
2285 type_string = "(PC104)";
2287 case ROCKET_TYPE_MODEM:
2288 type_string = "(RocketModem)";
2290 case ROCKET_TYPE_MODEMII:
2291 type_string = "(RocketModem II)";
2299 * If support_low_speed is set, use the slow clock prescale,
2300 * which supports 50 bps
2302 if (support_low_speed) {
2303 sClockPrescale = 0x19; /* mod 9 (divide by 10) prescale */
2304 rp_baud_base[i] = 230400;
2306 sClockPrescale = 0x14; /* mod 4 (devide by 5) prescale */
2307 rp_baud_base[i] = 460800;
2310 for (aiop = 0; aiop < MAX_AIOPS_PER_BOARD; aiop++)
2311 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x400);
2313 num_aiops = sInitController(ctlp, i, controller + (i * 0x400), aiopio, MAX_AIOPS_PER_BOARD, 0, FREQ_DIS, 0);
2315 if (ctlp->boardType == ROCKET_TYPE_PC104) {
2316 sEnAiop(ctlp, 2); /* only one AIOPIC, but these */
2317 sEnAiop(ctlp, 3); /* CSels used for other stuff */
2320 /* If something went wrong initing the AIOP's release the ISA IO memory */
2321 if (num_aiops <= 0) {
2322 release_region(rcktpt_io_addr[i], 64);
2323 rcktpt_io_addr[i] = 0;
2327 rocketModel[i].startingPortNumber = nextLineNumber;
2329 for (aiop = 0; aiop < num_aiops; aiop++) {
2330 sResetAiopByNum(ctlp, aiop);
2331 sEnAiop(ctlp, aiop);
2332 num_chan = sGetAiopNumChan(ctlp, aiop);
2333 total_num_chan += num_chan;
2334 for (chan = 0; chan < num_chan; chan++)
2335 init_r_port(i, aiop, chan, NULL);
2338 if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) || (rcktpt_type[i] == ROCKET_TYPE_MODEMII)) {
2339 num_chan = sGetAiopNumChan(ctlp, 0);
2340 total_num_chan = num_chan;
2341 for (chan = 0; chan < num_chan; chan++)
2342 sModemReset(ctlp, chan, 1);
2344 for (chan = 0; chan < num_chan; chan++)
2345 sModemReset(ctlp, chan, 0);
2347 strcpy(rocketModel[i].modelString, "RocketModem ISA");
2349 strcpy(rocketModel[i].modelString, "RocketPort ISA");
2351 rocketModel[i].numPorts = total_num_chan;
2352 rocketModel[i].model = MODEL_ISA;
2354 printk(KERN_INFO "RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n",
2355 i, rcktpt_io_addr[i], num_aiops, type_string);
2357 printk(KERN_INFO "Installing %s, creating /dev/ttyR%d - %ld\n",
2358 rocketModel[i].modelString,
2359 rocketModel[i].startingPortNumber,
2360 rocketModel[i].startingPortNumber +
2361 rocketModel[i].numPorts - 1);
2366 static const struct tty_operations rocket_ops = {
2370 .put_char = rp_put_char,
2371 .write_room = rp_write_room,
2372 .chars_in_buffer = rp_chars_in_buffer,
2373 .flush_buffer = rp_flush_buffer,
2375 .throttle = rp_throttle,
2376 .unthrottle = rp_unthrottle,
2377 .set_termios = rp_set_termios,
2380 .hangup = rp_hangup,
2381 .break_ctl = rp_break,
2382 .send_xchar = rp_send_xchar,
2383 .wait_until_sent = rp_wait_until_sent,
2384 .tiocmget = rp_tiocmget,
2385 .tiocmset = rp_tiocmset,
2388 static const struct tty_port_operations rocket_port_ops = {
2389 .carrier_raised = carrier_raised,
2390 .raise_dtr_rts = raise_dtr_rts,
2394 * The module "startup" routine; it's run when the module is loaded.
2396 static int __init rp_init(void)
2398 int ret = -ENOMEM, pci_boards_found, isa_boards_found, i;
2400 printk(KERN_INFO "RocketPort device driver module, version %s, %s\n",
2401 ROCKET_VERSION, ROCKET_DATE);
2403 rocket_driver = alloc_tty_driver(MAX_RP_PORTS);
2408 * If board 1 is non-zero, there is at least one ISA configured. If controller is
2409 * zero, use the default controller IO address of board1 + 0x40.
2412 if (controller == 0)
2413 controller = board1 + 0x40;
2415 controller = 0; /* Used as a flag, meaning no ISA boards */
2418 /* If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2419 if (controller && (!request_region(controller, 4, "Comtrol RocketPort"))) {
2420 printk(KERN_ERR "Unable to reserve IO region for first "
2421 "configured ISA RocketPort controller 0x%lx. "
2422 "Driver exiting\n", controller);
2427 /* Store ISA variable retrieved from command line or .conf file. */
2428 rcktpt_io_addr[0] = board1;
2429 rcktpt_io_addr[1] = board2;
2430 rcktpt_io_addr[2] = board3;
2431 rcktpt_io_addr[3] = board4;
2433 rcktpt_type[0] = modem1 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2434 rcktpt_type[0] = pc104_1[0] ? ROCKET_TYPE_PC104 : rcktpt_type[0];
2435 rcktpt_type[1] = modem2 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2436 rcktpt_type[1] = pc104_2[0] ? ROCKET_TYPE_PC104 : rcktpt_type[1];
2437 rcktpt_type[2] = modem3 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2438 rcktpt_type[2] = pc104_3[0] ? ROCKET_TYPE_PC104 : rcktpt_type[2];
2439 rcktpt_type[3] = modem4 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2440 rcktpt_type[3] = pc104_4[0] ? ROCKET_TYPE_PC104 : rcktpt_type[3];
2443 * Set up the tty driver structure and then register this
2444 * driver with the tty layer.
2447 rocket_driver->owner = THIS_MODULE;
2448 rocket_driver->flags = TTY_DRIVER_DYNAMIC_DEV;
2449 rocket_driver->name = "ttyR";
2450 rocket_driver->driver_name = "Comtrol RocketPort";
2451 rocket_driver->major = TTY_ROCKET_MAJOR;
2452 rocket_driver->minor_start = 0;
2453 rocket_driver->type = TTY_DRIVER_TYPE_SERIAL;
2454 rocket_driver->subtype = SERIAL_TYPE_NORMAL;
2455 rocket_driver->init_termios = tty_std_termios;
2456 rocket_driver->init_termios.c_cflag =
2457 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2458 rocket_driver->init_termios.c_ispeed = 9600;
2459 rocket_driver->init_termios.c_ospeed = 9600;
2460 #ifdef ROCKET_SOFT_FLOW
2461 rocket_driver->flags |= TTY_DRIVER_REAL_RAW;
2463 tty_set_operations(rocket_driver, &rocket_ops);
2465 ret = tty_register_driver(rocket_driver);
2467 printk(KERN_ERR "Couldn't install tty RocketPort driver\n");
2471 #ifdef ROCKET_DEBUG_OPEN
2472 printk(KERN_INFO "RocketPort driver is major %d\n", rocket_driver.major);
2476 * OK, let's probe each of the controllers looking for boards. Any boards found
2477 * will be initialized here.
2479 isa_boards_found = 0;
2480 pci_boards_found = 0;
2482 for (i = 0; i < NUM_BOARDS; i++) {
2488 if (isa_boards_found < NUM_BOARDS)
2489 pci_boards_found = init_PCI(isa_boards_found);
2492 max_board = pci_boards_found + isa_boards_found;
2494 if (max_board == 0) {
2495 printk(KERN_ERR "No rocketport ports found; unloading driver\n");
2502 tty_unregister_driver(rocket_driver);
2504 put_tty_driver(rocket_driver);
2510 static void rp_cleanup_module(void)
2515 del_timer_sync(&rocket_timer);
2517 retval = tty_unregister_driver(rocket_driver);
2519 printk(KERN_ERR "Error %d while trying to unregister "
2520 "rocketport driver\n", -retval);
2522 for (i = 0; i < MAX_RP_PORTS; i++)
2524 tty_unregister_device(rocket_driver, i);
2528 put_tty_driver(rocket_driver);
2530 for (i = 0; i < NUM_BOARDS; i++) {
2531 if (rcktpt_io_addr[i] <= 0 || is_PCI[i])
2533 release_region(rcktpt_io_addr[i], 64);
2536 release_region(controller, 4);
2539 /***************************************************************************
2540 Function: sInitController
2541 Purpose: Initialization of controller global registers and controller
2543 Call: sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2544 IRQNum,Frequency,PeriodicOnly)
2545 CONTROLLER_T *CtlP; Ptr to controller structure
2546 int CtlNum; Controller number
2547 ByteIO_t MudbacIO; Mudbac base I/O address.
2548 ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2549 This list must be in the order the AIOPs will be found on the
2550 controller. Once an AIOP in the list is not found, it is
2551 assumed that there are no more AIOPs on the controller.
2552 int AiopIOListSize; Number of addresses in AiopIOList
2553 int IRQNum; Interrupt Request number. Can be any of the following:
2554 0: Disable global interrupts
2563 Byte_t Frequency: A flag identifying the frequency
2564 of the periodic interrupt, can be any one of the following:
2565 FREQ_DIS - periodic interrupt disabled
2566 FREQ_137HZ - 137 Hertz
2567 FREQ_69HZ - 69 Hertz
2568 FREQ_34HZ - 34 Hertz
2569 FREQ_17HZ - 17 Hertz
2572 If IRQNum is set to 0 the Frequency parameter is
2573 overidden, it is forced to a value of FREQ_DIS.
2574 int PeriodicOnly: 1 if all interrupts except the periodic
2575 interrupt are to be blocked.
2576 0 is both the periodic interrupt and
2577 other channel interrupts are allowed.
2578 If IRQNum is set to 0 the PeriodicOnly parameter is
2579 overidden, it is forced to a value of 0.
2580 Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
2581 initialization failed.
2584 If periodic interrupts are to be disabled but AIOP interrupts
2585 are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2587 If interrupts are to be completely disabled set IRQNum to 0.
2589 Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2590 invalid combination.
2592 This function performs initialization of global interrupt modes,
2593 but it does not actually enable global interrupts. To enable
2594 and disable global interrupts use functions sEnGlobalInt() and
2595 sDisGlobalInt(). Enabling of global interrupts is normally not
2596 done until all other initializations are complete.
2598 Even if interrupts are globally enabled, they must also be
2599 individually enabled for each channel that is to generate
2602 Warnings: No range checking on any of the parameters is done.
2604 No context switches are allowed while executing this function.
2606 After this function all AIOPs on the controller are disabled,
2607 they can be enabled with sEnAiop().
2609 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
2610 ByteIO_t * AiopIOList, int AiopIOListSize,
2611 int IRQNum, Byte_t Frequency, int PeriodicOnly)
2617 CtlP->AiopIntrBits = aiop_intr_bits;
2618 CtlP->AltChanRingIndicator = 0;
2619 CtlP->CtlNum = CtlNum;
2620 CtlP->CtlID = CTLID_0001; /* controller release 1 */
2621 CtlP->BusType = isISA;
2622 CtlP->MBaseIO = MudbacIO;
2623 CtlP->MReg1IO = MudbacIO + 1;
2624 CtlP->MReg2IO = MudbacIO + 2;
2625 CtlP->MReg3IO = MudbacIO + 3;
2627 CtlP->MReg2 = 0; /* interrupt disable */
2628 CtlP->MReg3 = 0; /* no periodic interrupts */
2630 if (sIRQMap[IRQNum] == 0) { /* interrupts globally disabled */
2631 CtlP->MReg2 = 0; /* interrupt disable */
2632 CtlP->MReg3 = 0; /* no periodic interrupts */
2634 CtlP->MReg2 = sIRQMap[IRQNum]; /* set IRQ number */
2635 CtlP->MReg3 = Frequency; /* set frequency */
2636 if (PeriodicOnly) { /* periodic interrupt only */
2637 CtlP->MReg3 |= PERIODIC_ONLY;
2641 sOutB(CtlP->MReg2IO, CtlP->MReg2);
2642 sOutB(CtlP->MReg3IO, CtlP->MReg3);
2643 sControllerEOI(CtlP); /* clear EOI if warm init */
2646 for (i = done = 0; i < AiopIOListSize; i++) {
2648 CtlP->AiopIO[i] = (WordIO_t) io;
2649 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2650 sOutB(CtlP->MReg2IO, CtlP->MReg2 | (i & 0x03)); /* AIOP index */
2651 sOutB(MudbacIO, (Byte_t) (io >> 6)); /* set up AIOP I/O in MUDBAC */
2654 sEnAiop(CtlP, i); /* enable the AIOP */
2655 CtlP->AiopID[i] = sReadAiopID(io); /* read AIOP ID */
2656 if (CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */
2657 done = 1; /* done looking for AIOPs */
2659 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2660 sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE); /* clock prescaler */
2661 sOutB(io + _INDX_DATA, sClockPrescale);
2662 CtlP->NumAiop++; /* bump count of AIOPs */
2664 sDisAiop(CtlP, i); /* disable AIOP */
2667 if (CtlP->NumAiop == 0)
2670 return (CtlP->NumAiop);
2673 /***************************************************************************
2674 Function: sPCIInitController
2675 Purpose: Initialization of controller global registers and controller
2677 Call: sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
2678 IRQNum,Frequency,PeriodicOnly)
2679 CONTROLLER_T *CtlP; Ptr to controller structure
2680 int CtlNum; Controller number
2681 ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2682 This list must be in the order the AIOPs will be found on the
2683 controller. Once an AIOP in the list is not found, it is
2684 assumed that there are no more AIOPs on the controller.
2685 int AiopIOListSize; Number of addresses in AiopIOList
2686 int IRQNum; Interrupt Request number. Can be any of the following:
2687 0: Disable global interrupts
2696 Byte_t Frequency: A flag identifying the frequency
2697 of the periodic interrupt, can be any one of the following:
2698 FREQ_DIS - periodic interrupt disabled
2699 FREQ_137HZ - 137 Hertz
2700 FREQ_69HZ - 69 Hertz
2701 FREQ_34HZ - 34 Hertz
2702 FREQ_17HZ - 17 Hertz
2705 If IRQNum is set to 0 the Frequency parameter is
2706 overidden, it is forced to a value of FREQ_DIS.
2707 int PeriodicOnly: 1 if all interrupts except the periodic
2708 interrupt are to be blocked.
2709 0 is both the periodic interrupt and
2710 other channel interrupts are allowed.
2711 If IRQNum is set to 0 the PeriodicOnly parameter is
2712 overidden, it is forced to a value of 0.
2713 Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
2714 initialization failed.
2717 If periodic interrupts are to be disabled but AIOP interrupts
2718 are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2720 If interrupts are to be completely disabled set IRQNum to 0.
2722 Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2723 invalid combination.
2725 This function performs initialization of global interrupt modes,
2726 but it does not actually enable global interrupts. To enable
2727 and disable global interrupts use functions sEnGlobalInt() and
2728 sDisGlobalInt(). Enabling of global interrupts is normally not
2729 done until all other initializations are complete.
2731 Even if interrupts are globally enabled, they must also be
2732 individually enabled for each channel that is to generate
2735 Warnings: No range checking on any of the parameters is done.
2737 No context switches are allowed while executing this function.
2739 After this function all AIOPs on the controller are disabled,
2740 they can be enabled with sEnAiop().
2742 static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
2743 ByteIO_t * AiopIOList, int AiopIOListSize,
2744 WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
2745 int PeriodicOnly, int altChanRingIndicator,
2751 CtlP->AltChanRingIndicator = altChanRingIndicator;
2752 CtlP->UPCIRingInd = UPCIRingInd;
2753 CtlP->CtlNum = CtlNum;
2754 CtlP->CtlID = CTLID_0001; /* controller release 1 */
2755 CtlP->BusType = isPCI; /* controller release 1 */
2759 CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL;
2760 CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL;
2761 CtlP->AiopIntrBits = upci_aiop_intr_bits;
2765 (WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC);
2766 CtlP->AiopIntrBits = aiop_intr_bits;
2769 sPCIControllerEOI(CtlP); /* clear EOI if warm init */
2772 for (i = 0; i < AiopIOListSize; i++) {
2774 CtlP->AiopIO[i] = (WordIO_t) io;
2775 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2777 CtlP->AiopID[i] = sReadAiopID(io); /* read AIOP ID */
2778 if (CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */
2779 break; /* done looking for AIOPs */
2781 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2782 sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE); /* clock prescaler */
2783 sOutB(io + _INDX_DATA, sClockPrescale);
2784 CtlP->NumAiop++; /* bump count of AIOPs */
2787 if (CtlP->NumAiop == 0)
2790 return (CtlP->NumAiop);
2793 /***************************************************************************
2794 Function: sReadAiopID
2795 Purpose: Read the AIOP idenfication number directly from an AIOP.
2796 Call: sReadAiopID(io)
2797 ByteIO_t io: AIOP base I/O address
2798 Return: int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2799 is replace by an identifying number.
2800 Flag AIOPID_NULL if no valid AIOP is found
2801 Warnings: No context switches are allowed while executing this function.
2804 static int sReadAiopID(ByteIO_t io)
2806 Byte_t AiopID; /* ID byte from AIOP */
2808 sOutB(io + _CMD_REG, RESET_ALL); /* reset AIOP */
2809 sOutB(io + _CMD_REG, 0x0);
2810 AiopID = sInW(io + _CHN_STAT0) & 0x07;
2813 else /* AIOP does not exist */
2817 /***************************************************************************
2818 Function: sReadAiopNumChan
2819 Purpose: Read the number of channels available in an AIOP directly from
2821 Call: sReadAiopNumChan(io)
2822 WordIO_t io: AIOP base I/O address
2823 Return: int: The number of channels available
2824 Comments: The number of channels is determined by write/reads from identical
2825 offsets within the SRAM address spaces for channels 0 and 4.
2826 If the channel 4 space is mirrored to channel 0 it is a 4 channel
2827 AIOP, otherwise it is an 8 channel.
2828 Warnings: No context switches are allowed while executing this function.
2830 static int sReadAiopNumChan(WordIO_t io)
2833 static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
2835 /* write to chan 0 SRAM */
2836 out32((DWordIO_t) io + _INDX_ADDR, R);
2837 sOutW(io + _INDX_ADDR, 0); /* read from SRAM, chan 0 */
2838 x = sInW(io + _INDX_DATA);
2839 sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */
2840 if (x != sInW(io + _INDX_DATA)) /* if different must be 8 chan */
2846 /***************************************************************************
2848 Purpose: Initialization of a channel and channel structure
2849 Call: sInitChan(CtlP,ChP,AiopNum,ChanNum)
2850 CONTROLLER_T *CtlP; Ptr to controller structure
2851 CHANNEL_T *ChP; Ptr to channel structure
2852 int AiopNum; AIOP number within controller
2853 int ChanNum; Channel number within AIOP
2854 Return: int: 1 if initialization succeeded, 0 if it fails because channel
2855 number exceeds number of channels available in AIOP.
2856 Comments: This function must be called before a channel can be used.
2857 Warnings: No range checking on any of the parameters is done.
2859 No context switches are allowed while executing this function.
2861 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
2872 if (ChanNum >= CtlP->AiopNumChan[AiopNum])
2873 return 0; /* exceeds num chans in AIOP */
2875 /* Channel, AIOP, and controller identifiers */
2877 ChP->ChanID = CtlP->AiopID[AiopNum];
2878 ChP->AiopNum = AiopNum;
2879 ChP->ChanNum = ChanNum;
2881 /* Global direct addresses */
2882 AiopIO = CtlP->AiopIO[AiopNum];
2883 ChP->Cmd = (ByteIO_t) AiopIO + _CMD_REG;
2884 ChP->IntChan = (ByteIO_t) AiopIO + _INT_CHAN;
2885 ChP->IntMask = (ByteIO_t) AiopIO + _INT_MASK;
2886 ChP->IndexAddr = (DWordIO_t) AiopIO + _INDX_ADDR;
2887 ChP->IndexData = AiopIO + _INDX_DATA;
2889 /* Channel direct addresses */
2890 ChIOOff = AiopIO + ChP->ChanNum * 2;
2891 ChP->TxRxData = ChIOOff + _TD0;
2892 ChP->ChanStat = ChIOOff + _CHN_STAT0;
2893 ChP->TxRxCount = ChIOOff + _FIFO_CNT0;
2894 ChP->IntID = (ByteIO_t) AiopIO + ChP->ChanNum + _INT_ID0;
2896 /* Initialize the channel from the RData array */
2897 for (i = 0; i < RDATASIZE; i += 4) {
2899 R[1] = RData[i + 1] + 0x10 * ChanNum;
2900 R[2] = RData[i + 2];
2901 R[3] = RData[i + 3];
2902 out32(ChP->IndexAddr, R);
2906 for (i = 0; i < RREGDATASIZE; i += 4) {
2907 ChR[i] = RRegData[i];
2908 ChR[i + 1] = RRegData[i + 1] + 0x10 * ChanNum;
2909 ChR[i + 2] = RRegData[i + 2];
2910 ChR[i + 3] = RRegData[i + 3];
2913 /* Indexed registers */
2914 ChOff = (Word_t) ChanNum *0x1000;
2916 if (sClockPrescale == 0x14)
2921 ChP->BaudDiv[0] = (Byte_t) (ChOff + _BAUD);
2922 ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
2923 ChP->BaudDiv[2] = (Byte_t) brd9600;
2924 ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
2925 out32(ChP->IndexAddr, ChP->BaudDiv);
2927 ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
2928 ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
2929 ChP->TxControl[2] = 0;
2930 ChP->TxControl[3] = 0;
2931 out32(ChP->IndexAddr, ChP->TxControl);
2933 ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
2934 ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
2935 ChP->RxControl[2] = 0;
2936 ChP->RxControl[3] = 0;
2937 out32(ChP->IndexAddr, ChP->RxControl);
2939 ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
2940 ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
2941 ChP->TxEnables[2] = 0;
2942 ChP->TxEnables[3] = 0;
2943 out32(ChP->IndexAddr, ChP->TxEnables);
2945 ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
2946 ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
2947 ChP->TxCompare[2] = 0;
2948 ChP->TxCompare[3] = 0;
2949 out32(ChP->IndexAddr, ChP->TxCompare);
2951 ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
2952 ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
2953 ChP->TxReplace1[2] = 0;
2954 ChP->TxReplace1[3] = 0;
2955 out32(ChP->IndexAddr, ChP->TxReplace1);
2957 ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
2958 ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
2959 ChP->TxReplace2[2] = 0;
2960 ChP->TxReplace2[3] = 0;
2961 out32(ChP->IndexAddr, ChP->TxReplace2);
2963 ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
2964 ChP->TxFIFO = ChOff + _TX_FIFO;
2966 sOutB(ChP->Cmd, (Byte_t) ChanNum | RESTXFCNT); /* apply reset Tx FIFO count */
2967 sOutB(ChP->Cmd, (Byte_t) ChanNum); /* remove reset Tx FIFO count */
2968 sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs); /* clear Tx in/out ptrs */
2969 sOutW(ChP->IndexData, 0);
2970 ChP->RxFIFOPtrs = ChOff + _RXF_OUTP;
2971 ChP->RxFIFO = ChOff + _RX_FIFO;
2973 sOutB(ChP->Cmd, (Byte_t) ChanNum | RESRXFCNT); /* apply reset Rx FIFO count */
2974 sOutB(ChP->Cmd, (Byte_t) ChanNum); /* remove reset Rx FIFO count */
2975 sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs); /* clear Rx out ptr */
2976 sOutW(ChP->IndexData, 0);
2977 sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2); /* clear Rx in ptr */
2978 sOutW(ChP->IndexData, 0);
2979 ChP->TxPrioCnt = ChOff + _TXP_CNT;
2980 sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioCnt);
2981 sOutB(ChP->IndexData, 0);
2982 ChP->TxPrioPtr = ChOff + _TXP_PNTR;
2983 sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioPtr);
2984 sOutB(ChP->IndexData, 0);
2985 ChP->TxPrioBuf = ChOff + _TXP_BUF;
2986 sEnRxProcessor(ChP); /* start the Rx processor */
2991 /***************************************************************************
2992 Function: sStopRxProcessor
2993 Purpose: Stop the receive processor from processing a channel.
2994 Call: sStopRxProcessor(ChP)
2995 CHANNEL_T *ChP; Ptr to channel structure
2997 Comments: The receive processor can be started again with sStartRxProcessor().
2998 This function causes the receive processor to skip over the
2999 stopped channel. It does not stop it from processing other channels.
3001 Warnings: No context switches are allowed while executing this function.
3003 Do not leave the receive processor stopped for more than one
3006 After calling this function a delay of 4 uS is required to ensure
3007 that the receive processor is no longer processing this channel.
3009 static void sStopRxProcessor(CHANNEL_T * ChP)
3017 out32(ChP->IndexAddr, R);
3020 /***************************************************************************
3021 Function: sFlushRxFIFO
3022 Purpose: Flush the Rx FIFO
3023 Call: sFlushRxFIFO(ChP)
3024 CHANNEL_T *ChP; Ptr to channel structure
3026 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
3027 while it is being flushed the receive processor is stopped
3028 and the transmitter is disabled. After these operations a
3029 4 uS delay is done before clearing the pointers to allow
3030 the receive processor to stop. These items are handled inside
3032 Warnings: No context switches are allowed while executing this function.
3034 static void sFlushRxFIFO(CHANNEL_T * ChP)
3037 Byte_t Ch; /* channel number within AIOP */
3038 int RxFIFOEnabled; /* 1 if Rx FIFO enabled */
3040 if (sGetRxCnt(ChP) == 0) /* Rx FIFO empty */
3041 return; /* don't need to flush */
3044 if (ChP->R[0x32] == 0x08) { /* Rx FIFO is enabled */
3046 sDisRxFIFO(ChP); /* disable it */
3047 for (i = 0; i < 2000 / 200; i++) /* delay 2 uS to allow proc to disable FIFO */
3048 sInB(ChP->IntChan); /* depends on bus i/o timing */
3050 sGetChanStatus(ChP); /* clear any pending Rx errors in chan stat */
3051 Ch = (Byte_t) sGetChanNum(ChP);
3052 sOutB(ChP->Cmd, Ch | RESRXFCNT); /* apply reset Rx FIFO count */
3053 sOutB(ChP->Cmd, Ch); /* remove reset Rx FIFO count */
3054 sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs); /* clear Rx out ptr */
3055 sOutW(ChP->IndexData, 0);
3056 sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2); /* clear Rx in ptr */
3057 sOutW(ChP->IndexData, 0);
3059 sEnRxFIFO(ChP); /* enable Rx FIFO */
3062 /***************************************************************************
3063 Function: sFlushTxFIFO
3064 Purpose: Flush the Tx FIFO
3065 Call: sFlushTxFIFO(ChP)
3066 CHANNEL_T *ChP; Ptr to channel structure
3068 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
3069 while it is being flushed the receive processor is stopped
3070 and the transmitter is disabled. After these operations a
3071 4 uS delay is done before clearing the pointers to allow
3072 the receive processor to stop. These items are handled inside
3074 Warnings: No context switches are allowed while executing this function.
3076 static void sFlushTxFIFO(CHANNEL_T * ChP)
3079 Byte_t Ch; /* channel number within AIOP */
3080 int TxEnabled; /* 1 if transmitter enabled */
3082 if (sGetTxCnt(ChP) == 0) /* Tx FIFO empty */
3083 return; /* don't need to flush */
3086 if (ChP->TxControl[3] & TX_ENABLE) {
3088 sDisTransmit(ChP); /* disable transmitter */
3090 sStopRxProcessor(ChP); /* stop Rx processor */
3091 for (i = 0; i < 4000 / 200; i++) /* delay 4 uS to allow proc to stop */
3092 sInB(ChP->IntChan); /* depends on bus i/o timing */
3093 Ch = (Byte_t) sGetChanNum(ChP);
3094 sOutB(ChP->Cmd, Ch | RESTXFCNT); /* apply reset Tx FIFO count */
3095 sOutB(ChP->Cmd, Ch); /* remove reset Tx FIFO count */
3096 sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs); /* clear Tx in/out ptrs */
3097 sOutW(ChP->IndexData, 0);
3099 sEnTransmit(ChP); /* enable transmitter */
3100 sStartRxProcessor(ChP); /* restart Rx processor */
3103 /***************************************************************************
3104 Function: sWriteTxPrioByte
3105 Purpose: Write a byte of priority transmit data to a channel
3106 Call: sWriteTxPrioByte(ChP,Data)
3107 CHANNEL_T *ChP; Ptr to channel structure
3108 Byte_t Data; The transmit data byte
3110 Return: int: 1 if the bytes is successfully written, otherwise 0.
3112 Comments: The priority byte is transmitted before any data in the Tx FIFO.
3114 Warnings: No context switches are allowed while executing this function.
3116 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
3118 Byte_t DWBuf[4]; /* buffer for double word writes */
3119 Word_t *WordPtr; /* must be far because Win SS != DS */
3120 register DWordIO_t IndexAddr;
3122 if (sGetTxCnt(ChP) > 1) { /* write it to Tx priority buffer */
3123 IndexAddr = ChP->IndexAddr;
3124 sOutW((WordIO_t) IndexAddr, ChP->TxPrioCnt); /* get priority buffer status */
3125 if (sInB((ByteIO_t) ChP->IndexData) & PRI_PEND) /* priority buffer busy */
3126 return (0); /* nothing sent */
3128 WordPtr = (Word_t *) (&DWBuf[0]);
3129 *WordPtr = ChP->TxPrioBuf; /* data byte address */
3131 DWBuf[2] = Data; /* data byte value */
3132 out32(IndexAddr, DWBuf); /* write it out */
3134 *WordPtr = ChP->TxPrioCnt; /* Tx priority count address */
3136 DWBuf[2] = PRI_PEND + 1; /* indicate 1 byte pending */
3137 DWBuf[3] = 0; /* priority buffer pointer */
3138 out32(IndexAddr, DWBuf); /* write it out */
3139 } else { /* write it to Tx FIFO */
3141 sWriteTxByte(sGetTxRxDataIO(ChP), Data);
3143 return (1); /* 1 byte sent */
3146 /***************************************************************************
3147 Function: sEnInterrupts
3148 Purpose: Enable one or more interrupts for a channel
3149 Call: sEnInterrupts(ChP,Flags)
3150 CHANNEL_T *ChP; Ptr to channel structure
3151 Word_t Flags: Interrupt enable flags, can be any combination
3152 of the following flags:
3153 TXINT_EN: Interrupt on Tx FIFO empty
3154 RXINT_EN: Interrupt on Rx FIFO at trigger level (see
3156 SRCINT_EN: Interrupt on SRC (Special Rx Condition)
3157 MCINT_EN: Interrupt on modem input change
3158 CHANINT_EN: Allow channel interrupt signal to the AIOP's
3159 Interrupt Channel Register.
3161 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
3162 enabled. If an interrupt enable flag is not set in Flags, that
3163 interrupt will not be changed. Interrupts can be disabled with
3164 function sDisInterrupts().
3166 This function sets the appropriate bit for the channel in the AIOP's
3167 Interrupt Mask Register if the CHANINT_EN flag is set. This allows
3168 this channel's bit to be set in the AIOP's Interrupt Channel Register.
3170 Interrupts must also be globally enabled before channel interrupts
3171 will be passed on to the host. This is done with function
3174 In some cases it may be desirable to disable interrupts globally but
3175 enable channel interrupts. This would allow the global interrupt
3176 status register to be used to determine which AIOPs need service.
3178 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags)
3180 Byte_t Mask; /* Interrupt Mask Register */
3182 ChP->RxControl[2] |=
3183 ((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3185 out32(ChP->IndexAddr, ChP->RxControl);
3187 ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
3189 out32(ChP->IndexAddr, ChP->TxControl);
3191 if (Flags & CHANINT_EN) {
3192 Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
3193 sOutB(ChP->IntMask, Mask);
3197 /***************************************************************************
3198 Function: sDisInterrupts
3199 Purpose: Disable one or more interrupts for a channel
3200 Call: sDisInterrupts(ChP,Flags)
3201 CHANNEL_T *ChP; Ptr to channel structure
3202 Word_t Flags: Interrupt flags, can be any combination
3203 of the following flags:
3204 TXINT_EN: Interrupt on Tx FIFO empty
3205 RXINT_EN: Interrupt on Rx FIFO at trigger level (see
3207 SRCINT_EN: Interrupt on SRC (Special Rx Condition)
3208 MCINT_EN: Interrupt on modem input change
3209 CHANINT_EN: Disable channel interrupt signal to the
3210 AIOP's Interrupt Channel Register.
3212 Comments: If an interrupt flag is set in Flags, that interrupt will be
3213 disabled. If an interrupt flag is not set in Flags, that
3214 interrupt will not be changed. Interrupts can be enabled with
3215 function sEnInterrupts().
3217 This function clears the appropriate bit for the channel in the AIOP's
3218 Interrupt Mask Register if the CHANINT_EN flag is set. This blocks
3219 this channel's bit from being set in the AIOP's Interrupt Channel
3222 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags)
3224 Byte_t Mask; /* Interrupt Mask Register */
3226 ChP->RxControl[2] &=
3227 ~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3228 out32(ChP->IndexAddr, ChP->RxControl);
3229 ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
3230 out32(ChP->IndexAddr, ChP->TxControl);
3232 if (Flags & CHANINT_EN) {
3233 Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
3234 sOutB(ChP->IntMask, Mask);
3238 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode)
3240 sOutB(ChP->CtlP->AiopIO[2], (mode & 0x18) | ChP->ChanNum);
3244 * Not an official SSCI function, but how to reset RocketModems.
3247 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on)
3252 addr = CtlP->AiopIO[0] + 0x400;
3253 val = sInB(CtlP->MReg3IO);
3254 /* if AIOP[1] is not enabled, enable it */
3255 if ((val & 2) == 0) {
3256 val = sInB(CtlP->MReg2IO);
3257 sOutB(CtlP->MReg2IO, (val & 0xfc) | (1 & 0x03));
3258 sOutB(CtlP->MBaseIO, (unsigned char) (addr >> 6));
3264 sOutB(addr + chan, 0); /* apply or remove reset */
3269 * Not an official SSCI function, but how to reset RocketModems.
3272 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on)
3276 addr = CtlP->AiopIO[0] + 0x40; /* 2nd AIOP */
3279 sOutB(addr + chan, 0); /* apply or remove reset */
3282 /* Resets the speaker controller on RocketModem II and III devices */
3283 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model)
3287 /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
3288 if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) {
3289 addr = CtlP->AiopIO[0] + 0x4F;
3293 /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
3294 if ((model == MODEL_UPCI_RM3_8PORT)
3295 || (model == MODEL_UPCI_RM3_4PORT)) {
3296 addr = CtlP->AiopIO[0] + 0x88;
3301 /* Returns the line number given the controller (board), aiop and channel number */
3302 static unsigned char GetLineNumber(int ctrl, int aiop, int ch)
3304 return lineNumbers[(ctrl << 5) | (aiop << 3) | ch];
3308 * Stores the line number associated with a given controller (board), aiop
3309 * and channel number.
3310 * Returns: The line number assigned
3312 static unsigned char SetLineNumber(int ctrl, int aiop, int ch)
3314 lineNumbers[(ctrl << 5) | (aiop << 3) | ch] = nextLineNumber++;
3315 return (nextLineNumber - 1);