2 * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
4 * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
6 * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
8 * Conversion to mempool API and ARM MMU section mapping
9 * by Paul Mundt <paul.mundt@nokia.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/module.h>
28 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/delay.h>
33 #include <linux/mempool.h>
34 #include <linux/clk.h>
35 #include <asm/uaccess.h>
38 #include <asm/pgalloc.h>
39 #include <asm/pgtable.h>
40 #include <asm/arch/tc.h>
41 #include <asm/arch/omapfb.h>
42 #include <asm/arch/dsp.h>
43 #include <asm/arch/mailbox.h>
44 #include <asm/arch/mmu.h>
45 #include "dsp_mbcmd.h"
50 #if defined(CONFIG_ARCH_OMAP1)
51 #include "../../mach-omap1/mmu.h"
52 #elif defined(CONFIG_ARCH_OMAP2)
53 #include "../../mach-omap2/mmu.h"
59 static struct mem_sync_struct mem_sync;
61 int dsp_mem_sync_inc(void)
63 if (dsp_mem_enable((void *)dspmem_base) < 0)
66 mem_sync.DARAM->ad_arm++;
68 mem_sync.SARAM->ad_arm++;
70 mem_sync.SDRAM->ad_arm++;
71 dsp_mem_disable((void *)dspmem_base);
77 * dsp_mem_sync_config() is called from mbox1 workqueue
79 int dsp_mem_sync_config(struct mem_sync_struct *sync)
81 size_t sync_seq_sz = sizeof(struct sync_seq);
83 #ifdef OLD_BINARY_SUPPORT
85 memset(&mem_sync, 0, sizeof(struct mem_sync_struct));
89 if ((dsp_mem_type(sync->DARAM, sync_seq_sz) != MEM_TYPE_DARAM) ||
90 (dsp_mem_type(sync->SARAM, sync_seq_sz) != MEM_TYPE_SARAM) ||
91 (dsp_mem_type(sync->SDRAM, sync_seq_sz) != MEM_TYPE_EXTERN)) {
93 "omapdsp: mem_sync address validation failure!\n"
94 " mem_sync.DARAM = 0x%p,\n"
95 " mem_sync.SARAM = 0x%p,\n"
96 " mem_sync.SDRAM = 0x%p,\n",
97 sync->DARAM, sync->SARAM, sync->SDRAM);
101 memcpy(&mem_sync, sync, sizeof(struct mem_sync_struct));
107 enum dsp_mem_type_e dsp_mem_type(void *vadr, size_t len)
109 void *ds = (void *)daram_base;
110 void *de = (void *)daram_base + daram_size;
111 void *ss = (void *)saram_base;
112 void *se = (void *)saram_base + saram_size;
115 if ((vadr >= ds) && (vadr < de)) {
117 return MEM_TYPE_CROSSING;
119 return MEM_TYPE_DARAM;
120 } else if ((vadr >= ss) && (vadr < se)) {
122 return MEM_TYPE_CROSSING;
124 return MEM_TYPE_SARAM;
126 down_read(&dsp_mmu.exmap_sem);
127 if (exmap_valid(&dsp_mmu, vadr, len))
128 ret = MEM_TYPE_EXTERN;
131 up_read(&dsp_mmu.exmap_sem);
136 int dsp_address_validate(void *p, size_t len, char *fmt, ...)
141 if (dsp_mem_type(p, len) > 0)
148 vsprintf(s, fmt, args);
151 "omapdsp: %s address(0x%p) and size(0x%x) is not valid!\n"
152 "(crossing different type of memories, or external memory\n"
153 "space where no actual memory is mapped)\n", s, p, len);
158 #ifdef CONFIG_OMAP_DSP_FBEXPORT
160 static inline unsigned long lineup_offset(unsigned long adr,
164 unsigned long newadr;
166 newadr = (adr & ~mask) | (ref & mask);
173 * fb update functions:
174 * fbupd_response() is executed by the workqueue.
175 * fbupd_cb() is called when fb update is done, in interrupt context.
176 * mbox_fbupd() is called when KFUNC:FBCTL:UPD is received from DSP.
178 static void fbupd_response(struct work_struct *unused)
182 status = mbcompose_send(KFUNC, KFUNC_FBCTL, FBCTL_UPD);
186 /* FIXME: DSP is busy !! */
189 "DSP is busy when trying to send FBCTL:UPD response!\n");
192 static DECLARE_WORK(fbupd_response_work, fbupd_response);
194 static void fbupd_cb(void *arg)
196 schedule_work(&fbupd_response_work);
199 void mbox_fbctl_upd(void)
201 struct omapfb_update_window win;
202 volatile unsigned short *buf = ipbuf_sys_da->d;
204 if (sync_with_dsp(&ipbuf_sys_da->s, TID_ANON, 5000) < 0) {
205 printk(KERN_ERR "mbox: FBCTL:UPD - IPBUF sync failed!\n");
213 release_ipbuf_pvt(ipbuf_sys_da);
215 #ifdef CONFIG_FB_OMAP_LCDC_EXTERNAL
218 "omapdsp: fbupd() called while HWA742 is not ready!\n");
222 omapfb_update_window_async(registered_fb[0], &win, fbupd_cb, NULL);
225 #ifdef CONFIG_FB_OMAP_LCDC_EXTERNAL
226 static int omapfb_notifier_cb(struct notifier_block *omapfb_nb,
227 unsigned long event, void *fbi)
229 pr_info("omapfb_notifier_cb(): event = %s\n",
230 (event == OMAPFB_EVENT_READY) ? "READY" :
231 (event == OMAPFB_EVENT_DISABLED) ? "DISABLED" : "Unknown");
232 if (event == OMAPFB_EVENT_READY)
234 else if (event == OMAPFB_EVENT_DISABLED)
240 static int dsp_fbexport(dsp_long_t *dspadr)
242 dsp_long_t dspadr_actual;
243 unsigned long padr_sys, padr, fbsz_sys, fbsz;
245 #ifdef CONFIG_FB_OMAP_LCDC_EXTERNAL
249 pr_debug( "omapdsp: frame buffer export\n");
251 #ifdef CONFIG_FB_OMAP_LCDC_EXTERNAL
254 "omapdsp: frame buffer has been exported already!\n");
259 if (num_registered_fb == 0) {
260 pr_info("omapdsp: frame buffer not registered.\n");
263 if (num_registered_fb != 1) {
264 pr_info("omapdsp: %d frame buffers found. we use first one.\n",
267 padr_sys = registered_fb[0]->fix.smem_start;
268 fbsz_sys = registered_fb[0]->fix.smem_len;
271 "omapdsp: framebuffer doesn't seem to be configured "
272 "correctly! (size=0)\n");
277 * align padr and fbsz to 4kB boundary
278 * (should be noted to the user afterwards!)
280 padr = padr_sys & ~(SZ_4K-1);
281 fbsz = (fbsz_sys + padr_sys - padr + SZ_4K-1) & ~(SZ_4K-1);
283 /* line up dspadr offset with padr */
285 (fbsz > SZ_1M) ? lineup_offset(*dspadr, padr, SZ_1M-1) :
286 (fbsz > SZ_64K) ? lineup_offset(*dspadr, padr, SZ_64K-1) :
287 /* (fbsz > SZ_4KB) ? */ *dspadr;
288 if (dspadr_actual != *dspadr)
290 "omapdsp: actual dspadr for FBEXPORT = %08x\n",
292 *dspadr = dspadr_actual;
294 cnt = omap_mmu_exmap(&dsp_mmu, dspadr_actual, padr, fbsz,
297 printk(KERN_ERR "omapdsp: exmap failure.\n");
301 if ((padr != padr_sys) || (fbsz != fbsz_sys)) {
303 " !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"
304 " !! screen base address or size is not aligned in 4kB: !!\n"
305 " !! actual screen adr = %08lx, size = %08lx !!\n"
306 " !! exporting adr = %08lx, size = %08lx !!\n"
307 " !! Make sure that the framebuffer is allocated with 4kB-order! !!\n"
308 " !! Otherwise DSP can corrupt the kernel memory. !!\n"
309 " !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n",
310 padr_sys, fbsz_sys, padr, fbsz);
313 /* increase the DMA priority */
314 set_emiff_dma_prio(15);
316 #ifdef CONFIG_FB_OMAP_LCDC_EXTERNAL
317 omapfb_nb = kzalloc(sizeof(struct omapfb_notifier_block), GFP_KERNEL);
318 if (omapfb_nb == NULL) {
320 "omapdsp: failed to allocate memory for omapfb_nb!\n");
321 omap_mmu_exunmap(&dsp_mmu, (unsigned long)dspadr);
325 status = omapfb_register_client(omapfb_nb, omapfb_notifier_cb, NULL);
327 pr_info("omapfb_register_client(): failure(%d)\n", status);
333 void mbox_fbctl_upd(void) { }
336 /* dsp/mem fops: backward compatibility */
337 static ssize_t dsp_mem_read(struct file *file, char __user *buf, size_t count,
340 struct bin_attribute attr;
342 return __omap_mmu_mem_read(&dsp_mmu, &attr,
343 (char __user *)buf, *ppos, count);
346 static ssize_t dsp_mem_write(struct file *file, const char __user *buf,
347 size_t count, loff_t *ppos)
349 struct bin_attribute attr;
351 return __omap_mmu_mem_write(&dsp_mmu, &attr,
352 (char __user *)buf, *ppos, count);
355 static int dsp_mem_ioctl(struct inode *inode, struct file *file,
356 unsigned int cmd, unsigned long arg)
358 struct omap_dsp_mapinfo mapinfo;
362 case MEM_IOCTL_MMUINIT:
363 if (dsp_mmu.exmap_tbl)
364 omap_mmu_unregister(&dsp_mmu);
366 return omap_mmu_register(&dsp_mmu);
368 case MEM_IOCTL_EXMAP:
369 if (copy_from_user(&mapinfo, (void __user *)arg,
372 return omap_mmu_exmap(&dsp_mmu, mapinfo.dspadr,
373 0, mapinfo.size, EXMAP_TYPE_MEM);
375 case MEM_IOCTL_EXUNMAP:
376 return omap_mmu_exunmap(&dsp_mmu, (unsigned long)arg);
378 case MEM_IOCTL_EXMAP_FLUSH:
379 omap_mmu_exmap_flush(&dsp_mmu);
381 #ifdef CONFIG_OMAP_DSP_FBEXPORT
382 case MEM_IOCTL_FBEXPORT:
386 if (copy_from_user(&dspadr, (void __user *)arg,
389 ret = dsp_fbexport(&dspadr);
390 if (copy_to_user((void __user *)arg, &dspadr,
396 case MEM_IOCTL_MMUITACK:
397 return dsp_mmu_itack();
399 case MEM_IOCTL_KMEM_RESERVE:
401 if (copy_from_user(&size, (void __user *)arg,
404 return omap_mmu_kmem_reserve(&dsp_mmu, size);
407 case MEM_IOCTL_KMEM_RELEASE:
408 omap_mmu_kmem_release();
416 struct file_operations dsp_mem_fops = {
417 .owner = THIS_MODULE,
418 .read = dsp_mem_read,
419 .write = dsp_mem_write,
420 .ioctl = dsp_mem_ioctl,
423 void dsp_mem_start(void)
425 dsp_register_mem_cb(intmem_enable, intmem_disable);
428 void dsp_mem_stop(void)
430 memset(&mem_sync, 0, sizeof(struct mem_sync_struct));
431 dsp_unregister_mem_cb();
434 static void dsp_mmu_irq_work(struct work_struct *work)
436 struct omap_mmu *mmu = container_of(work, struct omap_mmu, irq_work);
438 if (dsp_cfgstat_get_stat() == CFGSTAT_READY) {
439 dsp_err_set(ERRCODE_MMU, mmu->fault_address);
443 pr_info("Resetting DSP...\n");
444 dsp_cpustat_request(CPUSTAT_RESET);
445 omap_mmu_enable(mmu, 0);
449 * later half of dsp memory initialization
451 int dsp_mem_late_init(void)
457 INIT_WORK(&dsp_mmu.irq_work, dsp_mmu_irq_work);
458 ret = omap_mmu_register(&dsp_mmu);
460 dsp_reset_idle_boot_base();
463 omap_dsp->mmu = &dsp_mmu;
468 int __init dsp_mem_init(void)
470 #ifdef CONFIG_ARCH_OMAP2
471 dsp_mmu.clk = dsp_fck_handle;
472 dsp_mmu.memclk = dsp_ick_handle;
473 #elif defined(CONFIG_ARCH_OMAP1)
474 dsp_mmu.clk = dsp_ck_handle;
475 dsp_mmu.memclk = api_ck_handle;
480 void dsp_mem_exit(void)
482 dsp_reset_idle_boot_base();
483 omap_mmu_unregister(&dsp_mmu);