2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
9 Shamelessly ripped from the w83627hf driver
10 Copyright (C) 2003 Mark Studebaker
12 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
13 in testing and debugging this driver.
15 This driver also supports the W83627EHG, which is the lead-free
16 version of the W83627EHF.
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 Supports the following chips:
35 Chip #vin #fan #pwm #temp chip IDs man ID
36 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
38 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/jiffies.h>
45 #include <linux/platform_device.h>
46 #include <linux/hwmon.h>
47 #include <linux/hwmon-sysfs.h>
48 #include <linux/err.h>
49 #include <linux/mutex.h>
53 enum kinds { w83627ehf, w83627dhg };
55 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
56 static const char * w83627ehf_device_names[] = {
61 #define DRVNAME "w83627ehf"
64 * Super-I/O constants and functions
67 #define W83627EHF_LD_HWM 0x0b
69 #define SIO_REG_LDSEL 0x07 /* Logical device select */
70 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
71 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
72 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
74 #define SIO_W83627EHF_ID 0x8850
75 #define SIO_W83627EHG_ID 0x8860
76 #define SIO_W83627DHG_ID 0xa020
77 #define SIO_ID_MASK 0xFFF0
80 superio_outb(int ioreg, int reg, int val)
87 superio_inb(int ioreg, int reg)
90 return inb(ioreg + 1);
94 superio_select(int ioreg, int ld)
96 outb(SIO_REG_LDSEL, ioreg);
101 superio_enter(int ioreg)
108 superio_exit(int ioreg)
111 outb(0x02, ioreg + 1);
118 #define IOREGION_ALIGNMENT ~7
119 #define IOREGION_OFFSET 5
120 #define IOREGION_LENGTH 2
121 #define ADDR_REG_OFFSET 0
122 #define DATA_REG_OFFSET 1
124 #define W83627EHF_REG_BANK 0x4E
125 #define W83627EHF_REG_CONFIG 0x40
127 /* Not currently used:
128 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
129 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
130 * REG_MAN_ID is at port 0x4f
131 * REG_CHIP_ID is at port 0x58 */
133 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
134 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
136 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
137 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
138 (0x554 + (((nr) - 7) * 2)))
139 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
140 (0x555 + (((nr) - 7) * 2)))
141 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
144 #define W83627EHF_REG_TEMP1 0x27
145 #define W83627EHF_REG_TEMP1_HYST 0x3a
146 #define W83627EHF_REG_TEMP1_OVER 0x39
147 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
148 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
149 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
150 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
152 /* Fan clock dividers are spread over the following five registers */
153 #define W83627EHF_REG_FANDIV1 0x47
154 #define W83627EHF_REG_FANDIV2 0x4B
155 #define W83627EHF_REG_VBAT 0x5D
156 #define W83627EHF_REG_DIODE 0x59
157 #define W83627EHF_REG_SMI_OVT 0x4C
159 #define W83627EHF_REG_ALARM1 0x459
160 #define W83627EHF_REG_ALARM2 0x45A
161 #define W83627EHF_REG_ALARM3 0x45B
163 /* SmartFan registers */
164 /* DC or PWM output fan configuration */
165 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
166 0x04, /* SYS FAN0 output mode and PWM mode */
167 0x04, /* CPU FAN0 output mode and PWM mode */
168 0x12, /* AUX FAN mode */
169 0x62, /* CPU fan1 mode */
172 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
173 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
175 /* FAN Duty Cycle, be used to control */
176 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
177 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
178 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
181 /* Advanced Fan control, some values are common for all fans */
182 static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
183 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };
189 /* 1 is PWM mode, output in ms */
190 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
192 return mode ? 100 * reg : 400 * reg;
195 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
197 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
198 (msec + 200) / 400), 1, 255);
201 static inline unsigned int
202 fan_from_reg(u8 reg, unsigned int div)
204 if (reg == 0 || reg == 255)
206 return 1350000U / (reg * div);
209 static inline unsigned int
216 temp1_from_reg(s8 reg)
222 temp1_to_reg(int temp, int min, int max)
229 return (temp - 500) / 1000;
230 return (temp + 500) / 1000;
233 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
235 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
237 static inline long in_from_reg(u8 reg, u8 nr)
239 return reg * scale_in[nr];
242 static inline u8 in_to_reg(u32 val, u8 nr)
244 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
248 * Data structures and manipulation thereof
251 struct w83627ehf_data {
252 int addr; /* IO base of hw monitor block */
255 struct class_device *class_dev;
258 struct mutex update_lock;
259 char valid; /* !=0 if following fields are valid */
260 unsigned long last_updated; /* In jiffies */
262 /* Register values */
263 u8 in_num; /* number of in inputs we have */
264 u8 in[10]; /* Register value */
265 u8 in_max[10]; /* Register value */
266 u8 in_min[10]; /* Register value */
270 u8 has_fan; /* some fan inputs can be disabled */
276 s16 temp_max_hyst[2];
279 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
280 u8 pwm_enable[4]; /* 1->manual
281 2->thermal cruise (also called SmartFan I) */
286 u8 fan_min_output[4]; /* minimum fan speed */
290 struct w83627ehf_sio_data {
295 static inline int is_word_sized(u16 reg)
297 return (((reg & 0xff00) == 0x100
298 || (reg & 0xff00) == 0x200)
299 && ((reg & 0x00ff) == 0x50
300 || (reg & 0x00ff) == 0x53
301 || (reg & 0x00ff) == 0x55));
304 /* We assume that the default bank is 0, thus the following two functions do
305 nothing for registers which live in bank 0. For others, they respectively
306 set the bank register to the correct value (before the register is
307 accessed), and back to 0 (afterwards). */
308 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
311 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
312 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
316 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
319 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
320 outb_p(0, data->addr + DATA_REG_OFFSET);
324 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
326 int res, word_sized = is_word_sized(reg);
328 mutex_lock(&data->lock);
330 w83627ehf_set_bank(data, reg);
331 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
332 res = inb_p(data->addr + DATA_REG_OFFSET);
334 outb_p((reg & 0xff) + 1,
335 data->addr + ADDR_REG_OFFSET);
336 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
338 w83627ehf_reset_bank(data, reg);
340 mutex_unlock(&data->lock);
345 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
347 int word_sized = is_word_sized(reg);
349 mutex_lock(&data->lock);
351 w83627ehf_set_bank(data, reg);
352 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
354 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
355 outb_p((reg & 0xff) + 1,
356 data->addr + ADDR_REG_OFFSET);
358 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
359 w83627ehf_reset_bank(data, reg);
361 mutex_unlock(&data->lock);
365 /* This function assumes that the caller holds data->update_lock */
366 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
372 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
373 | ((data->fan_div[0] & 0x03) << 4);
374 /* fan5 input control bit is write only, compute the value */
375 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
376 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
377 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
378 | ((data->fan_div[0] & 0x04) << 3);
379 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
382 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
383 | ((data->fan_div[1] & 0x03) << 6);
384 /* fan5 input control bit is write only, compute the value */
385 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
386 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
387 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
388 | ((data->fan_div[1] & 0x04) << 4);
389 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
392 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
393 | ((data->fan_div[2] & 0x03) << 6);
394 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
395 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
396 | ((data->fan_div[2] & 0x04) << 5);
397 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
400 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
401 | (data->fan_div[3] & 0x03);
402 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
403 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
404 | ((data->fan_div[3] & 0x04) << 5);
405 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
408 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
409 | ((data->fan_div[4] & 0x03) << 2)
410 | ((data->fan_div[4] & 0x04) << 5);
411 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
416 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
418 struct w83627ehf_data *data = dev_get_drvdata(dev);
419 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
422 mutex_lock(&data->update_lock);
424 if (time_after(jiffies, data->last_updated + HZ)
426 /* Fan clock dividers */
427 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
428 data->fan_div[0] = (i >> 4) & 0x03;
429 data->fan_div[1] = (i >> 6) & 0x03;
430 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
431 data->fan_div[2] = (i >> 6) & 0x03;
432 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
433 data->fan_div[0] |= (i >> 3) & 0x04;
434 data->fan_div[1] |= (i >> 4) & 0x04;
435 data->fan_div[2] |= (i >> 5) & 0x04;
436 if (data->has_fan & ((1 << 3) | (1 << 4))) {
437 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
438 data->fan_div[3] = i & 0x03;
439 data->fan_div[4] = ((i >> 2) & 0x03)
442 if (data->has_fan & (1 << 3)) {
443 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
444 data->fan_div[3] |= (i >> 5) & 0x04;
447 /* Measured voltages and limits */
448 for (i = 0; i < data->in_num; i++) {
449 data->in[i] = w83627ehf_read_value(data,
450 W83627EHF_REG_IN(i));
451 data->in_min[i] = w83627ehf_read_value(data,
452 W83627EHF_REG_IN_MIN(i));
453 data->in_max[i] = w83627ehf_read_value(data,
454 W83627EHF_REG_IN_MAX(i));
457 /* Measured fan speeds and limits */
458 for (i = 0; i < 5; i++) {
459 if (!(data->has_fan & (1 << i)))
462 data->fan[i] = w83627ehf_read_value(data,
463 W83627EHF_REG_FAN[i]);
464 data->fan_min[i] = w83627ehf_read_value(data,
465 W83627EHF_REG_FAN_MIN[i]);
467 /* If we failed to measure the fan speed and clock
468 divider can be increased, let's try that for next
470 if (data->fan[i] == 0xff
471 && data->fan_div[i] < 0x07) {
472 dev_dbg(dev, "Increasing fan%d "
473 "clock divider from %u to %u\n",
474 i + 1, div_from_reg(data->fan_div[i]),
475 div_from_reg(data->fan_div[i] + 1));
477 w83627ehf_write_fan_div(data, i);
478 /* Preserve min limit if possible */
479 if (data->fan_min[i] >= 2
480 && data->fan_min[i] != 255)
481 w83627ehf_write_value(data,
482 W83627EHF_REG_FAN_MIN[i],
483 (data->fan_min[i] /= 2));
487 for (i = 0; i < 4; i++) {
488 /* pwmcfg, tolarance mapped for i=0, i=1 to same reg */
490 pwmcfg = w83627ehf_read_value(data,
491 W83627EHF_REG_PWM_ENABLE[i]);
492 tolerance = w83627ehf_read_value(data,
493 W83627EHF_REG_TOLERANCE[i]);
496 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
498 data->pwm_enable[i] =
499 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
501 data->pwm[i] = w83627ehf_read_value(data,
502 W83627EHF_REG_PWM[i]);
503 data->fan_min_output[i] = w83627ehf_read_value(data,
504 W83627EHF_REG_FAN_MIN_OUTPUT[i]);
505 data->fan_stop_time[i] = w83627ehf_read_value(data,
506 W83627EHF_REG_FAN_STOP_TIME[i]);
507 data->target_temp[i] =
508 w83627ehf_read_value(data,
509 W83627EHF_REG_TARGET[i]) &
510 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
511 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
515 /* Measured temperatures and limits */
516 data->temp1 = w83627ehf_read_value(data,
517 W83627EHF_REG_TEMP1);
518 data->temp1_max = w83627ehf_read_value(data,
519 W83627EHF_REG_TEMP1_OVER);
520 data->temp1_max_hyst = w83627ehf_read_value(data,
521 W83627EHF_REG_TEMP1_HYST);
522 for (i = 0; i < 2; i++) {
523 data->temp[i] = w83627ehf_read_value(data,
524 W83627EHF_REG_TEMP[i]);
525 data->temp_max[i] = w83627ehf_read_value(data,
526 W83627EHF_REG_TEMP_OVER[i]);
527 data->temp_max_hyst[i] = w83627ehf_read_value(data,
528 W83627EHF_REG_TEMP_HYST[i]);
531 data->alarms = w83627ehf_read_value(data,
532 W83627EHF_REG_ALARM1) |
533 (w83627ehf_read_value(data,
534 W83627EHF_REG_ALARM2) << 8) |
535 (w83627ehf_read_value(data,
536 W83627EHF_REG_ALARM3) << 16);
538 data->last_updated = jiffies;
542 mutex_unlock(&data->update_lock);
547 * Sysfs callback functions
549 #define show_in_reg(reg) \
551 show_##reg(struct device *dev, struct device_attribute *attr, \
554 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
555 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
556 int nr = sensor_attr->index; \
557 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
563 #define store_in_reg(REG, reg) \
565 store_in_##reg (struct device *dev, struct device_attribute *attr, \
566 const char *buf, size_t count) \
568 struct w83627ehf_data *data = dev_get_drvdata(dev); \
569 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
570 int nr = sensor_attr->index; \
571 u32 val = simple_strtoul(buf, NULL, 10); \
573 mutex_lock(&data->update_lock); \
574 data->in_##reg[nr] = in_to_reg(val, nr); \
575 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
576 data->in_##reg[nr]); \
577 mutex_unlock(&data->update_lock); \
581 store_in_reg(MIN, min)
582 store_in_reg(MAX, max)
584 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
586 struct w83627ehf_data *data = w83627ehf_update_device(dev);
587 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
588 int nr = sensor_attr->index;
589 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
592 static struct sensor_device_attribute sda_in_input[] = {
593 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
594 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
595 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
596 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
597 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
598 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
599 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
600 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
601 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
602 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
605 static struct sensor_device_attribute sda_in_alarm[] = {
606 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
607 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
608 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
609 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
610 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
611 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
612 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
613 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
614 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
615 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
618 static struct sensor_device_attribute sda_in_min[] = {
619 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
620 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
621 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
622 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
623 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
624 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
625 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
626 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
627 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
628 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
631 static struct sensor_device_attribute sda_in_max[] = {
632 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
633 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
634 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
635 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
636 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
637 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
638 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
639 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
640 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
641 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
644 #define show_fan_reg(reg) \
646 show_##reg(struct device *dev, struct device_attribute *attr, \
649 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
650 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
651 int nr = sensor_attr->index; \
652 return sprintf(buf, "%d\n", \
653 fan_from_reg(data->reg[nr], \
654 div_from_reg(data->fan_div[nr]))); \
657 show_fan_reg(fan_min);
660 show_fan_div(struct device *dev, struct device_attribute *attr,
663 struct w83627ehf_data *data = w83627ehf_update_device(dev);
664 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
665 int nr = sensor_attr->index;
666 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
670 store_fan_min(struct device *dev, struct device_attribute *attr,
671 const char *buf, size_t count)
673 struct w83627ehf_data *data = dev_get_drvdata(dev);
674 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
675 int nr = sensor_attr->index;
676 unsigned int val = simple_strtoul(buf, NULL, 10);
680 mutex_lock(&data->update_lock);
682 /* No min limit, alarm disabled */
683 data->fan_min[nr] = 255;
684 new_div = data->fan_div[nr]; /* No change */
685 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
686 } else if ((reg = 1350000U / val) >= 128 * 255) {
687 /* Speed below this value cannot possibly be represented,
688 even with the highest divider (128) */
689 data->fan_min[nr] = 254;
690 new_div = 7; /* 128 == (1 << 7) */
691 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
692 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
694 /* Speed above this value cannot possibly be represented,
695 even with the lowest divider (1) */
696 data->fan_min[nr] = 1;
697 new_div = 0; /* 1 == (1 << 0) */
698 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
699 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
701 /* Automatically pick the best divider, i.e. the one such
702 that the min limit will correspond to a register value
703 in the 96..192 range */
705 while (reg > 192 && new_div < 7) {
709 data->fan_min[nr] = reg;
712 /* Write both the fan clock divider (if it changed) and the new
713 fan min (unconditionally) */
714 if (new_div != data->fan_div[nr]) {
715 /* Preserve the fan speed reading */
716 if (data->fan[nr] != 0xff) {
717 if (new_div > data->fan_div[nr])
718 data->fan[nr] >>= new_div - data->fan_div[nr];
719 else if (data->fan[nr] & 0x80)
720 data->fan[nr] = 0xff;
722 data->fan[nr] <<= data->fan_div[nr] - new_div;
725 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
726 nr + 1, div_from_reg(data->fan_div[nr]),
727 div_from_reg(new_div));
728 data->fan_div[nr] = new_div;
729 w83627ehf_write_fan_div(data, nr);
731 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
733 mutex_unlock(&data->update_lock);
738 static struct sensor_device_attribute sda_fan_input[] = {
739 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
740 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
741 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
742 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
743 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
746 static struct sensor_device_attribute sda_fan_alarm[] = {
747 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
748 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
749 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
750 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
751 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
754 static struct sensor_device_attribute sda_fan_min[] = {
755 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
757 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
759 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
761 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
763 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
767 static struct sensor_device_attribute sda_fan_div[] = {
768 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
769 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
770 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
771 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
772 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
775 #define show_temp1_reg(reg) \
777 show_##reg(struct device *dev, struct device_attribute *attr, \
780 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
781 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
783 show_temp1_reg(temp1);
784 show_temp1_reg(temp1_max);
785 show_temp1_reg(temp1_max_hyst);
787 #define store_temp1_reg(REG, reg) \
789 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
790 const char *buf, size_t count) \
792 struct w83627ehf_data *data = dev_get_drvdata(dev); \
793 u32 val = simple_strtoul(buf, NULL, 10); \
795 mutex_lock(&data->update_lock); \
796 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
797 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
798 data->temp1_##reg); \
799 mutex_unlock(&data->update_lock); \
802 store_temp1_reg(OVER, max);
803 store_temp1_reg(HYST, max_hyst);
805 #define show_temp_reg(reg) \
807 show_##reg(struct device *dev, struct device_attribute *attr, \
810 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
811 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
812 int nr = sensor_attr->index; \
813 return sprintf(buf, "%d\n", \
814 LM75_TEMP_FROM_REG(data->reg[nr])); \
817 show_temp_reg(temp_max);
818 show_temp_reg(temp_max_hyst);
820 #define store_temp_reg(REG, reg) \
822 store_##reg(struct device *dev, struct device_attribute *attr, \
823 const char *buf, size_t count) \
825 struct w83627ehf_data *data = dev_get_drvdata(dev); \
826 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
827 int nr = sensor_attr->index; \
828 u32 val = simple_strtoul(buf, NULL, 10); \
830 mutex_lock(&data->update_lock); \
831 data->reg[nr] = LM75_TEMP_TO_REG(val); \
832 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
834 mutex_unlock(&data->update_lock); \
837 store_temp_reg(OVER, temp_max);
838 store_temp_reg(HYST, temp_max_hyst);
840 static struct sensor_device_attribute sda_temp[] = {
841 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
842 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
843 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
844 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
846 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
848 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
850 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
851 store_temp1_max_hyst, 0),
852 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
853 store_temp_max_hyst, 0),
854 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
855 store_temp_max_hyst, 1),
856 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
857 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
858 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
861 #define show_pwm_reg(reg) \
862 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
865 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
866 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
867 int nr = sensor_attr->index; \
868 return sprintf(buf, "%d\n", data->reg[nr]); \
871 show_pwm_reg(pwm_mode)
872 show_pwm_reg(pwm_enable)
876 store_pwm_mode(struct device *dev, struct device_attribute *attr,
877 const char *buf, size_t count)
879 struct w83627ehf_data *data = dev_get_drvdata(dev);
880 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
881 int nr = sensor_attr->index;
882 u32 val = simple_strtoul(buf, NULL, 10);
887 mutex_lock(&data->update_lock);
888 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
889 data->pwm_mode[nr] = val;
890 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
892 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
893 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
894 mutex_unlock(&data->update_lock);
899 store_pwm(struct device *dev, struct device_attribute *attr,
900 const char *buf, size_t count)
902 struct w83627ehf_data *data = dev_get_drvdata(dev);
903 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
904 int nr = sensor_attr->index;
905 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
907 mutex_lock(&data->update_lock);
909 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
910 mutex_unlock(&data->update_lock);
915 store_pwm_enable(struct device *dev, struct device_attribute *attr,
916 const char *buf, size_t count)
918 struct w83627ehf_data *data = dev_get_drvdata(dev);
919 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
920 int nr = sensor_attr->index;
921 u32 val = simple_strtoul(buf, NULL, 10);
924 if (!val || (val > 2)) /* only modes 1 and 2 are supported */
926 mutex_lock(&data->update_lock);
927 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
928 data->pwm_enable[nr] = val;
929 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
930 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
931 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
932 mutex_unlock(&data->update_lock);
937 #define show_tol_temp(reg) \
938 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
941 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
942 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
943 int nr = sensor_attr->index; \
944 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
947 show_tol_temp(tolerance)
948 show_tol_temp(target_temp)
951 store_target_temp(struct device *dev, struct device_attribute *attr,
952 const char *buf, size_t count)
954 struct w83627ehf_data *data = dev_get_drvdata(dev);
955 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
956 int nr = sensor_attr->index;
957 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
959 mutex_lock(&data->update_lock);
960 data->target_temp[nr] = val;
961 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
962 mutex_unlock(&data->update_lock);
967 store_tolerance(struct device *dev, struct device_attribute *attr,
968 const char *buf, size_t count)
970 struct w83627ehf_data *data = dev_get_drvdata(dev);
971 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
972 int nr = sensor_attr->index;
974 /* Limit the temp to 0C - 15C */
975 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
977 mutex_lock(&data->update_lock);
978 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
979 data->tolerance[nr] = val;
981 reg = (reg & 0x0f) | (val << 4);
983 reg = (reg & 0xf0) | val;
984 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
985 mutex_unlock(&data->update_lock);
989 static struct sensor_device_attribute sda_pwm[] = {
990 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
991 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
992 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
993 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
996 static struct sensor_device_attribute sda_pwm_mode[] = {
997 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
999 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1001 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1003 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1007 static struct sensor_device_attribute sda_pwm_enable[] = {
1008 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1009 store_pwm_enable, 0),
1010 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1011 store_pwm_enable, 1),
1012 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1013 store_pwm_enable, 2),
1014 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1015 store_pwm_enable, 3),
1018 static struct sensor_device_attribute sda_target_temp[] = {
1019 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1020 store_target_temp, 0),
1021 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1022 store_target_temp, 1),
1023 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1024 store_target_temp, 2),
1025 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1026 store_target_temp, 3),
1029 static struct sensor_device_attribute sda_tolerance[] = {
1030 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1031 store_tolerance, 0),
1032 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1033 store_tolerance, 1),
1034 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1035 store_tolerance, 2),
1036 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1037 store_tolerance, 3),
1040 /* Smart Fan registers */
1042 #define fan_functions(reg, REG) \
1043 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1046 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1047 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1048 int nr = sensor_attr->index; \
1049 return sprintf(buf, "%d\n", data->reg[nr]); \
1052 store_##reg(struct device *dev, struct device_attribute *attr, \
1053 const char *buf, size_t count) \
1055 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1056 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1057 int nr = sensor_attr->index; \
1058 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1059 mutex_lock(&data->update_lock); \
1060 data->reg[nr] = val; \
1061 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1062 mutex_unlock(&data->update_lock); \
1066 fan_functions(fan_min_output, FAN_MIN_OUTPUT)
1068 #define fan_time_functions(reg, REG) \
1069 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1072 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1073 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1074 int nr = sensor_attr->index; \
1075 return sprintf(buf, "%d\n", \
1076 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1080 store_##reg(struct device *dev, struct device_attribute *attr, \
1081 const char *buf, size_t count) \
1083 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1084 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1085 int nr = sensor_attr->index; \
1086 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1087 data->pwm_mode[nr]); \
1088 mutex_lock(&data->update_lock); \
1089 data->reg[nr] = val; \
1090 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1091 mutex_unlock(&data->update_lock); \
1095 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1097 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1100 struct w83627ehf_data *data = dev_get_drvdata(dev);
1102 return sprintf(buf, "%s\n", data->name);
1104 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1106 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1107 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1108 store_fan_stop_time, 3),
1109 SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1110 store_fan_min_output, 3),
1113 static struct sensor_device_attribute sda_sf3_arrays[] = {
1114 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1115 store_fan_stop_time, 0),
1116 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1117 store_fan_stop_time, 1),
1118 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1119 store_fan_stop_time, 2),
1120 SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1121 store_fan_min_output, 0),
1122 SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1123 store_fan_min_output, 1),
1124 SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1125 store_fan_min_output, 2),
1129 * Driver and device management
1132 static void w83627ehf_device_remove_files(struct device *dev)
1134 /* some entries in the following arrays may not have been used in
1135 * device_create_file(), but device_remove_file() will ignore them */
1137 struct w83627ehf_data *data = dev_get_drvdata(dev);
1139 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1140 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1141 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1142 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1143 for (i = 0; i < data->in_num; i++) {
1144 device_remove_file(dev, &sda_in_input[i].dev_attr);
1145 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1146 device_remove_file(dev, &sda_in_min[i].dev_attr);
1147 device_remove_file(dev, &sda_in_max[i].dev_attr);
1149 for (i = 0; i < 5; i++) {
1150 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1151 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1152 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1153 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1155 for (i = 0; i < 4; i++) {
1156 device_remove_file(dev, &sda_pwm[i].dev_attr);
1157 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1158 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1159 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1160 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1162 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1163 device_remove_file(dev, &sda_temp[i].dev_attr);
1165 device_remove_file(dev, &dev_attr_name);
1168 /* Get the monitoring functions started */
1169 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1174 /* Start monitoring is needed */
1175 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1177 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1180 /* Enable temp2 and temp3 if needed */
1181 for (i = 0; i < 2; i++) {
1182 tmp = w83627ehf_read_value(data,
1183 W83627EHF_REG_TEMP_CONFIG[i]);
1185 w83627ehf_write_value(data,
1186 W83627EHF_REG_TEMP_CONFIG[i],
1191 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1193 struct device *dev = &pdev->dev;
1194 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1195 struct w83627ehf_data *data;
1196 struct resource *res;
1197 u8 fan4pin, fan5pin;
1200 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1201 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1203 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1204 (unsigned long)res->start,
1205 (unsigned long)res->start + IOREGION_LENGTH - 1);
1209 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1214 data->addr = res->start;
1215 mutex_init(&data->lock);
1216 mutex_init(&data->update_lock);
1217 data->name = w83627ehf_device_names[sio_data->kind];
1218 platform_set_drvdata(pdev, data);
1220 /* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
1221 data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
1223 /* Initialize the chip */
1224 w83627ehf_init_device(data);
1226 /* A few vars need to be filled upon startup */
1227 for (i = 0; i < 5; i++)
1228 data->fan_min[i] = w83627ehf_read_value(data,
1229 W83627EHF_REG_FAN_MIN[i]);
1231 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1233 superio_enter(sio_data->sioreg);
1234 fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
1235 fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
1236 superio_exit(sio_data->sioreg);
1238 /* It looks like fan4 and fan5 pins can be alternatively used
1239 as fan on/off switches, but fan5 control is write only :/
1240 We assume that if the serial interface is disabled, designers
1241 connected fan5 as input unless they are emitting log 1, which
1242 is not the default. */
1244 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1245 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1246 if ((i & (1 << 2)) && (!fan4pin))
1247 data->has_fan |= (1 << 3);
1248 if (!(i & (1 << 1)) && (!fan5pin))
1249 data->has_fan |= (1 << 4);
1251 /* Register sysfs hooks */
1252 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1253 if ((err = device_create_file(dev,
1254 &sda_sf3_arrays[i].dev_attr)))
1257 /* if fan4 is enabled create the sf3 files for it */
1258 if (data->has_fan & (1 << 3))
1259 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1260 if ((err = device_create_file(dev,
1261 &sda_sf3_arrays_fan4[i].dev_attr)))
1265 for (i = 0; i < data->in_num; i++)
1266 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1267 || (err = device_create_file(dev,
1268 &sda_in_alarm[i].dev_attr))
1269 || (err = device_create_file(dev,
1270 &sda_in_min[i].dev_attr))
1271 || (err = device_create_file(dev,
1272 &sda_in_max[i].dev_attr)))
1275 for (i = 0; i < 5; i++) {
1276 if (data->has_fan & (1 << i)) {
1277 if ((err = device_create_file(dev,
1278 &sda_fan_input[i].dev_attr))
1279 || (err = device_create_file(dev,
1280 &sda_fan_alarm[i].dev_attr))
1281 || (err = device_create_file(dev,
1282 &sda_fan_div[i].dev_attr))
1283 || (err = device_create_file(dev,
1284 &sda_fan_min[i].dev_attr)))
1286 if (i < 4 && /* w83627ehf only has 4 pwm */
1287 ((err = device_create_file(dev,
1288 &sda_pwm[i].dev_attr))
1289 || (err = device_create_file(dev,
1290 &sda_pwm_mode[i].dev_attr))
1291 || (err = device_create_file(dev,
1292 &sda_pwm_enable[i].dev_attr))
1293 || (err = device_create_file(dev,
1294 &sda_target_temp[i].dev_attr))
1295 || (err = device_create_file(dev,
1296 &sda_tolerance[i].dev_attr))))
1301 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1302 if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
1305 err = device_create_file(dev, &dev_attr_name);
1309 data->class_dev = hwmon_device_register(dev);
1310 if (IS_ERR(data->class_dev)) {
1311 err = PTR_ERR(data->class_dev);
1318 w83627ehf_device_remove_files(dev);
1320 platform_set_drvdata(pdev, NULL);
1322 release_region(res->start, IOREGION_LENGTH);
1327 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1329 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1331 hwmon_device_unregister(data->class_dev);
1332 w83627ehf_device_remove_files(&pdev->dev);
1333 release_region(data->addr, IOREGION_LENGTH);
1334 platform_set_drvdata(pdev, NULL);
1340 static struct platform_driver w83627ehf_driver = {
1342 .owner = THIS_MODULE,
1345 .probe = w83627ehf_probe,
1346 .remove = __devexit_p(w83627ehf_remove),
1349 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1350 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1351 struct w83627ehf_sio_data *sio_data)
1353 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1354 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1355 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1358 const char *sio_name;
1360 superio_enter(sioaddr);
1362 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1363 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1364 switch (val & SIO_ID_MASK) {
1365 case SIO_W83627EHF_ID:
1366 sio_data->kind = w83627ehf;
1367 sio_name = sio_name_W83627EHF;
1369 case SIO_W83627EHG_ID:
1370 sio_data->kind = w83627ehf;
1371 sio_name = sio_name_W83627EHG;
1373 case SIO_W83627DHG_ID:
1374 sio_data->kind = w83627dhg;
1375 sio_name = sio_name_W83627DHG;
1378 pr_info(DRVNAME ": unsupported chip ID: 0x%04x\n",
1380 superio_exit(sioaddr);
1384 /* We have a known chip, find the HWM I/O address */
1385 superio_select(sioaddr, W83627EHF_LD_HWM);
1386 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1387 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1388 *addr = val & IOREGION_ALIGNMENT;
1390 superio_exit(sioaddr);
1394 /* Activate logical device if needed */
1395 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1397 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1399 superio_exit(sioaddr);
1400 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1401 sio_data->sioreg = sioaddr;
1406 /* when Super-I/O functions move to a separate file, the Super-I/O
1407 * bus will manage the lifetime of the device and this module will only keep
1408 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1409 * must keep track of the device */
1410 static struct platform_device *pdev;
1412 static int __init sensors_w83627ehf_init(void)
1415 unsigned short address;
1416 struct resource res;
1417 struct w83627ehf_sio_data sio_data;
1419 /* initialize sio_data->kind and sio_data->sioreg.
1421 * when Super-I/O functions move to a separate file, the Super-I/O
1422 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1423 * w83627ehf hardware monitor, and call probe() */
1424 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1425 w83627ehf_find(0x4e, &address, &sio_data))
1428 err = platform_driver_register(&w83627ehf_driver);
1432 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1434 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1435 goto exit_unregister;
1438 err = platform_device_add_data(pdev, &sio_data,
1439 sizeof(struct w83627ehf_sio_data));
1441 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1442 goto exit_device_put;
1445 memset(&res, 0, sizeof(res));
1447 res.start = address + IOREGION_OFFSET;
1448 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1449 res.flags = IORESOURCE_IO;
1450 err = platform_device_add_resources(pdev, &res, 1);
1452 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1454 goto exit_device_put;
1457 /* platform_device_add calls probe() */
1458 err = platform_device_add(pdev);
1460 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1462 goto exit_device_put;
1468 platform_device_put(pdev);
1470 platform_driver_unregister(&w83627ehf_driver);
1475 static void __exit sensors_w83627ehf_exit(void)
1477 platform_device_unregister(pdev);
1478 platform_driver_unregister(&w83627ehf_driver);
1481 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1482 MODULE_DESCRIPTION("W83627EHF driver");
1483 MODULE_LICENSE("GPL");
1485 module_init(sensors_w83627ehf_init);
1486 module_exit(sensors_w83627ehf_exit);