2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
9 Shamelessly ripped from the w83627hf driver
10 Copyright (C) 2003 Mark Studebaker
12 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
13 in testing and debugging this driver.
15 This driver also supports the W83627EHG, which is the lead-free
16 version of the W83627EHF.
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 Supports the following chips:
35 Chip #vin #fan #pwm #temp chip IDs man ID
36 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
38 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/jiffies.h>
45 #include <linux/platform_device.h>
46 #include <linux/hwmon.h>
47 #include <linux/hwmon-sysfs.h>
48 #include <linux/hwmon-vid.h>
49 #include <linux/err.h>
50 #include <linux/mutex.h>
54 enum kinds { w83627ehf, w83627dhg };
56 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
57 static const char * w83627ehf_device_names[] = {
62 #define DRVNAME "w83627ehf"
65 * Super-I/O constants and functions
68 #define W83627EHF_LD_HWM 0x0b
70 #define SIO_REG_LDSEL 0x07 /* Logical device select */
71 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
72 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
73 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
74 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
75 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
76 #define SIO_REG_VID_DATA 0xF1 /* VID data */
78 #define SIO_W83627EHF_ID 0x8850
79 #define SIO_W83627EHG_ID 0x8860
80 #define SIO_W83627DHG_ID 0xa020
81 #define SIO_ID_MASK 0xFFF0
84 superio_outb(int ioreg, int reg, int val)
91 superio_inb(int ioreg, int reg)
94 return inb(ioreg + 1);
98 superio_select(int ioreg, int ld)
100 outb(SIO_REG_LDSEL, ioreg);
105 superio_enter(int ioreg)
112 superio_exit(int ioreg)
115 outb(0x02, ioreg + 1);
122 #define IOREGION_ALIGNMENT ~7
123 #define IOREGION_OFFSET 5
124 #define IOREGION_LENGTH 2
125 #define ADDR_REG_OFFSET 0
126 #define DATA_REG_OFFSET 1
128 #define W83627EHF_REG_BANK 0x4E
129 #define W83627EHF_REG_CONFIG 0x40
131 /* Not currently used:
132 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
133 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
134 * REG_MAN_ID is at port 0x4f
135 * REG_CHIP_ID is at port 0x58 */
137 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
138 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
140 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
141 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
142 (0x554 + (((nr) - 7) * 2)))
143 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
144 (0x555 + (((nr) - 7) * 2)))
145 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
148 #define W83627EHF_REG_TEMP1 0x27
149 #define W83627EHF_REG_TEMP1_HYST 0x3a
150 #define W83627EHF_REG_TEMP1_OVER 0x39
151 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
152 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
153 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
154 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
156 /* Fan clock dividers are spread over the following five registers */
157 #define W83627EHF_REG_FANDIV1 0x47
158 #define W83627EHF_REG_FANDIV2 0x4B
159 #define W83627EHF_REG_VBAT 0x5D
160 #define W83627EHF_REG_DIODE 0x59
161 #define W83627EHF_REG_SMI_OVT 0x4C
163 #define W83627EHF_REG_ALARM1 0x459
164 #define W83627EHF_REG_ALARM2 0x45A
165 #define W83627EHF_REG_ALARM3 0x45B
167 /* SmartFan registers */
168 /* DC or PWM output fan configuration */
169 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
170 0x04, /* SYS FAN0 output mode and PWM mode */
171 0x04, /* CPU FAN0 output mode and PWM mode */
172 0x12, /* AUX FAN mode */
173 0x62, /* CPU fan1 mode */
176 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
177 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
179 /* FAN Duty Cycle, be used to control */
180 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
181 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
182 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
185 /* Advanced Fan control, some values are common for all fans */
186 static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
187 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };
193 /* 1 is PWM mode, output in ms */
194 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
196 return mode ? 100 * reg : 400 * reg;
199 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
201 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
202 (msec + 200) / 400), 1, 255);
205 static inline unsigned int
206 fan_from_reg(u8 reg, unsigned int div)
208 if (reg == 0 || reg == 255)
210 return 1350000U / (reg * div);
213 static inline unsigned int
220 temp1_from_reg(s8 reg)
226 temp1_to_reg(int temp, int min, int max)
233 return (temp - 500) / 1000;
234 return (temp + 500) / 1000;
237 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
239 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
241 static inline long in_from_reg(u8 reg, u8 nr)
243 return reg * scale_in[nr];
246 static inline u8 in_to_reg(u32 val, u8 nr)
248 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
252 * Data structures and manipulation thereof
255 struct w83627ehf_data {
256 int addr; /* IO base of hw monitor block */
259 struct class_device *class_dev;
262 struct mutex update_lock;
263 char valid; /* !=0 if following fields are valid */
264 unsigned long last_updated; /* In jiffies */
266 /* Register values */
267 u8 in_num; /* number of in inputs we have */
268 u8 in[10]; /* Register value */
269 u8 in_max[10]; /* Register value */
270 u8 in_min[10]; /* Register value */
274 u8 has_fan; /* some fan inputs can be disabled */
280 s16 temp_max_hyst[2];
283 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
284 u8 pwm_enable[4]; /* 1->manual
285 2->thermal cruise (also called SmartFan I) */
290 u8 fan_min_output[4]; /* minimum fan speed */
297 struct w83627ehf_sio_data {
302 static inline int is_word_sized(u16 reg)
304 return (((reg & 0xff00) == 0x100
305 || (reg & 0xff00) == 0x200)
306 && ((reg & 0x00ff) == 0x50
307 || (reg & 0x00ff) == 0x53
308 || (reg & 0x00ff) == 0x55));
311 /* We assume that the default bank is 0, thus the following two functions do
312 nothing for registers which live in bank 0. For others, they respectively
313 set the bank register to the correct value (before the register is
314 accessed), and back to 0 (afterwards). */
315 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
318 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
319 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
323 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
326 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
327 outb_p(0, data->addr + DATA_REG_OFFSET);
331 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
333 int res, word_sized = is_word_sized(reg);
335 mutex_lock(&data->lock);
337 w83627ehf_set_bank(data, reg);
338 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
339 res = inb_p(data->addr + DATA_REG_OFFSET);
341 outb_p((reg & 0xff) + 1,
342 data->addr + ADDR_REG_OFFSET);
343 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
345 w83627ehf_reset_bank(data, reg);
347 mutex_unlock(&data->lock);
352 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
354 int word_sized = is_word_sized(reg);
356 mutex_lock(&data->lock);
358 w83627ehf_set_bank(data, reg);
359 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
361 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
362 outb_p((reg & 0xff) + 1,
363 data->addr + ADDR_REG_OFFSET);
365 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
366 w83627ehf_reset_bank(data, reg);
368 mutex_unlock(&data->lock);
372 /* This function assumes that the caller holds data->update_lock */
373 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
379 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
380 | ((data->fan_div[0] & 0x03) << 4);
381 /* fan5 input control bit is write only, compute the value */
382 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
383 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
384 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
385 | ((data->fan_div[0] & 0x04) << 3);
386 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
389 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
390 | ((data->fan_div[1] & 0x03) << 6);
391 /* fan5 input control bit is write only, compute the value */
392 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
393 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
394 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
395 | ((data->fan_div[1] & 0x04) << 4);
396 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
399 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
400 | ((data->fan_div[2] & 0x03) << 6);
401 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
402 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
403 | ((data->fan_div[2] & 0x04) << 5);
404 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
407 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
408 | (data->fan_div[3] & 0x03);
409 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
410 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
411 | ((data->fan_div[3] & 0x04) << 5);
412 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
415 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
416 | ((data->fan_div[4] & 0x03) << 2)
417 | ((data->fan_div[4] & 0x04) << 5);
418 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
423 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
425 struct w83627ehf_data *data = dev_get_drvdata(dev);
426 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
429 mutex_lock(&data->update_lock);
431 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
433 /* Fan clock dividers */
434 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
435 data->fan_div[0] = (i >> 4) & 0x03;
436 data->fan_div[1] = (i >> 6) & 0x03;
437 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
438 data->fan_div[2] = (i >> 6) & 0x03;
439 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
440 data->fan_div[0] |= (i >> 3) & 0x04;
441 data->fan_div[1] |= (i >> 4) & 0x04;
442 data->fan_div[2] |= (i >> 5) & 0x04;
443 if (data->has_fan & ((1 << 3) | (1 << 4))) {
444 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
445 data->fan_div[3] = i & 0x03;
446 data->fan_div[4] = ((i >> 2) & 0x03)
449 if (data->has_fan & (1 << 3)) {
450 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
451 data->fan_div[3] |= (i >> 5) & 0x04;
454 /* Measured voltages and limits */
455 for (i = 0; i < data->in_num; i++) {
456 data->in[i] = w83627ehf_read_value(data,
457 W83627EHF_REG_IN(i));
458 data->in_min[i] = w83627ehf_read_value(data,
459 W83627EHF_REG_IN_MIN(i));
460 data->in_max[i] = w83627ehf_read_value(data,
461 W83627EHF_REG_IN_MAX(i));
464 /* Measured fan speeds and limits */
465 for (i = 0; i < 5; i++) {
466 if (!(data->has_fan & (1 << i)))
469 data->fan[i] = w83627ehf_read_value(data,
470 W83627EHF_REG_FAN[i]);
471 data->fan_min[i] = w83627ehf_read_value(data,
472 W83627EHF_REG_FAN_MIN[i]);
474 /* If we failed to measure the fan speed and clock
475 divider can be increased, let's try that for next
477 if (data->fan[i] == 0xff
478 && data->fan_div[i] < 0x07) {
479 dev_dbg(dev, "Increasing fan%d "
480 "clock divider from %u to %u\n",
481 i + 1, div_from_reg(data->fan_div[i]),
482 div_from_reg(data->fan_div[i] + 1));
484 w83627ehf_write_fan_div(data, i);
485 /* Preserve min limit if possible */
486 if (data->fan_min[i] >= 2
487 && data->fan_min[i] != 255)
488 w83627ehf_write_value(data,
489 W83627EHF_REG_FAN_MIN[i],
490 (data->fan_min[i] /= 2));
494 for (i = 0; i < 4; i++) {
495 /* pwmcfg, tolarance mapped for i=0, i=1 to same reg */
497 pwmcfg = w83627ehf_read_value(data,
498 W83627EHF_REG_PWM_ENABLE[i]);
499 tolerance = w83627ehf_read_value(data,
500 W83627EHF_REG_TOLERANCE[i]);
503 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
505 data->pwm_enable[i] =
506 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
508 data->pwm[i] = w83627ehf_read_value(data,
509 W83627EHF_REG_PWM[i]);
510 data->fan_min_output[i] = w83627ehf_read_value(data,
511 W83627EHF_REG_FAN_MIN_OUTPUT[i]);
512 data->fan_stop_time[i] = w83627ehf_read_value(data,
513 W83627EHF_REG_FAN_STOP_TIME[i]);
514 data->target_temp[i] =
515 w83627ehf_read_value(data,
516 W83627EHF_REG_TARGET[i]) &
517 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
518 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
522 /* Measured temperatures and limits */
523 data->temp1 = w83627ehf_read_value(data,
524 W83627EHF_REG_TEMP1);
525 data->temp1_max = w83627ehf_read_value(data,
526 W83627EHF_REG_TEMP1_OVER);
527 data->temp1_max_hyst = w83627ehf_read_value(data,
528 W83627EHF_REG_TEMP1_HYST);
529 for (i = 0; i < 2; i++) {
530 data->temp[i] = w83627ehf_read_value(data,
531 W83627EHF_REG_TEMP[i]);
532 data->temp_max[i] = w83627ehf_read_value(data,
533 W83627EHF_REG_TEMP_OVER[i]);
534 data->temp_max_hyst[i] = w83627ehf_read_value(data,
535 W83627EHF_REG_TEMP_HYST[i]);
538 data->alarms = w83627ehf_read_value(data,
539 W83627EHF_REG_ALARM1) |
540 (w83627ehf_read_value(data,
541 W83627EHF_REG_ALARM2) << 8) |
542 (w83627ehf_read_value(data,
543 W83627EHF_REG_ALARM3) << 16);
545 data->last_updated = jiffies;
549 mutex_unlock(&data->update_lock);
554 * Sysfs callback functions
556 #define show_in_reg(reg) \
558 show_##reg(struct device *dev, struct device_attribute *attr, \
561 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
562 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
563 int nr = sensor_attr->index; \
564 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
570 #define store_in_reg(REG, reg) \
572 store_in_##reg (struct device *dev, struct device_attribute *attr, \
573 const char *buf, size_t count) \
575 struct w83627ehf_data *data = dev_get_drvdata(dev); \
576 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
577 int nr = sensor_attr->index; \
578 u32 val = simple_strtoul(buf, NULL, 10); \
580 mutex_lock(&data->update_lock); \
581 data->in_##reg[nr] = in_to_reg(val, nr); \
582 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
583 data->in_##reg[nr]); \
584 mutex_unlock(&data->update_lock); \
588 store_in_reg(MIN, min)
589 store_in_reg(MAX, max)
591 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
593 struct w83627ehf_data *data = w83627ehf_update_device(dev);
594 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
595 int nr = sensor_attr->index;
596 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
599 static struct sensor_device_attribute sda_in_input[] = {
600 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
601 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
602 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
603 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
604 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
605 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
606 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
607 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
608 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
609 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
612 static struct sensor_device_attribute sda_in_alarm[] = {
613 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
614 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
615 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
616 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
617 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
618 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
619 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
620 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
621 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
622 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
625 static struct sensor_device_attribute sda_in_min[] = {
626 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
627 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
628 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
629 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
630 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
631 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
632 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
633 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
634 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
635 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
638 static struct sensor_device_attribute sda_in_max[] = {
639 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
640 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
641 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
642 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
643 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
644 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
645 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
646 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
647 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
648 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
651 #define show_fan_reg(reg) \
653 show_##reg(struct device *dev, struct device_attribute *attr, \
656 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
657 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
658 int nr = sensor_attr->index; \
659 return sprintf(buf, "%d\n", \
660 fan_from_reg(data->reg[nr], \
661 div_from_reg(data->fan_div[nr]))); \
664 show_fan_reg(fan_min);
667 show_fan_div(struct device *dev, struct device_attribute *attr,
670 struct w83627ehf_data *data = w83627ehf_update_device(dev);
671 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
672 int nr = sensor_attr->index;
673 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
677 store_fan_min(struct device *dev, struct device_attribute *attr,
678 const char *buf, size_t count)
680 struct w83627ehf_data *data = dev_get_drvdata(dev);
681 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
682 int nr = sensor_attr->index;
683 unsigned int val = simple_strtoul(buf, NULL, 10);
687 mutex_lock(&data->update_lock);
689 /* No min limit, alarm disabled */
690 data->fan_min[nr] = 255;
691 new_div = data->fan_div[nr]; /* No change */
692 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
693 } else if ((reg = 1350000U / val) >= 128 * 255) {
694 /* Speed below this value cannot possibly be represented,
695 even with the highest divider (128) */
696 data->fan_min[nr] = 254;
697 new_div = 7; /* 128 == (1 << 7) */
698 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
699 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
701 /* Speed above this value cannot possibly be represented,
702 even with the lowest divider (1) */
703 data->fan_min[nr] = 1;
704 new_div = 0; /* 1 == (1 << 0) */
705 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
706 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
708 /* Automatically pick the best divider, i.e. the one such
709 that the min limit will correspond to a register value
710 in the 96..192 range */
712 while (reg > 192 && new_div < 7) {
716 data->fan_min[nr] = reg;
719 /* Write both the fan clock divider (if it changed) and the new
720 fan min (unconditionally) */
721 if (new_div != data->fan_div[nr]) {
722 /* Preserve the fan speed reading */
723 if (data->fan[nr] != 0xff) {
724 if (new_div > data->fan_div[nr])
725 data->fan[nr] >>= new_div - data->fan_div[nr];
726 else if (data->fan[nr] & 0x80)
727 data->fan[nr] = 0xff;
729 data->fan[nr] <<= data->fan_div[nr] - new_div;
732 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
733 nr + 1, div_from_reg(data->fan_div[nr]),
734 div_from_reg(new_div));
735 data->fan_div[nr] = new_div;
736 w83627ehf_write_fan_div(data, nr);
737 /* Give the chip time to sample a new speed value */
738 data->last_updated = jiffies;
740 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
742 mutex_unlock(&data->update_lock);
747 static struct sensor_device_attribute sda_fan_input[] = {
748 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
749 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
750 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
751 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
752 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
755 static struct sensor_device_attribute sda_fan_alarm[] = {
756 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
757 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
758 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
759 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
760 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
763 static struct sensor_device_attribute sda_fan_min[] = {
764 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
766 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
768 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
770 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
772 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
776 static struct sensor_device_attribute sda_fan_div[] = {
777 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
778 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
779 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
780 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
781 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
784 #define show_temp1_reg(reg) \
786 show_##reg(struct device *dev, struct device_attribute *attr, \
789 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
790 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
792 show_temp1_reg(temp1);
793 show_temp1_reg(temp1_max);
794 show_temp1_reg(temp1_max_hyst);
796 #define store_temp1_reg(REG, reg) \
798 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
799 const char *buf, size_t count) \
801 struct w83627ehf_data *data = dev_get_drvdata(dev); \
802 u32 val = simple_strtoul(buf, NULL, 10); \
804 mutex_lock(&data->update_lock); \
805 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
806 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
807 data->temp1_##reg); \
808 mutex_unlock(&data->update_lock); \
811 store_temp1_reg(OVER, max);
812 store_temp1_reg(HYST, max_hyst);
814 #define show_temp_reg(reg) \
816 show_##reg(struct device *dev, struct device_attribute *attr, \
819 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
820 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
821 int nr = sensor_attr->index; \
822 return sprintf(buf, "%d\n", \
823 LM75_TEMP_FROM_REG(data->reg[nr])); \
826 show_temp_reg(temp_max);
827 show_temp_reg(temp_max_hyst);
829 #define store_temp_reg(REG, reg) \
831 store_##reg(struct device *dev, struct device_attribute *attr, \
832 const char *buf, size_t count) \
834 struct w83627ehf_data *data = dev_get_drvdata(dev); \
835 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
836 int nr = sensor_attr->index; \
837 u32 val = simple_strtoul(buf, NULL, 10); \
839 mutex_lock(&data->update_lock); \
840 data->reg[nr] = LM75_TEMP_TO_REG(val); \
841 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
843 mutex_unlock(&data->update_lock); \
846 store_temp_reg(OVER, temp_max);
847 store_temp_reg(HYST, temp_max_hyst);
849 static struct sensor_device_attribute sda_temp[] = {
850 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
851 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
852 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
853 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
855 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
857 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
859 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
860 store_temp1_max_hyst, 0),
861 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
862 store_temp_max_hyst, 0),
863 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
864 store_temp_max_hyst, 1),
865 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
866 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
867 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
870 #define show_pwm_reg(reg) \
871 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
874 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
875 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
876 int nr = sensor_attr->index; \
877 return sprintf(buf, "%d\n", data->reg[nr]); \
880 show_pwm_reg(pwm_mode)
881 show_pwm_reg(pwm_enable)
885 store_pwm_mode(struct device *dev, struct device_attribute *attr,
886 const char *buf, size_t count)
888 struct w83627ehf_data *data = dev_get_drvdata(dev);
889 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
890 int nr = sensor_attr->index;
891 u32 val = simple_strtoul(buf, NULL, 10);
896 mutex_lock(&data->update_lock);
897 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
898 data->pwm_mode[nr] = val;
899 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
901 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
902 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
903 mutex_unlock(&data->update_lock);
908 store_pwm(struct device *dev, struct device_attribute *attr,
909 const char *buf, size_t count)
911 struct w83627ehf_data *data = dev_get_drvdata(dev);
912 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
913 int nr = sensor_attr->index;
914 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
916 mutex_lock(&data->update_lock);
918 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
919 mutex_unlock(&data->update_lock);
924 store_pwm_enable(struct device *dev, struct device_attribute *attr,
925 const char *buf, size_t count)
927 struct w83627ehf_data *data = dev_get_drvdata(dev);
928 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
929 int nr = sensor_attr->index;
930 u32 val = simple_strtoul(buf, NULL, 10);
933 if (!val || (val > 2)) /* only modes 1 and 2 are supported */
935 mutex_lock(&data->update_lock);
936 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
937 data->pwm_enable[nr] = val;
938 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
939 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
940 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
941 mutex_unlock(&data->update_lock);
946 #define show_tol_temp(reg) \
947 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
950 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
951 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
952 int nr = sensor_attr->index; \
953 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
956 show_tol_temp(tolerance)
957 show_tol_temp(target_temp)
960 store_target_temp(struct device *dev, struct device_attribute *attr,
961 const char *buf, size_t count)
963 struct w83627ehf_data *data = dev_get_drvdata(dev);
964 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
965 int nr = sensor_attr->index;
966 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
968 mutex_lock(&data->update_lock);
969 data->target_temp[nr] = val;
970 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
971 mutex_unlock(&data->update_lock);
976 store_tolerance(struct device *dev, struct device_attribute *attr,
977 const char *buf, size_t count)
979 struct w83627ehf_data *data = dev_get_drvdata(dev);
980 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
981 int nr = sensor_attr->index;
983 /* Limit the temp to 0C - 15C */
984 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
986 mutex_lock(&data->update_lock);
987 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
988 data->tolerance[nr] = val;
990 reg = (reg & 0x0f) | (val << 4);
992 reg = (reg & 0xf0) | val;
993 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
994 mutex_unlock(&data->update_lock);
998 static struct sensor_device_attribute sda_pwm[] = {
999 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1000 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1001 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1002 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1005 static struct sensor_device_attribute sda_pwm_mode[] = {
1006 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1008 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1010 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1012 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1016 static struct sensor_device_attribute sda_pwm_enable[] = {
1017 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1018 store_pwm_enable, 0),
1019 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1020 store_pwm_enable, 1),
1021 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1022 store_pwm_enable, 2),
1023 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1024 store_pwm_enable, 3),
1027 static struct sensor_device_attribute sda_target_temp[] = {
1028 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1029 store_target_temp, 0),
1030 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1031 store_target_temp, 1),
1032 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1033 store_target_temp, 2),
1034 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1035 store_target_temp, 3),
1038 static struct sensor_device_attribute sda_tolerance[] = {
1039 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1040 store_tolerance, 0),
1041 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1042 store_tolerance, 1),
1043 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1044 store_tolerance, 2),
1045 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1046 store_tolerance, 3),
1049 /* Smart Fan registers */
1051 #define fan_functions(reg, REG) \
1052 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1055 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1056 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1057 int nr = sensor_attr->index; \
1058 return sprintf(buf, "%d\n", data->reg[nr]); \
1061 store_##reg(struct device *dev, struct device_attribute *attr, \
1062 const char *buf, size_t count) \
1064 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1065 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1066 int nr = sensor_attr->index; \
1067 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1068 mutex_lock(&data->update_lock); \
1069 data->reg[nr] = val; \
1070 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1071 mutex_unlock(&data->update_lock); \
1075 fan_functions(fan_min_output, FAN_MIN_OUTPUT)
1077 #define fan_time_functions(reg, REG) \
1078 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1081 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1082 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1083 int nr = sensor_attr->index; \
1084 return sprintf(buf, "%d\n", \
1085 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1089 store_##reg(struct device *dev, struct device_attribute *attr, \
1090 const char *buf, size_t count) \
1092 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1093 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1094 int nr = sensor_attr->index; \
1095 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1096 data->pwm_mode[nr]); \
1097 mutex_lock(&data->update_lock); \
1098 data->reg[nr] = val; \
1099 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1100 mutex_unlock(&data->update_lock); \
1104 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1106 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1109 struct w83627ehf_data *data = dev_get_drvdata(dev);
1111 return sprintf(buf, "%s\n", data->name);
1113 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1115 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1116 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1117 store_fan_stop_time, 3),
1118 SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1119 store_fan_min_output, 3),
1122 static struct sensor_device_attribute sda_sf3_arrays[] = {
1123 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1124 store_fan_stop_time, 0),
1125 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1126 store_fan_stop_time, 1),
1127 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1128 store_fan_stop_time, 2),
1129 SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1130 store_fan_min_output, 0),
1131 SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1132 store_fan_min_output, 1),
1133 SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1134 store_fan_min_output, 2),
1138 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1140 struct w83627ehf_data *data = dev_get_drvdata(dev);
1141 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1143 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1146 * Driver and device management
1149 static void w83627ehf_device_remove_files(struct device *dev)
1151 /* some entries in the following arrays may not have been used in
1152 * device_create_file(), but device_remove_file() will ignore them */
1154 struct w83627ehf_data *data = dev_get_drvdata(dev);
1156 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1157 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1158 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1159 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1160 for (i = 0; i < data->in_num; i++) {
1161 device_remove_file(dev, &sda_in_input[i].dev_attr);
1162 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1163 device_remove_file(dev, &sda_in_min[i].dev_attr);
1164 device_remove_file(dev, &sda_in_max[i].dev_attr);
1166 for (i = 0; i < 5; i++) {
1167 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1168 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1169 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1170 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1172 for (i = 0; i < 4; i++) {
1173 device_remove_file(dev, &sda_pwm[i].dev_attr);
1174 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1175 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1176 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1177 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1179 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1180 device_remove_file(dev, &sda_temp[i].dev_attr);
1182 device_remove_file(dev, &dev_attr_name);
1183 if (data->vid != 0x3f)
1184 device_remove_file(dev, &dev_attr_cpu0_vid);
1187 /* Get the monitoring functions started */
1188 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1193 /* Start monitoring is needed */
1194 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1196 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1199 /* Enable temp2 and temp3 if needed */
1200 for (i = 0; i < 2; i++) {
1201 tmp = w83627ehf_read_value(data,
1202 W83627EHF_REG_TEMP_CONFIG[i]);
1204 w83627ehf_write_value(data,
1205 W83627EHF_REG_TEMP_CONFIG[i],
1210 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1212 struct device *dev = &pdev->dev;
1213 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1214 struct w83627ehf_data *data;
1215 struct resource *res;
1216 u8 fan4pin, fan5pin, en_vrm10;
1219 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1220 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1222 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1223 (unsigned long)res->start,
1224 (unsigned long)res->start + IOREGION_LENGTH - 1);
1228 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1233 data->addr = res->start;
1234 mutex_init(&data->lock);
1235 mutex_init(&data->update_lock);
1236 data->name = w83627ehf_device_names[sio_data->kind];
1237 platform_set_drvdata(pdev, data);
1239 /* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
1240 data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
1242 /* Initialize the chip */
1243 w83627ehf_init_device(data);
1245 /* A few vars need to be filled upon startup */
1246 for (i = 0; i < 5; i++)
1247 data->fan_min[i] = w83627ehf_read_value(data,
1248 W83627EHF_REG_FAN_MIN[i]);
1250 data->vrm = vid_which_vrm();
1251 superio_enter(sio_data->sioreg);
1252 /* Set VID input sensibility if needed. In theory the BIOS should
1253 have set it, but in practice it's not always the case. */
1254 en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10);
1255 if ((en_vrm10 & 0x08) && data->vrm != 100) {
1256 dev_warn(dev, "Setting VID input voltage to TTL\n");
1257 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1259 } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
1260 dev_warn(dev, "Setting VID input voltage to VRM10\n");
1261 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1264 /* Read VID value */
1265 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1266 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80)
1267 data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f;
1269 dev_info(dev, "VID pins in output mode, CPU VID not "
1274 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1276 fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
1277 fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
1278 superio_exit(sio_data->sioreg);
1280 /* It looks like fan4 and fan5 pins can be alternatively used
1281 as fan on/off switches, but fan5 control is write only :/
1282 We assume that if the serial interface is disabled, designers
1283 connected fan5 as input unless they are emitting log 1, which
1284 is not the default. */
1286 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1287 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1288 if ((i & (1 << 2)) && (!fan4pin))
1289 data->has_fan |= (1 << 3);
1290 if (!(i & (1 << 1)) && (!fan5pin))
1291 data->has_fan |= (1 << 4);
1293 /* Register sysfs hooks */
1294 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1295 if ((err = device_create_file(dev,
1296 &sda_sf3_arrays[i].dev_attr)))
1299 /* if fan4 is enabled create the sf3 files for it */
1300 if (data->has_fan & (1 << 3))
1301 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1302 if ((err = device_create_file(dev,
1303 &sda_sf3_arrays_fan4[i].dev_attr)))
1307 for (i = 0; i < data->in_num; i++)
1308 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1309 || (err = device_create_file(dev,
1310 &sda_in_alarm[i].dev_attr))
1311 || (err = device_create_file(dev,
1312 &sda_in_min[i].dev_attr))
1313 || (err = device_create_file(dev,
1314 &sda_in_max[i].dev_attr)))
1317 for (i = 0; i < 5; i++) {
1318 if (data->has_fan & (1 << i)) {
1319 if ((err = device_create_file(dev,
1320 &sda_fan_input[i].dev_attr))
1321 || (err = device_create_file(dev,
1322 &sda_fan_alarm[i].dev_attr))
1323 || (err = device_create_file(dev,
1324 &sda_fan_div[i].dev_attr))
1325 || (err = device_create_file(dev,
1326 &sda_fan_min[i].dev_attr)))
1328 if (i < 4 && /* w83627ehf only has 4 pwm */
1329 ((err = device_create_file(dev,
1330 &sda_pwm[i].dev_attr))
1331 || (err = device_create_file(dev,
1332 &sda_pwm_mode[i].dev_attr))
1333 || (err = device_create_file(dev,
1334 &sda_pwm_enable[i].dev_attr))
1335 || (err = device_create_file(dev,
1336 &sda_target_temp[i].dev_attr))
1337 || (err = device_create_file(dev,
1338 &sda_tolerance[i].dev_attr))))
1343 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1344 if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
1347 err = device_create_file(dev, &dev_attr_name);
1351 if (data->vid != 0x3f) {
1352 err = device_create_file(dev, &dev_attr_cpu0_vid);
1357 data->class_dev = hwmon_device_register(dev);
1358 if (IS_ERR(data->class_dev)) {
1359 err = PTR_ERR(data->class_dev);
1366 w83627ehf_device_remove_files(dev);
1368 platform_set_drvdata(pdev, NULL);
1370 release_region(res->start, IOREGION_LENGTH);
1375 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1377 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1379 hwmon_device_unregister(data->class_dev);
1380 w83627ehf_device_remove_files(&pdev->dev);
1381 release_region(data->addr, IOREGION_LENGTH);
1382 platform_set_drvdata(pdev, NULL);
1388 static struct platform_driver w83627ehf_driver = {
1390 .owner = THIS_MODULE,
1393 .probe = w83627ehf_probe,
1394 .remove = __devexit_p(w83627ehf_remove),
1397 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1398 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1399 struct w83627ehf_sio_data *sio_data)
1401 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1402 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1403 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1406 const char *sio_name;
1408 superio_enter(sioaddr);
1410 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1411 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1412 switch (val & SIO_ID_MASK) {
1413 case SIO_W83627EHF_ID:
1414 sio_data->kind = w83627ehf;
1415 sio_name = sio_name_W83627EHF;
1417 case SIO_W83627EHG_ID:
1418 sio_data->kind = w83627ehf;
1419 sio_name = sio_name_W83627EHG;
1421 case SIO_W83627DHG_ID:
1422 sio_data->kind = w83627dhg;
1423 sio_name = sio_name_W83627DHG;
1426 pr_info(DRVNAME ": unsupported chip ID: 0x%04x\n",
1428 superio_exit(sioaddr);
1432 /* We have a known chip, find the HWM I/O address */
1433 superio_select(sioaddr, W83627EHF_LD_HWM);
1434 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1435 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1436 *addr = val & IOREGION_ALIGNMENT;
1438 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1439 "device with a base I/O port 0.\n");
1440 superio_exit(sioaddr);
1444 /* Activate logical device if needed */
1445 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1446 if (!(val & 0x01)) {
1447 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1448 "Sensor is probably unusable.\n");
1449 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1452 superio_exit(sioaddr);
1453 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1454 sio_data->sioreg = sioaddr;
1459 /* when Super-I/O functions move to a separate file, the Super-I/O
1460 * bus will manage the lifetime of the device and this module will only keep
1461 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1462 * must keep track of the device */
1463 static struct platform_device *pdev;
1465 static int __init sensors_w83627ehf_init(void)
1468 unsigned short address;
1469 struct resource res;
1470 struct w83627ehf_sio_data sio_data;
1472 /* initialize sio_data->kind and sio_data->sioreg.
1474 * when Super-I/O functions move to a separate file, the Super-I/O
1475 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1476 * w83627ehf hardware monitor, and call probe() */
1477 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1478 w83627ehf_find(0x4e, &address, &sio_data))
1481 err = platform_driver_register(&w83627ehf_driver);
1485 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1487 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1488 goto exit_unregister;
1491 err = platform_device_add_data(pdev, &sio_data,
1492 sizeof(struct w83627ehf_sio_data));
1494 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1495 goto exit_device_put;
1498 memset(&res, 0, sizeof(res));
1500 res.start = address + IOREGION_OFFSET;
1501 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1502 res.flags = IORESOURCE_IO;
1503 err = platform_device_add_resources(pdev, &res, 1);
1505 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1507 goto exit_device_put;
1510 /* platform_device_add calls probe() */
1511 err = platform_device_add(pdev);
1513 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1515 goto exit_device_put;
1521 platform_device_put(pdev);
1523 platform_driver_unregister(&w83627ehf_driver);
1528 static void __exit sensors_w83627ehf_exit(void)
1530 platform_device_unregister(pdev);
1531 platform_driver_unregister(&w83627ehf_driver);
1534 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1535 MODULE_DESCRIPTION("W83627EHF driver");
1536 MODULE_LICENSE("GPL");
1538 module_init(sensors_w83627ehf_init);
1539 module_exit(sensors_w83627ehf_exit);