2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
4 * Copyright (C) 2004-2007 Texas Instruments
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 * - HS USB ULPI mode works.
22 * - 3-pin mode support may be added in future.
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/time.h>
29 #include <linux/interrupt.h>
31 #include <linux/usb.h>
32 #include <linux/usb/ch9.h>
33 #include <linux/usb/gadget.h>
34 #include <linux/usb/otg.h>
35 #include <linux/i2c/twl4030.h>
38 /* Register defines */
40 #define VENDOR_ID_LO 0x00
41 #define VENDOR_ID_HI 0x01
42 #define PRODUCT_ID_LO 0x02
43 #define PRODUCT_ID_HI 0x03
45 #define FUNC_CTRL 0x04
46 #define FUNC_CTRL_SET 0x05
47 #define FUNC_CTRL_CLR 0x06
48 #define FUNC_CTRL_SUSPENDM (1 << 6)
49 #define FUNC_CTRL_RESET (1 << 5)
50 #define FUNC_CTRL_OPMODE_MASK (3 << 3) /* bits 3 and 4 */
51 #define FUNC_CTRL_OPMODE_NORMAL (0 << 3)
52 #define FUNC_CTRL_OPMODE_NONDRIVING (1 << 3)
53 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI (2 << 3)
54 #define FUNC_CTRL_TERMSELECT (1 << 2)
55 #define FUNC_CTRL_XCVRSELECT_MASK (3 << 0) /* bits 0 and 1 */
56 #define FUNC_CTRL_XCVRSELECT_HS (0 << 0)
57 #define FUNC_CTRL_XCVRSELECT_FS (1 << 0)
58 #define FUNC_CTRL_XCVRSELECT_LS (2 << 0)
59 #define FUNC_CTRL_XCVRSELECT_FS4LS (3 << 0)
62 #define IFC_CTRL_SET 0x08
63 #define IFC_CTRL_CLR 0x09
64 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE (1 << 7)
65 #define IFC_CTRL_AUTORESUME (1 << 4)
66 #define IFC_CTRL_CLOCKSUSPENDM (1 << 3)
67 #define IFC_CTRL_CARKITMODE (1 << 2)
68 #define IFC_CTRL_FSLSSERIALMODE_3PIN (1 << 1)
70 #define TWL4030_OTG_CTRL 0x0A
71 #define TWL4030_OTG_CTRL_SET 0x0B
72 #define TWL4030_OTG_CTRL_CLR 0x0C
73 #define TWL4030_OTG_CTRL_DRVVBUS (1 << 5)
74 #define TWL4030_OTG_CTRL_CHRGVBUS (1 << 4)
75 #define TWL4030_OTG_CTRL_DISCHRGVBUS (1 << 3)
76 #define TWL4030_OTG_CTRL_DMPULLDOWN (1 << 2)
77 #define TWL4030_OTG_CTRL_DPPULLDOWN (1 << 1)
78 #define TWL4030_OTG_CTRL_IDPULLUP (1 << 0)
80 #define USB_INT_EN_RISE 0x0D
81 #define USB_INT_EN_RISE_SET 0x0E
82 #define USB_INT_EN_RISE_CLR 0x0F
83 #define USB_INT_EN_FALL 0x10
84 #define USB_INT_EN_FALL_SET 0x11
85 #define USB_INT_EN_FALL_CLR 0x12
86 #define USB_INT_STS 0x13
87 #define USB_INT_LATCH 0x14
88 #define USB_INT_IDGND (1 << 4)
89 #define USB_INT_SESSEND (1 << 3)
90 #define USB_INT_SESSVALID (1 << 2)
91 #define USB_INT_VBUSVALID (1 << 1)
92 #define USB_INT_HOSTDISCONNECT (1 << 0)
94 #define CARKIT_CTRL 0x19
95 #define CARKIT_CTRL_SET 0x1A
96 #define CARKIT_CTRL_CLR 0x1B
97 #define CARKIT_CTRL_MICEN (1 << 6)
98 #define CARKIT_CTRL_SPKRIGHTEN (1 << 5)
99 #define CARKIT_CTRL_SPKLEFTEN (1 << 4)
100 #define CARKIT_CTRL_RXDEN (1 << 3)
101 #define CARKIT_CTRL_TXDEN (1 << 2)
102 #define CARKIT_CTRL_IDGNDDRV (1 << 1)
103 #define CARKIT_CTRL_CARKITPWR (1 << 0)
104 #define CARKIT_PLS_CTRL 0x22
105 #define CARKIT_PLS_CTRL_SET 0x23
106 #define CARKIT_PLS_CTRL_CLR 0x24
107 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
108 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
109 #define CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
110 #define CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
112 #define MCPC_CTRL 0x30
113 #define MCPC_CTRL_SET 0x31
114 #define MCPC_CTRL_CLR 0x32
115 #define MCPC_CTRL_RTSOL (1 << 7)
116 #define MCPC_CTRL_EXTSWR (1 << 6)
117 #define MCPC_CTRL_EXTSWC (1 << 5)
118 #define MCPC_CTRL_VOICESW (1 << 4)
119 #define MCPC_CTRL_OUT64K (1 << 3)
120 #define MCPC_CTRL_RTSCTSSW (1 << 2)
121 #define MCPC_CTRL_HS_UART (1 << 0)
123 #define MCPC_IO_CTRL 0x33
124 #define MCPC_IO_CTRL_SET 0x34
125 #define MCPC_IO_CTRL_CLR 0x35
126 #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
127 #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
128 #define MCPC_IO_CTRL_RXD_PU (1 << 3)
129 #define MCPC_IO_CTRL_TXDTYP (1 << 2)
130 #define MCPC_IO_CTRL_CTSTYP (1 << 1)
131 #define MCPC_IO_CTRL_RTSTYP (1 << 0)
133 #define MCPC_CTRL2 0x36
134 #define MCPC_CTRL2_SET 0x37
135 #define MCPC_CTRL2_CLR 0x38
136 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
138 #define OTHER_FUNC_CTRL 0x80
139 #define OTHER_FUNC_CTRL_SET 0x81
140 #define OTHER_FUNC_CTRL_CLR 0x82
141 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
142 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
144 #define OTHER_IFC_CTRL 0x83
145 #define OTHER_IFC_CTRL_SET 0x84
146 #define OTHER_IFC_CTRL_CLR 0x85
147 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
148 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
149 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
150 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
151 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
152 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
154 #define OTHER_INT_EN_RISE 0x86
155 #define OTHER_INT_EN_RISE_SET 0x87
156 #define OTHER_INT_EN_RISE_CLR 0x88
157 #define OTHER_INT_EN_FALL 0x89
158 #define OTHER_INT_EN_FALL_SET 0x8A
159 #define OTHER_INT_EN_FALL_CLR 0x8B
160 #define OTHER_INT_STS 0x8C
161 #define OTHER_INT_LATCH 0x8D
162 #define OTHER_INT_VB_SESS_VLD (1 << 7)
163 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
164 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
165 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
166 #define OTHER_INT_MANU (1 << 1)
167 #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
169 #define ID_STATUS 0x96
170 #define ID_RES_FLOAT (1 << 4)
171 #define ID_RES_440K (1 << 3)
172 #define ID_RES_200K (1 << 2)
173 #define ID_RES_102K (1 << 1)
174 #define ID_RES_GND (1 << 0)
176 #define POWER_CTRL 0xAC
177 #define POWER_CTRL_SET 0xAD
178 #define POWER_CTRL_CLR 0xAE
179 #define POWER_CTRL_OTG_ENAB (1 << 5)
181 #define OTHER_IFC_CTRL2 0xAF
182 #define OTHER_IFC_CTRL2_SET 0xB0
183 #define OTHER_IFC_CTRL2_CLR 0xB1
184 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
185 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
186 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
187 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
188 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
189 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
191 #define REG_CTRL_EN 0xB2
192 #define REG_CTRL_EN_SET 0xB3
193 #define REG_CTRL_EN_CLR 0xB4
194 #define REG_CTRL_ERROR 0xB5
195 #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
197 #define OTHER_FUNC_CTRL2 0xB8
198 #define OTHER_FUNC_CTRL2_SET 0xB9
199 #define OTHER_FUNC_CTRL2_CLR 0xBA
200 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
202 /* following registers do not have separate _clr and _set registers */
203 #define VBUS_DEBOUNCE 0xC0
204 #define ID_DEBOUNCE 0xC1
205 #define VBAT_TIMER 0xD3
206 #define PHY_PWR_CTRL 0xFD
207 #define PHY_PWR_PHYPWD (1 << 0)
208 #define PHY_CLK_CTRL 0xFE
209 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
210 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
211 #define REQ_PHY_DPLL_CLK (1 << 0)
212 #define PHY_CLK_CTRL_STS 0xFF
213 #define PHY_DPLL_CLK (1 << 0)
215 /* In module TWL4030_MODULE_PM_MASTER */
216 #define PROTECT_KEY 0x0E
218 /* In module TWL4030_MODULE_PM_RECEIVER */
219 #define VUSB_DEDICATED1 0x7D
220 #define VUSB_DEDICATED2 0x7E
221 #define VUSB1V5_DEV_GRP 0x71
222 #define VUSB1V5_TYPE 0x72
223 #define VUSB1V5_REMAP 0x73
224 #define VUSB1V8_DEV_GRP 0x74
225 #define VUSB1V8_TYPE 0x75
226 #define VUSB1V8_REMAP 0x76
227 #define VUSB3V1_DEV_GRP 0x77
228 #define VUSB3V1_TYPE 0x78
229 #define VUSB3V1_REMAP 0x79
231 #define ID_STATUS 0x96
232 #define ID_RES_FLOAT (1 << 4) /* mini-B */
233 #define ID_RES_440K (1 << 3) /* type 2 charger */
234 #define ID_RES_200K (1 << 2) /* 5-wire carkit or
236 #define ID_RES_102K (1 << 1) /* phone */
237 #define ID_RES_GND (1 << 0) /* mini-A */
239 /* In module TWL4030_MODULE_INTBR */
241 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
243 /* In module TWL4030_MODULE_INT */
244 #define REG_PWR_ISR1 0x00
245 #define REG_PWR_IMR1 0x01
246 #define USB_PRES (1 << 2)
247 #define REG_PWR_EDR1 0x05
248 #define USB_PRES_FALLING (1 << 4)
249 #define USB_PRES_RISING (1 << 5)
250 #define REG_PWR_SIH_CTRL 0x07
253 /* internal define on top of container_of */
254 #define xceiv_to_twl(x) container_of((x), struct twl4030_usb, otg);
256 /* bits in OTG_CTRL */
258 #define OTG_XCEIV_OUTPUTS \
259 (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
260 #define OTG_XCEIV_INPUTS \
261 (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
262 #define OTG_CTRL_BITS \
263 (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
264 /* and OTG_PULLUP is sometimes written */
266 #define OTG_CTRL_MASK (OTG_DRIVER_SEL| \
267 OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
271 /*-------------------------------------------------------------------------*/
274 struct otg_transceiver otg;
276 u8 usb_mode; /* pin configuration */
277 #define T2_USB_MODE_ULPI 1
278 /* #define T2_USB_MODE_CEA2011_3PIN 2 */
282 static struct twl4030_usb *the_transceiver;
284 /*-------------------------------------------------------------------------*/
286 static int twl4030_i2c_write_u8_verify(u8 module, u8 data, u8 address)
290 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
291 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
294 /* Failed once: Try again */
295 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
296 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
299 /* Failed again: Return error */
303 #define twl4030_usb_write_verify(address, data) \
304 twl4030_i2c_write_u8_verify(TWL4030_MODULE_USB, (data), (address))
306 static inline int twl4030_usb_write(u8 address, u8 data)
309 ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
313 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
315 printk(KERN_ERR "re-read failed\n");
318 "Write %s wrote %x read %x from reg %x\n",
319 (data1 == data) ? "succeed" : "mismatch",
320 data, data1, address);
324 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
329 static inline int twl4030_usb_read(u8 address)
333 ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
338 "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
343 /*-------------------------------------------------------------------------*/
346 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
348 return twl4030_usb_write(reg + 1, bits);
352 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
354 return twl4030_usb_write(reg + 2, bits);
358 /*-------------------------------------------------------------------------*/
360 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
362 twl->usb_mode = mode;
365 case T2_USB_MODE_ULPI:
366 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
367 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
368 twl4030_usb_clear_bits(twl, FUNC_CTRL,
369 FUNC_CTRL_XCVRSELECT_MASK |
370 FUNC_CTRL_OPMODE_MASK);
373 case T2_USB_MODE_CEA2011_3PIN:
374 twl4030_cea2011_3_pin_FS_setup(twl);
378 /* FIXME: power on defaults */
383 #ifdef CONFIG_TWL4030_USB_HS_ULPI
384 static void hs_usb_init(struct twl4030_usb *twl)
386 twl->usb_mode = T2_USB_MODE_ULPI;
392 static void twl4030_i2c_access(int on)
394 unsigned long timeout;
395 int val = twl4030_usb_read(PHY_CLK_CTRL);
399 /* enable DPLL to access PHY registers over I2C */
400 val |= REQ_PHY_DPLL_CLK;
401 if (twl4030_usb_write_verify(PHY_CLK_CTRL,
403 printk(KERN_ERR "twl4030_usb: i2c write failed,"
404 " line %d\n", __LINE__);
408 timeout = jiffies + HZ;
409 while (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
411 && time_before(jiffies, timeout))
413 if (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
415 printk(KERN_ERR "Timeout setting T2 HSUSB "
418 /* let ULPI control the DPLL clock */
419 val &= ~REQ_PHY_DPLL_CLK;
420 if (twl4030_usb_write_verify(PHY_CLK_CTRL,
422 printk(KERN_ERR "twl4030_usb: i2c write failed,"
423 " line %d\n", __LINE__);
430 static void usb_irq_enable(int rising, int falling)
435 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
436 printk(KERN_ERR "twl4030_usb: i2c read failed,"
437 " line %d\n", __LINE__);
440 val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
442 val = val | USB_PRES_RISING;
444 val = val | USB_PRES_FALLING;
445 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
447 printk(KERN_ERR "twl4030_usb: i2c write failed,"
448 " line %d\n", __LINE__);
452 /* un-mask interrupt */
453 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
454 printk(KERN_ERR "twl4030_usb: i2c read failed,"
455 " line %d\n", __LINE__);
459 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
461 printk(KERN_ERR "twl4030_usb: i2c write failed,"
462 " line %d\n", __LINE__);
467 static void usb_irq_disable(void)
471 /* undo edge setup */
472 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
473 printk(KERN_ERR "twl4030_usb: i2c read failed,"
474 " line %d\n", __LINE__);
477 val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
478 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
480 printk(KERN_ERR "twl4030_usb: i2c write failed,"
481 " line %d\n", __LINE__);
486 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
487 printk(KERN_ERR "twl4030_usb: i2c read failed,"
488 " line %d\n", __LINE__);
492 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
494 printk(KERN_ERR "twl4030_usb: i2c write failed,"
495 " line %d\n", __LINE__);
500 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
504 pwr = twl4030_usb_read(PHY_PWR_CTRL);
506 pwr &= ~PHY_PWR_PHYPWD;
507 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
508 printk(KERN_ERR "twl4030_usb: i2c write failed,"
509 " line %d\n", __LINE__);
512 twl4030_usb_write(PHY_CLK_CTRL,
513 twl4030_usb_read(PHY_CLK_CTRL) |
514 (PHY_CLK_CTRL_CLOCKGATING_EN |
515 PHY_CLK_CTRL_CLK32K_EN));
517 pwr |= PHY_PWR_PHYPWD;
518 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
519 printk(KERN_ERR "twl4030_usb: i2c write failed,"
520 " line %d\n", __LINE__);
526 static void twl4030_phy_suspend(int controller_off)
528 struct twl4030_usb *twl = the_transceiver;
537 /* enable rising edge interrupt to detect cable attach */
538 usb_irq_enable(1, 0);
540 twl4030_phy_power(twl, 0);
545 static void twl4030_phy_resume(void)
547 struct twl4030_usb *twl = the_transceiver;
552 /* enable falling edge interrupt to detect cable detach */
553 usb_irq_enable(0, 1);
555 twl4030_phy_power(twl, 1);
556 twl4030_i2c_access(1);
557 twl4030_usb_set_mode(twl, twl->usb_mode);
558 if (twl->usb_mode == T2_USB_MODE_ULPI)
559 twl4030_i2c_access(0);
564 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
566 /* Enable writing to power configuration registers */
567 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
568 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
570 /* put VUSB3V1 LDO in active state */
571 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
573 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
574 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
576 /* turn on 3.1V regulator */
577 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
578 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
580 /* turn on 1.5V regulator */
581 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
582 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
584 /* turn on 1.8V regulator */
585 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
586 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
588 /* disable access to power configuration registers */
589 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY);
592 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
597 /* action based on cable attach or detach */
598 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
599 printk(KERN_ERR "twl4030_usb: i2c read failed,"
600 " line %d\n", __LINE__);
604 if (val & USB_PRES_RISING) {
605 twl4030_phy_resume();
606 twl4030charger_usb_en(1);
608 twl4030charger_usb_en(0);
609 twl4030_phy_suspend(0);
618 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
621 twl4030_phy_suspend(1);
623 twl4030_phy_resume();
628 static int twl4030_set_peripheral(struct otg_transceiver *xceiv,
629 struct usb_gadget *gadget)
632 struct twl4030_usb *twl = xceiv_to_twl(xceiv);
638 omap_writew(0, OTG_IRQ_EN);
639 twl4030_phy_suspend(1);
640 twl->otg.gadget = NULL;
645 twl->otg.gadget = gadget;
646 twl4030_phy_resume();
648 l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
649 l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS);
651 omap_writel(l, OTG_CTRL);
653 twl->otg.state = OTG_STATE_B_IDLE;
655 twl4030_usb_set_bits(twl, USB_INT_EN_RISE,
656 USB_INT_SESSVALID | USB_INT_VBUSVALID);
657 twl4030_usb_set_bits(twl, USB_INT_EN_FALL,
658 USB_INT_SESSVALID | USB_INT_VBUSVALID);
663 static int twl4030_set_host(struct otg_transceiver *xceiv, struct usb_bus *host)
665 struct twl4030_usb *twl = xceiv_to_twl(xceiv);
671 omap_writew(0, OTG_IRQ_EN);
672 twl4030_phy_suspend(1);
673 twl->otg.host = NULL;
678 twl->otg.host = host;
679 twl4030_phy_resume();
681 twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL,
682 TWL4030_OTG_CTRL_DMPULLDOWN
683 | TWL4030_OTG_CTRL_DPPULLDOWN);
684 twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND);
685 twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND);
686 twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM);
687 twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL, TWL4030_OTG_CTRL_DRVVBUS);
692 static int __init twl4030_usb_init(void)
694 struct twl4030_usb *twl;
700 twl = kzalloc(sizeof *twl, GFP_KERNEL);
704 the_transceiver = twl;
706 twl->irq = TWL4030_PWRIRQ_USB_PRES;
707 twl->otg.set_host = twl4030_set_host;
708 twl->otg.set_peripheral = twl4030_set_peripheral;
709 twl->otg.set_suspend = twl4030_set_suspend;
712 status = request_irq(twl->irq, twl4030_usb_irq, 0, "twl4030_usb", twl);
714 printk(KERN_DEBUG "can't get IRQ %d, err %d\n",
720 #if defined(CONFIG_TWL4030_USB_HS_ULPI)
723 twl4030_usb_ldo_init(twl);
724 twl4030_phy_power(twl, 1);
725 twl4030_i2c_access(1);
726 twl4030_usb_set_mode(twl, twl->usb_mode);
727 if (twl->usb_mode == T2_USB_MODE_ULPI)
728 twl4030_i2c_access(0);
732 if (twl->usb_mode == T2_USB_MODE_ULPI)
733 twl4030_phy_suspend(1);
735 otg_set_transceiver(&twl->otg);
737 printk(KERN_INFO "Initialized TWL4030 USB module\n");
743 static void __exit twl4030_usb_exit(void)
745 struct twl4030_usb *twl = the_transceiver;
749 free_irq(twl->irq, twl);
751 /* set transceiver mode to power on defaults */
752 twl4030_usb_set_mode(twl, -1);
754 /* autogate 60MHz ULPI clock,
755 * clear dpll clock request for i2c access,
758 val = twl4030_usb_read(PHY_CLK_CTRL);
760 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
761 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
762 twl4030_usb_write(PHY_CLK_CTRL, (u8)val);
765 /* disable complete OTG block */
766 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
768 twl4030_phy_power(twl, 0);
773 subsys_initcall(twl4030_usb_init);
774 module_exit(twl4030_usb_exit);
776 MODULE_ALIAS("i2c:twl4030-usb");
777 MODULE_AUTHOR("Texas Instruments, Inc.");
778 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
779 MODULE_LICENSE("GPL");