2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
4 * Copyright (C) 2004-2007 Texas Instruments
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 * - HS USB ULPI mode works.
22 * - 3-pin mode support may be added in future.
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/time.h>
29 #include <linux/interrupt.h>
30 #include <linux/usb.h>
31 #include <linux/usb/ch9.h>
32 #include <linux/usb/gadget.h>
33 #include <linux/usb/otg.h>
34 #include <linux/i2c/twl4030.h>
35 #include <asm/arch/usb.h>
37 /* Register defines */
39 #define VENDOR_ID_LO 0x00
40 #define VENDOR_ID_HI 0x01
41 #define PRODUCT_ID_LO 0x02
42 #define PRODUCT_ID_HI 0x03
44 #define FUNC_CTRL 0x04
45 #define FUNC_CTRL_SET 0x05
46 #define FUNC_CTRL_CLR 0x06
47 #define FUNC_CTRL_SUSPENDM (1 << 6)
48 #define FUNC_CTRL_RESET (1 << 5)
49 #define FUNC_CTRL_OPMODE_MASK (3 << 3) /* bits 3 and 4 */
50 #define FUNC_CTRL_OPMODE_NORMAL (0 << 3)
51 #define FUNC_CTRL_OPMODE_NONDRIVING (1 << 3)
52 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI (2 << 3)
53 #define FUNC_CTRL_TERMSELECT (1 << 2)
54 #define FUNC_CTRL_XCVRSELECT_MASK (3 << 0) /* bits 0 and 1 */
55 #define FUNC_CTRL_XCVRSELECT_HS (0 << 0)
56 #define FUNC_CTRL_XCVRSELECT_FS (1 << 0)
57 #define FUNC_CTRL_XCVRSELECT_LS (2 << 0)
58 #define FUNC_CTRL_XCVRSELECT_FS4LS (3 << 0)
61 #define IFC_CTRL_SET 0x08
62 #define IFC_CTRL_CLR 0x09
63 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE (1 << 7)
64 #define IFC_CTRL_AUTORESUME (1 << 4)
65 #define IFC_CTRL_CLOCKSUSPENDM (1 << 3)
66 #define IFC_CTRL_CARKITMODE (1 << 2)
67 #define IFC_CTRL_FSLSSERIALMODE_3PIN (1 << 1)
70 #define OTG_CTRL_SET 0x0B
71 #define OTG_CTRL_CLR 0x0C
72 #define OTG_CTRL_DRVVBUS (1 << 5)
73 #define OTG_CTRL_CHRGVBUS (1 << 4)
74 #define OTG_CTRL_DISCHRGVBUS (1 << 3)
75 #define OTG_CTRL_DMPULLDOWN (1 << 2)
76 #define OTG_CTRL_DPPULLDOWN (1 << 1)
77 #define OTG_CTRL_IDPULLUP (1 << 0)
79 #define USB_INT_EN_RISE 0x0D
80 #define USB_INT_EN_RISE_SET 0x0E
81 #define USB_INT_EN_RISE_CLR 0x0F
82 #define USB_INT_EN_FALL 0x10
83 #define USB_INT_EN_FALL_SET 0x11
84 #define USB_INT_EN_FALL_CLR 0x12
85 #define USB_INT_STS 0x13
86 #define USB_INT_LATCH 0x14
87 #define USB_INT_IDGND (1 << 4)
88 #define USB_INT_SESSEND (1 << 3)
89 #define USB_INT_SESSVALID (1 << 2)
90 #define USB_INT_VBUSVALID (1 << 1)
91 #define USB_INT_HOSTDISCONNECT (1 << 0)
93 #define CARKIT_CTRL 0x19
94 #define CARKIT_CTRL_SET 0x1A
95 #define CARKIT_CTRL_CLR 0x1B
96 #define CARKIT_CTRL_MICEN (1 << 6)
97 #define CARKIT_CTRL_SPKRIGHTEN (1 << 5)
98 #define CARKIT_CTRL_SPKLEFTEN (1 << 4)
99 #define CARKIT_CTRL_RXDEN (1 << 3)
100 #define CARKIT_CTRL_TXDEN (1 << 2)
101 #define CARKIT_CTRL_IDGNDDRV (1 << 1)
102 #define CARKIT_CTRL_CARKITPWR (1 << 0)
103 #define CARKIT_PLS_CTRL 0x22
104 #define CARKIT_PLS_CTRL_SET 0x23
105 #define CARKIT_PLS_CTRL_CLR 0x24
106 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
107 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
108 #define CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
109 #define CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
111 #define MCPC_CTRL 0x30
112 #define MCPC_CTRL_SET 0x31
113 #define MCPC_CTRL_CLR 0x32
114 #define MCPC_CTRL_RTSOL (1 << 7)
115 #define MCPC_CTRL_EXTSWR (1 << 6)
116 #define MCPC_CTRL_EXTSWC (1 << 5)
117 #define MCPC_CTRL_VOICESW (1 << 4)
118 #define MCPC_CTRL_OUT64K (1 << 3)
119 #define MCPC_CTRL_RTSCTSSW (1 << 2)
120 #define MCPC_CTRL_HS_UART (1 << 0)
122 #define MCPC_IO_CTRL 0x33
123 #define MCPC_IO_CTRL_SET 0x34
124 #define MCPC_IO_CTRL_CLR 0x35
125 #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
126 #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
127 #define MCPC_IO_CTRL_RXD_PU (1 << 3)
128 #define MCPC_IO_CTRL_TXDTYP (1 << 2)
129 #define MCPC_IO_CTRL_CTSTYP (1 << 1)
130 #define MCPC_IO_CTRL_RTSTYP (1 << 0)
132 #define MCPC_CTRL2 0x36
133 #define MCPC_CTRL2_SET 0x37
134 #define MCPC_CTRL2_CLR 0x38
135 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
137 #define OTHER_FUNC_CTRL 0x80
138 #define OTHER_FUNC_CTRL_SET 0x81
139 #define OTHER_FUNC_CTRL_CLR 0x82
140 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
141 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
143 #define OTHER_IFC_CTRL 0x83
144 #define OTHER_IFC_CTRL_SET 0x84
145 #define OTHER_IFC_CTRL_CLR 0x85
146 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
147 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
148 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
149 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
150 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
151 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
153 #define OTHER_INT_EN_RISE 0x86
154 #define OTHER_INT_EN_RISE_SET 0x87
155 #define OTHER_INT_EN_RISE_CLR 0x88
156 #define OTHER_INT_EN_FALL 0x89
157 #define OTHER_INT_EN_FALL_SET 0x8A
158 #define OTHER_INT_EN_FALL_CLR 0x8B
159 #define OTHER_INT_STS 0x8C
160 #define OTHER_INT_LATCH 0x8D
161 #define OTHER_INT_VB_SESS_VLD (1 << 7)
162 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
163 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
164 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
165 #define OTHER_INT_MANU (1 << 1)
166 #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
168 #define ID_STATUS 0x96
169 #define ID_RES_FLOAT (1 << 4)
170 #define ID_RES_440K (1 << 3)
171 #define ID_RES_200K (1 << 2)
172 #define ID_RES_102K (1 << 1)
173 #define ID_RES_GND (1 << 0)
175 #define POWER_CTRL 0xAC
176 #define POWER_CTRL_SET 0xAD
177 #define POWER_CTRL_CLR 0xAE
178 #define POWER_CTRL_OTG_ENAB (1 << 5)
180 #define OTHER_IFC_CTRL2 0xAF
181 #define OTHER_IFC_CTRL2_SET 0xB0
182 #define OTHER_IFC_CTRL2_CLR 0xB1
183 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
184 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
185 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
186 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
187 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
188 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
190 #define REG_CTRL_EN 0xB2
191 #define REG_CTRL_EN_SET 0xB3
192 #define REG_CTRL_EN_CLR 0xB4
193 #define REG_CTRL_ERROR 0xB5
194 #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
196 #define OTHER_FUNC_CTRL2 0xB8
197 #define OTHER_FUNC_CTRL2_SET 0xB9
198 #define OTHER_FUNC_CTRL2_CLR 0xBA
199 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
201 /* following registers do not have separate _clr and _set registers */
202 #define VBUS_DEBOUNCE 0xC0
203 #define ID_DEBOUNCE 0xC1
204 #define VBAT_TIMER 0xD3
205 #define PHY_PWR_CTRL 0xFD
206 #define PHY_PWR_PHYPWD (1 << 0)
207 #define PHY_CLK_CTRL 0xFE
208 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
209 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
210 #define REQ_PHY_DPLL_CLK (1 << 0)
211 #define PHY_CLK_CTRL_STS 0xFF
212 #define PHY_DPLL_CLK (1 << 0)
214 /* In module TWL4030_MODULE_PM_MASTER */
215 #define PROTECT_KEY 0x0E
217 /* In module TWL4030_MODULE_PM_RECEIVER */
218 #define VUSB_DEDICATED1 0x7D
219 #define VUSB_DEDICATED2 0x7E
220 #define VUSB1V5_DEV_GRP 0x71
221 #define VUSB1V5_TYPE 0x72
222 #define VUSB1V5_REMAP 0x73
223 #define VUSB1V8_DEV_GRP 0x74
224 #define VUSB1V8_TYPE 0x75
225 #define VUSB1V8_REMAP 0x76
226 #define VUSB3V1_DEV_GRP 0x77
227 #define VUSB3V1_TYPE 0x78
228 #define VUSB3V1_REMAP 0x79
230 #define ID_STATUS 0x96
231 #define ID_RES_FLOAT (1 << 4) /* mini-B */
232 #define ID_RES_440K (1 << 3) /* type 2 charger */
233 #define ID_RES_200K (1 << 2) /* 5-wire carkit or
235 #define ID_RES_102K (1 << 1) /* phone */
236 #define ID_RES_GND (1 << 0) /* mini-A */
238 /* In module TWL4030_MODULE_INTBR */
240 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
242 /* In module TWL4030_MODULE_INT */
243 #define REG_PWR_ISR1 0x00
244 #define REG_PWR_IMR1 0x01
245 #define USB_PRES (1 << 2)
246 #define REG_PWR_EDR1 0x05
247 #define USB_PRES_FALLING (1 << 4)
248 #define USB_PRES_RISING (1 << 5)
249 #define REG_PWR_SIH_CTRL 0x07
252 /* internal define on top of container_of */
253 #define xceiv_to_twl(x) container_of((x), struct twl4030_usb, otg);
255 /* bits in OTG_CTRL_REG */
257 #define OTG_XCEIV_OUTPUTS \
258 (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
259 #define OTG_XCEIV_INPUTS \
260 (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
261 #define OTG_CTRL_BITS \
262 (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
263 /* and OTG_PULLUP is sometimes written */
265 #define OTG_CTRL_MASK (OTG_DRIVER_SEL| \
266 OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
270 /*-------------------------------------------------------------------------*/
273 struct otg_transceiver otg;
275 u8 usb_mode; /* pin configuration */
276 #define T2_USB_MODE_ULPI 1
277 /* #define T2_USB_MODE_CEA2011_3PIN 2 */
281 static struct twl4030_usb *the_transceiver;
283 /*-------------------------------------------------------------------------*/
285 static int twl4030_i2c_write_u8_verify(u8 module, u8 data, u8 address)
289 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
290 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
293 /* Failed once: Try again */
294 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
295 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
298 /* Failed again: Return error */
302 #define twl4030_usb_write_verify(address, data) \
303 twl4030_i2c_write_u8_verify(TWL4030_MODULE_USB, (data), (address))
305 static inline int twl4030_usb_write(u8 address, u8 data)
308 ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
312 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
314 printk(KERN_ERR "re-read failed\n");
317 "Write %s wrote %x read %x from reg %x\n",
318 (data1 == data) ? "succeed" : "mismatch",
319 data, data1, address);
323 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
328 static inline int twl4030_usb_read(u8 address)
332 ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
337 "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
342 /*-------------------------------------------------------------------------*/
345 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
347 return twl4030_usb_write(reg + 1, bits);
351 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
353 return twl4030_usb_write(reg + 2, bits);
357 /*-------------------------------------------------------------------------*/
359 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
361 twl->usb_mode = mode;
364 case T2_USB_MODE_ULPI:
365 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
366 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
367 twl4030_usb_clear_bits(twl, FUNC_CTRL,
368 FUNC_CTRL_XCVRSELECT_MASK |
369 FUNC_CTRL_OPMODE_MASK);
372 case T2_USB_MODE_CEA2011_3PIN:
373 twl4030_cea2011_3_pin_FS_setup(twl);
377 /* FIXME: power on defaults */
382 #ifdef CONFIG_TWL4030_USB_HS_ULPI
383 static void hs_usb_init(struct twl4030_usb *twl)
385 twl->usb_mode = T2_USB_MODE_ULPI;
391 static void twl4030_i2c_access(int on)
393 unsigned long timeout;
394 int val = twl4030_usb_read(PHY_CLK_CTRL);
398 /* enable DPLL to access PHY registers over I2C */
399 val |= REQ_PHY_DPLL_CLK;
400 if (twl4030_usb_write_verify(PHY_CLK_CTRL,
402 printk(KERN_ERR "twl4030_usb: i2c write failed,"
403 " line %d\n", __LINE__);
407 timeout = jiffies + HZ;
408 while (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
410 && time_before(jiffies, timeout))
412 if (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
414 printk(KERN_ERR "Timeout setting T2 HSUSB "
417 /* let ULPI control the DPLL clock */
418 val &= ~REQ_PHY_DPLL_CLK;
419 if (twl4030_usb_write_verify(PHY_CLK_CTRL,
421 printk(KERN_ERR "twl4030_usb: i2c write failed,"
422 " line %d\n", __LINE__);
429 static void usb_irq_enable(int rising, int falling)
434 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
435 printk(KERN_ERR "twl4030_usb: i2c read failed,"
436 " line %d\n", __LINE__);
439 val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
441 val = val | USB_PRES_RISING;
443 val = val | USB_PRES_FALLING;
444 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
446 printk(KERN_ERR "twl4030_usb: i2c write failed,"
447 " line %d\n", __LINE__);
451 /* un-mask interrupt */
452 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
453 printk(KERN_ERR "twl4030_usb: i2c read failed,"
454 " line %d\n", __LINE__);
458 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
460 printk(KERN_ERR "twl4030_usb: i2c write failed,"
461 " line %d\n", __LINE__);
466 static void usb_irq_disable(void)
470 /* undo edge setup */
471 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
472 printk(KERN_ERR "twl4030_usb: i2c read failed,"
473 " line %d\n", __LINE__);
476 val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
477 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
479 printk(KERN_ERR "twl4030_usb: i2c write failed,"
480 " line %d\n", __LINE__);
485 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
486 printk(KERN_ERR "twl4030_usb: i2c read failed,"
487 " line %d\n", __LINE__);
491 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
493 printk(KERN_ERR "twl4030_usb: i2c write failed,"
494 " line %d\n", __LINE__);
499 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
503 pwr = twl4030_usb_read(PHY_PWR_CTRL);
505 pwr &= ~PHY_PWR_PHYPWD;
506 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
507 printk(KERN_ERR "twl4030_usb: i2c write failed,"
508 " line %d\n", __LINE__);
511 twl4030_usb_write(PHY_CLK_CTRL,
512 twl4030_usb_read(PHY_CLK_CTRL) |
513 (PHY_CLK_CTRL_CLOCKGATING_EN |
514 PHY_CLK_CTRL_CLK32K_EN));
516 pwr |= PHY_PWR_PHYPWD;
517 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
518 printk(KERN_ERR "twl4030_usb: i2c write failed,"
519 " line %d\n", __LINE__);
525 static void twl4030_phy_suspend(int controller_off)
527 struct twl4030_usb *twl = the_transceiver;
536 /* enable rising edge interrupt to detect cable attach */
537 usb_irq_enable(1, 0);
539 twl4030_phy_power(twl, 0);
544 static void twl4030_phy_resume(void)
546 struct twl4030_usb *twl = the_transceiver;
551 /* enable falling edge interrupt to detect cable detach */
552 usb_irq_enable(0, 1);
554 twl4030_phy_power(twl, 1);
555 twl4030_i2c_access(1);
556 twl4030_usb_set_mode(twl, twl->usb_mode);
557 if (twl->usb_mode == T2_USB_MODE_ULPI)
558 twl4030_i2c_access(0);
563 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
565 /* Enable writing to power configuration registers */
566 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
567 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
569 /* put VUSB3V1 LDO in active state */
570 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
572 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
573 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
575 /* turn on 3.1V regulator */
576 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
577 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
579 /* turn on 1.5V regulator */
580 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
581 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
583 /* turn on 1.8V regulator */
584 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
585 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
587 /* disable access to power configuration registers */
588 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, PROTECT_KEY);
591 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
596 /* action based on cable attach or detach */
597 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
598 printk(KERN_ERR "twl4030_usb: i2c read failed,"
599 " line %d\n", __LINE__);
603 if (val & USB_PRES_RISING)
604 twl4030_phy_resume();
606 twl4030_phy_suspend(0);
614 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
617 twl4030_phy_suspend(1);
619 twl4030_phy_resume();
624 static int twl4030_set_peripheral(struct otg_transceiver *xceiv,
625 struct usb_gadget *gadget)
627 struct twl4030_usb *twl = xceiv_to_twl(xceiv);
634 twl4030_phy_suspend(1);
635 twl->otg.gadget = NULL;
640 twl->otg.gadget = gadget;
641 twl4030_phy_resume();
643 OTG_CTRL_REG = (OTG_CTRL_REG & OTG_CTRL_MASK
644 & ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS))
647 twl->otg.state = OTG_STATE_B_IDLE;
649 twl4030_usb_set_bits(twl, USB_INT_EN_RISE,
650 USB_INT_SESSVALID | USB_INT_VBUSVALID);
651 twl4030_usb_set_bits(twl, USB_INT_EN_FALL,
652 USB_INT_SESSVALID | USB_INT_VBUSVALID);
657 static int twl4030_set_host(struct otg_transceiver *xceiv, struct usb_bus *host)
659 struct twl4030_usb *twl = xceiv_to_twl(xceiv);
666 twl4030_phy_suspend(1);
667 twl->otg.host = NULL;
672 twl->otg.host = host;
673 twl4030_phy_resume();
675 twl4030_usb_set_bits(twl, OTG_CTRL,
676 OTG_CTRL_DMPULLDOWN | OTG_CTRL_DPPULLDOWN);
677 twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND);
678 twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND);
679 twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM);
680 twl4030_usb_set_bits(twl, OTG_CTRL, OTG_CTRL_DRVVBUS);
685 static int __init twl4030_usb_init(void)
687 struct twl4030_usb *twl;
693 twl = kzalloc(sizeof *twl, GFP_KERNEL);
697 the_transceiver = twl;
699 twl->irq = TWL4030_PWRIRQ_USB_PRES;
700 twl->otg.set_host = twl4030_set_host;
701 twl->otg.set_peripheral = twl4030_set_peripheral;
702 twl->otg.set_suspend = twl4030_set_suspend;
705 status = request_irq(twl->irq, twl4030_usb_irq, 0, "twl4030_usb", twl);
707 printk(KERN_DEBUG "can't get IRQ %d, err %d\n",
713 #if defined(CONFIG_TWL4030_USB_HS_ULPI)
716 twl4030_usb_ldo_init(twl);
717 twl4030_phy_power(twl, 1);
718 twl4030_i2c_access(1);
719 twl4030_usb_set_mode(twl, twl->usb_mode);
720 if (twl->usb_mode == T2_USB_MODE_ULPI)
721 twl4030_i2c_access(0);
725 if (twl->usb_mode == T2_USB_MODE_ULPI)
726 twl4030_phy_suspend(1);
728 otg_set_transceiver(&twl->otg);
730 printk(KERN_INFO "Initialized TWL4030 USB module\n");
736 static void __exit twl4030_usb_exit(void)
738 struct twl4030_usb *twl = the_transceiver;
742 free_irq(twl->irq, twl);
744 /* set transceiver mode to power on defaults */
745 twl4030_usb_set_mode(twl, -1);
747 /* autogate 60MHz ULPI clock,
748 * clear dpll clock request for i2c access,
751 val = twl4030_usb_read(PHY_CLK_CTRL);
753 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
754 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
755 twl4030_usb_write(PHY_CLK_CTRL, (u8)val);
758 /* disable complete OTG block */
759 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
761 twl4030_phy_power(twl, 0);
766 subsys_initcall(twl4030_usb_init);
767 module_exit(twl4030_usb_exit);
769 MODULE_AUTHOR("Texas Instruments, Inc.");
770 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
771 MODULE_LICENSE("GPL");