2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
9 * Special Thanks to Mark for his Six years of work.
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
32 * Use "hdparm -i" to view modes supported by a given drive.
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
73 * ATA-66/100 and recovery functions, I forgot the rest......
77 #include <linux/module.h>
78 #include <linux/types.h>
79 #include <linux/kernel.h>
80 #include <linux/timer.h>
82 #include <linux/interrupt.h>
83 #include <linux/pci.h>
84 #include <linux/init.h>
85 #include <linux/ide.h>
86 #include <linux/delay.h>
87 #include <linux/scatterlist.h>
92 static const struct drive_list_entry drive_whitelist [] = {
94 { "Micropolis 2112A" , NULL },
95 { "CONNER CTMA 4000" , NULL },
96 { "CONNER CTT8000-A" , NULL },
97 { "ST34342A" , NULL },
101 static const struct drive_list_entry drive_blacklist [] = {
103 { "WDC AC11000H" , NULL },
104 { "WDC AC22100H" , NULL },
105 { "WDC AC32500H" , NULL },
106 { "WDC AC33100H" , NULL },
107 { "WDC AC31600H" , NULL },
108 { "WDC AC32100H" , "24.09P07" },
109 { "WDC AC23200L" , "21.10N21" },
110 { "Compaq CRD-8241B" , NULL },
111 { "CRD-8400B" , NULL },
112 { "CRD-8480B", NULL },
113 { "CRD-8482B", NULL },
115 { "SanDisk SDP3B" , NULL },
116 { "SanDisk SDP3B-64" , NULL },
117 { "SANYO CD-ROM CRD" , NULL },
118 { "HITACHI CDR-8" , NULL },
119 { "HITACHI CDR-8335" , NULL },
120 { "HITACHI CDR-8435" , NULL },
121 { "Toshiba CD-ROM XM-6202B" , NULL },
122 { "TOSHIBA CD-ROM XM-1702BC", NULL },
123 { "CD-532E-A" , NULL },
124 { "E-IDE CD-ROM CR-840", NULL },
125 { "CD-ROM Drive/F5A", NULL },
126 { "WPI CDD-820", NULL },
127 { "SAMSUNG CD-ROM SC-148C", NULL },
128 { "SAMSUNG CD-ROM SC", NULL },
129 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
130 { "_NEC DV5800A", NULL },
131 { "SAMSUNG CD-ROM SN-124", "N001" },
132 { "Seagate STT20000A", NULL },
133 { "CD-ROM CDR_U200", "1.09" },
139 * ide_dma_intr - IDE DMA interrupt handler
140 * @drive: the drive the interrupt is for
142 * Handle an interrupt completing a read/write DMA transfer on an
146 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
148 u8 stat = 0, dma_stat = 0;
150 dma_stat = HWIF(drive)->ide_dma_end(drive);
151 stat = HWIF(drive)->INB(IDE_STATUS_REG); /* get drive status */
152 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
154 struct request *rq = HWGROUP(drive)->rq;
159 drv = *(ide_driver_t **)rq->rq_disk->private_data;
160 drv->end_request(drive, 1, rq->nr_sectors);
162 ide_end_request(drive, 1, rq->nr_sectors);
165 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
166 drive->name, dma_stat);
168 return ide_error(drive, "dma_intr", stat);
171 EXPORT_SYMBOL_GPL(ide_dma_intr);
173 static int ide_dma_good_drive(ide_drive_t *drive)
175 return ide_in_drive_list(drive->id, drive_whitelist);
178 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
180 * ide_build_sglist - map IDE scatter gather for DMA I/O
181 * @drive: the drive to build the DMA table for
182 * @rq: the request holding the sg list
184 * Perform the PCI mapping magic necessary to access the source or
185 * target buffers of a request via PCI DMA. The lower layers of the
186 * kernel provide the necessary cache management so that we can
187 * operate in a portable fashion
190 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
192 ide_hwif_t *hwif = HWIF(drive);
193 struct scatterlist *sg = hwif->sg_table;
195 BUG_ON((rq->cmd_type == REQ_TYPE_ATA_TASKFILE) && rq->nr_sectors > 256);
197 ide_map_sg(drive, rq);
199 if (rq_data_dir(rq) == READ)
200 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
202 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
204 return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
207 EXPORT_SYMBOL_GPL(ide_build_sglist);
210 * ide_build_dmatable - build IDE DMA table
212 * ide_build_dmatable() prepares a dma request. We map the command
213 * to get the pci bus addresses of the buffers and then build up
214 * the PRD table that the IDE layer wants to be fed. The code
215 * knows about the 64K wrap bug in the CS5530.
217 * Returns the number of built PRD entries if all went okay,
218 * returns 0 otherwise.
220 * May also be invoked from trm290.c
223 int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
225 ide_hwif_t *hwif = HWIF(drive);
226 unsigned int *table = hwif->dmatable_cpu;
227 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
228 unsigned int count = 0;
230 struct scatterlist *sg;
232 hwif->sg_nents = i = ide_build_sglist(drive, rq);
242 cur_addr = sg_dma_address(sg);
243 cur_len = sg_dma_len(sg);
246 * Fill in the dma table, without crossing any 64kB boundaries.
247 * Most hardware requires 16-bit alignment of all blocks,
248 * but the trm290 requires 32-bit alignment.
252 if (count++ >= PRD_ENTRIES) {
253 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
254 goto use_pio_instead;
256 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
258 if (bcount > cur_len)
260 *table++ = cpu_to_le32(cur_addr);
261 xcount = bcount & 0xffff;
263 xcount = ((xcount >> 2) - 1) << 16;
264 if (xcount == 0x0000) {
266 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
267 * but at least one (e.g. CS5530) misinterprets it as zero (!).
268 * So here we break the 64KB entry into two 32KB entries instead.
270 if (count++ >= PRD_ENTRIES) {
271 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
272 goto use_pio_instead;
274 *table++ = cpu_to_le32(0x8000);
275 *table++ = cpu_to_le32(cur_addr + 0x8000);
278 *table++ = cpu_to_le32(xcount);
290 *--table |= cpu_to_le32(0x80000000);
293 printk(KERN_ERR "%s: empty DMA table?\n", drive->name);
295 pci_unmap_sg(hwif->pci_dev,
298 hwif->sg_dma_direction);
299 return 0; /* revert to PIO for this request */
302 EXPORT_SYMBOL_GPL(ide_build_dmatable);
305 * ide_destroy_dmatable - clean up DMA mapping
306 * @drive: The drive to unmap
308 * Teardown mappings after DMA has completed. This must be called
309 * after the completion of each use of ide_build_dmatable and before
310 * the next use of ide_build_dmatable. Failure to do so will cause
311 * an oops as only one mapping can be live for each target at a given
315 void ide_destroy_dmatable (ide_drive_t *drive)
317 struct pci_dev *dev = HWIF(drive)->pci_dev;
318 struct scatterlist *sg = HWIF(drive)->sg_table;
319 int nents = HWIF(drive)->sg_nents;
321 pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
324 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
327 * config_drive_for_dma - attempt to activate IDE DMA
328 * @drive: the drive to place in DMA mode
330 * If the drive supports at least mode 2 DMA or UDMA of any kind
331 * then attempt to place it into DMA mode. Drives that are known to
332 * support DMA but predate the DMA properties or that are known
333 * to have DMA handling bugs are also set up appropriately based
334 * on the good/bad drive lists.
337 static int config_drive_for_dma (ide_drive_t *drive)
339 ide_hwif_t *hwif = drive->hwif;
340 struct hd_driveid *id = drive->id;
342 if (drive->media != ide_disk) {
343 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
348 * Enable DMA on any drive that has
349 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
351 if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
355 * Enable DMA on any drive that has mode2 DMA
356 * (multi or single) enabled
358 if (id->field_valid & 2) /* regular DMA */
359 if ((id->dma_mword & 0x404) == 0x404 ||
360 (id->dma_1word & 0x404) == 0x404)
363 /* Consult the list of known "good" drives */
364 if (ide_dma_good_drive(drive))
371 * dma_timer_expiry - handle a DMA timeout
372 * @drive: Drive that timed out
374 * An IDE DMA transfer timed out. In the event of an error we ask
375 * the driver to resolve the problem, if a DMA transfer is still
376 * in progress we continue to wait (arguably we need to add a
377 * secondary 'I don't care what the drive thinks' timeout here)
378 * Finally if we have an interrupt we let it complete the I/O.
379 * But only one time - we clear expiry and if it's still not
380 * completed after WAIT_CMD, we error and retry in PIO.
381 * This can occur if an interrupt is lost or due to hang or bugs.
384 static int dma_timer_expiry (ide_drive_t *drive)
386 ide_hwif_t *hwif = HWIF(drive);
387 u8 dma_stat = hwif->INB(hwif->dma_status);
389 printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
390 drive->name, dma_stat);
392 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
395 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
397 /* 1 dmaing, 2 error, 4 intr */
398 if (dma_stat & 2) /* ERROR */
401 if (dma_stat & 1) /* DMAing */
404 if (dma_stat & 4) /* Got an Interrupt */
407 return 0; /* Status is unknown -- reset the bus */
411 * ide_dma_host_set - Enable/disable DMA on a host
412 * @drive: drive to control
414 * Enable/disable DMA on an IDE controller following generic
415 * bus-mastering IDE controller behaviour.
418 void ide_dma_host_set(ide_drive_t *drive, int on)
420 ide_hwif_t *hwif = HWIF(drive);
421 u8 unit = (drive->select.b.unit & 0x01);
422 u8 dma_stat = hwif->INB(hwif->dma_status);
425 dma_stat |= (1 << (5 + unit));
427 dma_stat &= ~(1 << (5 + unit));
429 hwif->OUTB(dma_stat, hwif->dma_status);
432 EXPORT_SYMBOL_GPL(ide_dma_host_set);
433 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
436 * ide_dma_off_quietly - Generic DMA kill
437 * @drive: drive to control
439 * Turn off the current DMA on this IDE controller.
442 void ide_dma_off_quietly(ide_drive_t *drive)
444 drive->using_dma = 0;
445 ide_toggle_bounce(drive, 0);
447 drive->hwif->dma_host_set(drive, 0);
450 EXPORT_SYMBOL(ide_dma_off_quietly);
453 * ide_dma_off - disable DMA on a device
454 * @drive: drive to disable DMA on
456 * Disable IDE DMA for a device on this IDE controller.
457 * Inform the user that DMA has been disabled.
460 void ide_dma_off(ide_drive_t *drive)
462 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
463 ide_dma_off_quietly(drive);
466 EXPORT_SYMBOL(ide_dma_off);
469 * ide_dma_on - Enable DMA on a device
470 * @drive: drive to enable DMA on
472 * Enable IDE DMA for a device on this IDE controller.
475 void ide_dma_on(ide_drive_t *drive)
477 drive->using_dma = 1;
478 ide_toggle_bounce(drive, 1);
480 drive->hwif->dma_host_set(drive, 1);
483 EXPORT_SYMBOL(ide_dma_on);
485 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
487 * ide_dma_setup - begin a DMA phase
488 * @drive: target device
490 * Build an IDE DMA PRD (IDE speak for scatter gather table)
491 * and then set up the DMA transfer registers for a device
492 * that follows generic IDE PCI DMA behaviour. Controllers can
493 * override this function if they need to
495 * Returns 0 on success. If a PIO fallback is required then 1
499 int ide_dma_setup(ide_drive_t *drive)
501 ide_hwif_t *hwif = drive->hwif;
502 struct request *rq = HWGROUP(drive)->rq;
503 unsigned int reading;
511 /* fall back to pio! */
512 if (!ide_build_dmatable(drive, rq)) {
513 ide_map_sg(drive, rq);
519 writel(hwif->dmatable_dma, (void __iomem *)hwif->dma_prdtable);
521 outl(hwif->dmatable_dma, hwif->dma_prdtable);
524 hwif->OUTB(reading, hwif->dma_command);
526 /* read dma_status for INTR & ERROR flags */
527 dma_stat = hwif->INB(hwif->dma_status);
529 /* clear INTR & ERROR flags */
530 hwif->OUTB(dma_stat|6, hwif->dma_status);
531 drive->waiting_for_dma = 1;
535 EXPORT_SYMBOL_GPL(ide_dma_setup);
537 static void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
539 /* issue cmd to drive */
540 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
543 void ide_dma_start(ide_drive_t *drive)
545 ide_hwif_t *hwif = HWIF(drive);
546 u8 dma_cmd = hwif->INB(hwif->dma_command);
548 /* Note that this is done *after* the cmd has
549 * been issued to the drive, as per the BM-IDE spec.
550 * The Promise Ultra33 doesn't work correctly when
551 * we do this part before issuing the drive cmd.
554 hwif->OUTB(dma_cmd|1, hwif->dma_command);
559 EXPORT_SYMBOL_GPL(ide_dma_start);
561 /* returns 1 on error, 0 otherwise */
562 int __ide_dma_end (ide_drive_t *drive)
564 ide_hwif_t *hwif = HWIF(drive);
565 u8 dma_stat = 0, dma_cmd = 0;
567 drive->waiting_for_dma = 0;
568 /* get dma_command mode */
569 dma_cmd = hwif->INB(hwif->dma_command);
571 hwif->OUTB(dma_cmd&~1, hwif->dma_command);
573 dma_stat = hwif->INB(hwif->dma_status);
574 /* clear the INTR & ERROR bits */
575 hwif->OUTB(dma_stat|6, hwif->dma_status);
576 /* purge DMA mappings */
577 ide_destroy_dmatable(drive);
578 /* verify good DMA status */
581 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
584 EXPORT_SYMBOL(__ide_dma_end);
586 /* returns 1 if dma irq issued, 0 otherwise */
587 static int __ide_dma_test_irq(ide_drive_t *drive)
589 ide_hwif_t *hwif = HWIF(drive);
590 u8 dma_stat = hwif->INB(hwif->dma_status);
592 /* return 1 if INTR asserted */
593 if ((dma_stat & 4) == 4)
595 if (!drive->waiting_for_dma)
596 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
597 drive->name, __FUNCTION__);
601 static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
602 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
604 int __ide_dma_bad_drive (ide_drive_t *drive)
606 struct hd_driveid *id = drive->id;
608 int blacklist = ide_in_drive_list(id, drive_blacklist);
610 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
611 drive->name, id->model);
617 EXPORT_SYMBOL(__ide_dma_bad_drive);
619 static const u8 xfer_mode_bases[] = {
625 static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
627 struct hd_driveid *id = drive->id;
628 ide_hwif_t *hwif = drive->hwif;
629 unsigned int mask = 0;
633 if ((id->field_valid & 4) == 0)
636 if (hwif->udma_filter)
637 mask = hwif->udma_filter(drive);
639 mask = hwif->ultra_mask;
640 mask &= id->dma_ultra;
643 * avoid false cable warning from eighty_ninty_three()
645 if (req_mode > XFER_UDMA_2) {
646 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
651 if ((id->field_valid & 2) == 0)
653 if (hwif->mdma_filter)
654 mask = hwif->mdma_filter(drive);
656 mask = hwif->mwdma_mask;
657 mask &= id->dma_mword;
660 if (id->field_valid & 2) {
661 mask = id->dma_1word & hwif->swdma_mask;
662 } else if (id->tDMA) {
664 * ide_fix_driveid() doesn't convert ->tDMA to the
665 * CPU endianness so we need to do it here
667 u8 mode = le16_to_cpu(id->tDMA);
670 * if the mode is valid convert it to the mask
671 * (the maximum allowed mode is XFER_SW_DMA_2)
674 mask = ((2 << mode) - 1) & hwif->swdma_mask;
686 * ide_find_dma_mode - compute DMA speed
688 * @req_mode: requested mode
690 * Checks the drive/host capabilities and finds the speed to use for
691 * the DMA transfer. The speed is then limited by the requested mode.
693 * Returns 0 if the drive/host combination is incapable of DMA transfers
694 * or if the requested mode is not a DMA mode.
697 u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
699 ide_hwif_t *hwif = drive->hwif;
704 if (drive->media != ide_disk) {
705 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
709 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
710 if (req_mode < xfer_mode_bases[i])
712 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
715 mode = xfer_mode_bases[i] + x;
720 if (hwif->chipset == ide_acorn && mode == 0) {
724 if (ide_dma_good_drive(drive) && drive->id->eide_dma_time < 150)
725 mode = XFER_MW_DMA_1;
728 mode = min(mode, req_mode);
730 printk(KERN_INFO "%s: %s mode selected\n", drive->name,
731 mode ? ide_xfer_verbose(mode) : "no DMA");
736 EXPORT_SYMBOL_GPL(ide_find_dma_mode);
738 static int ide_tune_dma(ide_drive_t *drive)
740 ide_hwif_t *hwif = drive->hwif;
743 if (noautodma || drive->nodma || (drive->id->capability & 1) == 0)
746 /* consult the list of known "bad" drives */
747 if (__ide_dma_bad_drive(drive))
750 if (ide_id_dma_bug(drive))
753 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
754 return config_drive_for_dma(drive);
756 speed = ide_max_dma_mode(drive);
759 /* is this really correct/needed? */
760 if ((hwif->host_flags & IDE_HFLAG_CY82C693) &&
761 ide_dma_good_drive(drive))
767 if (hwif->host_flags & IDE_HFLAG_NO_SET_MODE)
770 if (ide_set_dma_mode(drive, speed))
776 static int ide_dma_check(ide_drive_t *drive)
778 ide_hwif_t *hwif = drive->hwif;
779 int vdma = (hwif->host_flags & IDE_HFLAG_VDMA)? 1 : 0;
781 if (!vdma && ide_tune_dma(drive))
784 /* TODO: always do PIO fallback */
785 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
788 ide_set_max_pio(drive);
790 return vdma ? 0 : -1;
793 int ide_id_dma_bug(ide_drive_t *drive)
795 struct hd_driveid *id = drive->id;
797 if (id->field_valid & 4) {
798 if ((id->dma_ultra >> 8) && (id->dma_mword >> 8))
800 } else if (id->field_valid & 2) {
801 if ((id->dma_mword >> 8) && (id->dma_1word >> 8))
806 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
810 int ide_set_dma(ide_drive_t *drive)
815 * Force DMAing for the beginning of the check.
816 * Some chipsets appear to do interesting
817 * things, if not checked and cleared.
820 ide_dma_off_quietly(drive);
822 rc = ide_dma_check(drive);
831 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
832 void ide_dma_lost_irq (ide_drive_t *drive)
834 printk("%s: DMA interrupt recovery\n", drive->name);
837 EXPORT_SYMBOL(ide_dma_lost_irq);
839 void ide_dma_timeout (ide_drive_t *drive)
841 ide_hwif_t *hwif = HWIF(drive);
843 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
845 if (hwif->ide_dma_test_irq(drive))
848 hwif->ide_dma_end(drive);
851 EXPORT_SYMBOL(ide_dma_timeout);
853 static void ide_release_dma_engine(ide_hwif_t *hwif)
855 if (hwif->dmatable_cpu) {
856 pci_free_consistent(hwif->pci_dev,
857 PRD_ENTRIES * PRD_BYTES,
860 hwif->dmatable_cpu = NULL;
864 static int ide_release_iomio_dma(ide_hwif_t *hwif)
866 release_region(hwif->dma_base, 8);
867 if (hwif->extra_ports)
868 release_region(hwif->extra_base, hwif->extra_ports);
873 * Needed for allowing full modular support of ide-driver
875 int ide_release_dma(ide_hwif_t *hwif)
877 ide_release_dma_engine(hwif);
882 return ide_release_iomio_dma(hwif);
885 static int ide_allocate_dma_engine(ide_hwif_t *hwif)
887 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
888 PRD_ENTRIES * PRD_BYTES,
889 &hwif->dmatable_dma);
891 if (hwif->dmatable_cpu)
894 printk(KERN_ERR "%s: -- Error, unable to allocate DMA table.\n",
900 static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
902 printk(KERN_INFO " %s: MMIO-DMA ", hwif->name);
907 static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
909 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx",
910 hwif->name, base, base + ports - 1);
912 if (!request_region(base, ports, hwif->name)) {
913 printk(" -- Error, ports in use.\n");
917 if (hwif->cds->extra) {
918 hwif->extra_base = base + (hwif->channel ? 8 : 16);
920 if (!hwif->mate || !hwif->mate->extra_ports) {
921 if (!request_region(hwif->extra_base,
922 hwif->cds->extra, hwif->cds->name)) {
923 printk(" -- Error, extra ports in use.\n");
924 release_region(base, ports);
927 hwif->extra_ports = hwif->cds->extra;
934 static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
937 return ide_mapped_mmio_dma(hwif, base,ports);
939 return ide_iomio_dma(hwif, base, ports);
942 void ide_setup_dma(ide_hwif_t *hwif, unsigned long base, unsigned num_ports)
944 if (ide_dma_iobase(hwif, base, num_ports))
947 if (ide_allocate_dma_engine(hwif)) {
948 ide_release_dma(hwif);
952 hwif->dma_base = base;
954 if (!(hwif->dma_command))
955 hwif->dma_command = hwif->dma_base;
956 if (!(hwif->dma_vendor1))
957 hwif->dma_vendor1 = (hwif->dma_base + 1);
958 if (!(hwif->dma_status))
959 hwif->dma_status = (hwif->dma_base + 2);
960 if (!(hwif->dma_vendor3))
961 hwif->dma_vendor3 = (hwif->dma_base + 3);
962 if (!(hwif->dma_prdtable))
963 hwif->dma_prdtable = (hwif->dma_base + 4);
965 if (!hwif->dma_host_set)
966 hwif->dma_host_set = &ide_dma_host_set;
967 if (!hwif->dma_setup)
968 hwif->dma_setup = &ide_dma_setup;
969 if (!hwif->dma_exec_cmd)
970 hwif->dma_exec_cmd = &ide_dma_exec_cmd;
971 if (!hwif->dma_start)
972 hwif->dma_start = &ide_dma_start;
973 if (!hwif->ide_dma_end)
974 hwif->ide_dma_end = &__ide_dma_end;
975 if (!hwif->ide_dma_test_irq)
976 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
977 if (!hwif->dma_timeout)
978 hwif->dma_timeout = &ide_dma_timeout;
979 if (!hwif->dma_lost_irq)
980 hwif->dma_lost_irq = &ide_dma_lost_irq;
982 if (hwif->chipset != ide_trm290) {
983 u8 dma_stat = hwif->INB(hwif->dma_status);
984 printk(", BIOS settings: %s:%s, %s:%s",
985 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
986 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
991 EXPORT_SYMBOL_GPL(ide_setup_dma);
992 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */