2 * video1394.c - video driver for OHCI 1394 boards
3 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
4 * Peter Schlaile <udbz@rz.uni-karlsruhe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 * EFAULT is only for invalid address for the argp
24 * EINVAL for out of range values
25 * EBUSY when trying to use an already used resource
26 * ESRCH when trying to free/stop a not used resource
27 * EAGAIN for resource allocation failure that could perhaps succeed later
28 * ENOTTY for unsupported ioctl request
31 #include <linux/config.h>
32 #include <linux/kernel.h>
33 #include <linux/list.h>
34 #include <linux/slab.h>
35 #include <linux/interrupt.h>
36 #include <linux/wait.h>
37 #include <linux/errno.h>
38 #include <linux/module.h>
39 #include <linux/init.h>
40 #include <linux/pci.h>
42 #include <linux/poll.h>
43 #include <linux/smp_lock.h>
44 #include <linux/delay.h>
45 #include <linux/devfs_fs_kernel.h>
46 #include <linux/bitops.h>
47 #include <linux/types.h>
48 #include <linux/vmalloc.h>
49 #include <linux/timex.h>
51 #include <linux/ioctl32.h>
52 #include <linux/compat.h>
53 #include <linux/cdev.h>
56 #include "ieee1394_types.h"
58 #include "ieee1394_core.h"
59 #include "highlevel.h"
60 #include "video1394.h"
66 #define ISO_CHANNELS 64
72 quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
77 int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
78 struct ohci1394_iso_tasklet iso_tasklet;
82 int * next_buffer; /* For ISO Transmit of video packets
83 to write the correct SYT field
84 into the next block */
85 unsigned int num_desc;
86 unsigned int buf_size;
87 unsigned int frame_size;
88 unsigned int packet_size;
89 unsigned int left_size;
92 struct dma_region dma;
94 struct dma_prog_region *prg_reg;
96 struct dma_cmd **ir_prg;
97 struct it_dma_prg **it_prg;
99 unsigned int *buffer_status;
100 unsigned int *buffer_prg_assignment;
101 struct timeval *buffer_time; /* time when the buffer was received */
102 unsigned int *last_used_cmd; /* For ISO Transmit with
103 variable sized packets only ! */
108 wait_queue_head_t waitq;
110 unsigned int syt_offset;
113 struct list_head link;
118 struct ti_ohci *ohci;
119 struct list_head context_list;
120 struct dma_iso_ctx *current_ctx;
123 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
124 #define VIDEO1394_DEBUG
131 #ifdef VIDEO1394_DEBUG
132 #define DBGMSG(card, fmt, args...) \
133 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
135 #define DBGMSG(card, fmt, args...)
138 /* print general (card independent) information */
139 #define PRINT_G(level, fmt, args...) \
140 printk(level "video1394: " fmt "\n" , ## args)
142 /* print card specific information */
143 #define PRINT(level, card, fmt, args...) \
144 printk(level "video1394_%d: " fmt "\n" , card , ## args)
146 static void wakeup_dma_ir_ctx(unsigned long l);
147 static void wakeup_dma_it_ctx(unsigned long l);
149 static struct hpsb_highlevel video1394_highlevel;
151 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
155 DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
157 ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
158 if (d->iso_tasklet.link.next != NULL)
159 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
161 dma_region_free(&d->dma);
164 for (i = 0; i < d->num_desc; i++)
165 dma_prog_region_free(&d->prg_reg[i]);
171 kfree(d->buffer_status);
172 kfree(d->buffer_prg_assignment);
173 kfree(d->buffer_time);
174 kfree(d->last_used_cmd);
175 kfree(d->next_buffer);
182 static struct dma_iso_ctx *
183 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
184 int buf_size, int channel, unsigned int packet_size)
186 struct dma_iso_ctx *d;
189 d = kzalloc(sizeof(*d), GFP_KERNEL);
191 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
197 d->channel = channel;
198 d->num_desc = num_desc;
199 d->frame_size = buf_size;
200 d->buf_size = PAGE_ALIGN(buf_size);
202 INIT_LIST_HEAD(&d->link);
203 init_waitqueue_head(&d->waitq);
205 /* Init the regions for easy cleanup */
206 dma_region_init(&d->dma);
208 if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
209 PCI_DMA_BIDIRECTIONAL)) {
210 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
215 if (type == OHCI_ISO_RECEIVE)
216 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
220 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
224 if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
225 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
226 type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
230 d->ctx = d->iso_tasklet.context;
232 d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
234 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
238 /* Makes for easier cleanup */
239 for (i = 0; i < d->num_desc; i++)
240 dma_prog_region_init(&d->prg_reg[i]);
242 if (type == OHCI_ISO_RECEIVE) {
243 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
244 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
245 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
246 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
248 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
252 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
257 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
258 d->left_size = (d->frame_size % PAGE_SIZE) ?
259 d->frame_size % PAGE_SIZE : PAGE_SIZE;
261 for (i = 0;i < d->num_desc; i++) {
262 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
263 sizeof(struct dma_cmd), ohci->dev)) {
264 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
268 d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
271 } else { /* OHCI_ISO_TRANSMIT */
272 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
273 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
274 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
276 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
280 PRINT(KERN_ERR, ohci->host->id,
281 "Failed to allocate dma it prg");
286 d->packet_size = packet_size;
288 if (PAGE_SIZE % packet_size || packet_size>4096) {
289 PRINT(KERN_ERR, ohci->host->id,
290 "Packet size %d (page_size: %ld) "
291 "not yet supported\n",
292 packet_size, PAGE_SIZE);
297 d->nb_cmd = d->frame_size / d->packet_size;
298 if (d->frame_size % d->packet_size) {
300 d->left_size = d->frame_size % d->packet_size;
302 d->left_size = d->packet_size;
304 for (i = 0; i < d->num_desc; i++) {
305 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
306 sizeof(struct it_dma_prg), ohci->dev)) {
307 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
311 d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
316 kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
317 d->buffer_prg_assignment =
318 kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
320 kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
322 kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
324 kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
326 if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
327 !d->last_used_cmd || !d->next_buffer) {
328 PRINT(KERN_ERR, ohci->host->id,
329 "Failed to allocate dma_iso_ctx member");
334 spin_lock_init(&d->lock);
336 PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
337 "of size %d allocated for a frame size %d, each with %d prgs",
338 (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
339 d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
344 static void reset_ir_status(struct dma_iso_ctx *d, int n)
347 d->ir_prg[n][0].status = cpu_to_le32(4);
348 d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
349 for (i = 2; i < d->nb_cmd - 1; i++)
350 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
351 d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
354 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
356 struct dma_cmd *ir_prg = d->ir_prg[n];
357 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
360 d->buffer_prg_assignment[n] = buffer;
362 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
363 (unsigned long)d->dma.kvirt));
364 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
365 (buf + 4) - (unsigned long)d->dma.kvirt));
367 for (i=2;i<d->nb_cmd-1;i++) {
368 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
369 (buf+(i-1)*PAGE_SIZE) -
370 (unsigned long)d->dma.kvirt));
373 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
374 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
375 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
376 (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
379 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
381 struct dma_cmd *ir_prg = d->ir_prg[n];
382 struct dma_prog_region *ir_reg = &d->prg_reg[n];
383 unsigned long buf = (unsigned long)d->dma.kvirt;
386 /* the first descriptor will read only 4 bytes */
387 ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
390 /* set the sync flag */
391 if (flags & VIDEO1394_SYNC_FRAMES)
392 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
394 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
395 (unsigned long)d->dma.kvirt));
396 ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
397 1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
399 /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
401 /* The second descriptor will read PAGE_SIZE-4 bytes */
402 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
403 DMA_CTL_BRANCH | (PAGE_SIZE-4));
404 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
405 (unsigned long)d->dma.kvirt));
406 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
407 2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
409 for (i = 2; i < d->nb_cmd - 1; i++) {
410 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
411 DMA_CTL_BRANCH | PAGE_SIZE);
412 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
413 (buf+(i-1)*PAGE_SIZE) -
414 (unsigned long)d->dma.kvirt));
416 ir_prg[i].branchAddress =
417 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
418 (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
421 /* The last descriptor will generate an interrupt */
422 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
423 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
424 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
425 (buf+(i-1)*PAGE_SIZE) -
426 (unsigned long)d->dma.kvirt));
428 /* Only one DMA page is used. Read d->left_size immediately and */
429 /* generate an interrupt as this is also the last page. */
430 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
431 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
432 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
433 (buf + 4) - (unsigned long)d->dma.kvirt));
437 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
439 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
444 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
446 for (i=0;i<d->num_desc;i++) {
447 initialize_dma_ir_prg(d, i, flags);
448 reset_ir_status(d, i);
451 /* reset the ctrl register */
452 reg_write(ohci, d->ctrlClear, 0xf0000000);
455 reg_write(ohci, d->ctrlSet, 0x80000000);
457 /* Set isoch header */
458 if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
459 reg_write(ohci, d->ctrlSet, 0x40000000);
461 /* Set the context match register to match on all tags,
462 sync for sync tag, and listen to d->channel */
463 reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
465 /* Set up isoRecvIntMask to generate interrupts */
466 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
469 /* find which context is listening to this channel */
470 static struct dma_iso_ctx *
471 find_ctx(struct list_head *list, int type, int channel)
473 struct dma_iso_ctx *ctx;
475 list_for_each_entry(ctx, list, link) {
476 if (ctx->type == type && ctx->channel == channel)
483 static void wakeup_dma_ir_ctx(unsigned long l)
485 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
490 for (i = 0; i < d->num_desc; i++) {
491 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
492 reset_ir_status(d, i);
493 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
494 do_gettimeofday(&d->buffer_time[d->buffer_prg_assignment[i]]);
498 spin_unlock(&d->lock);
500 if (waitqueue_active(&d->waitq))
501 wake_up_interruptible(&d->waitq);
504 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
507 unsigned char* buf = d->dma.kvirt + n * d->buf_size;
515 cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
517 timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
518 timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
519 + (cycleTimer & 0xf000)) & 0xffff;
521 buf[6] = timeStamp >> 8;
522 buf[7] = timeStamp & 0xff;
524 /* if first packet is empty packet, then put timestamp into the next full one too */
525 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
526 buf += d->packet_size;
527 buf[6] = timeStamp >> 8;
528 buf[7] = timeStamp & 0xff;
531 /* do the next buffer frame too in case of irq latency */
532 n = d->next_buffer[n];
536 buf = d->dma.kvirt + n * d->buf_size;
538 timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
540 buf[6] = timeStamp >> 8;
541 buf[7] = timeStamp & 0xff;
543 /* if first packet is empty packet, then put timestamp into the next full one too */
544 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
545 buf += d->packet_size;
546 buf[6] = timeStamp >> 8;
547 buf[7] = timeStamp & 0xff;
551 printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
552 curr, n, cycleTimer, timeStamp);
556 static void wakeup_dma_it_ctx(unsigned long l)
558 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
559 struct ti_ohci *ohci = d->ohci;
564 for (i = 0; i < d->num_desc; i++) {
565 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
566 cpu_to_le32(0xFFFF0000)) {
567 int next = d->next_buffer[i];
568 put_timestamp(ohci, d, next);
569 d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
570 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
574 spin_unlock(&d->lock);
576 if (waitqueue_active(&d->waitq))
577 wake_up_interruptible(&d->waitq);
580 static void reprogram_dma_it_prg(struct dma_iso_ctx *d, int n, int buffer)
582 struct it_dma_prg *it_prg = d->it_prg[n];
583 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
586 d->buffer_prg_assignment[n] = buffer;
587 for (i=0;i<d->nb_cmd;i++) {
588 it_prg[i].end.address =
589 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
590 (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
594 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
596 struct it_dma_prg *it_prg = d->it_prg[n];
597 struct dma_prog_region *it_reg = &d->prg_reg[n];
598 unsigned long buf = (unsigned long)d->dma.kvirt;
600 d->last_used_cmd[n] = d->nb_cmd - 1;
601 for (i=0;i<d->nb_cmd;i++) {
603 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
604 DMA_CTL_IMMEDIATE | 8) ;
605 it_prg[i].begin.address = 0;
607 it_prg[i].begin.status = 0;
609 it_prg[i].data[0] = cpu_to_le32(
610 (IEEE1394_SPEED_100 << 16)
611 | (/* tag */ 1 << 14)
613 | (TCODE_ISO_DATA << 4));
614 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
615 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
616 it_prg[i].data[2] = 0;
617 it_prg[i].data[3] = 0;
619 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
621 it_prg[i].end.address =
622 cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
623 (unsigned long)d->dma.kvirt));
626 it_prg[i].end.control |= cpu_to_le32(d->packet_size);
627 it_prg[i].begin.branchAddress =
628 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
629 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
630 it_prg[i].end.branchAddress =
631 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
632 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
634 /* the last prg generates an interrupt */
635 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
636 DMA_CTL_IRQ | d->left_size);
637 /* the last prg doesn't branch */
638 it_prg[i].begin.branchAddress = 0;
639 it_prg[i].end.branchAddress = 0;
641 it_prg[i].end.status = 0;
645 static void initialize_dma_it_prg_var_packet_queue(
646 struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
647 struct ti_ohci *ohci)
649 struct it_dma_prg *it_prg = d->it_prg[n];
650 struct dma_prog_region *it_reg = &d->prg_reg[n];
655 put_timestamp(ohci, d, n);
658 d->last_used_cmd[n] = d->nb_cmd - 1;
660 for (i = 0; i < d->nb_cmd; i++) {
662 if (packet_sizes[i] > d->packet_size) {
663 size = d->packet_size;
665 size = packet_sizes[i];
667 it_prg[i].data[1] = cpu_to_le32(size << 16);
668 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
670 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
671 it_prg[i].end.control |= cpu_to_le32(size);
672 it_prg[i].begin.branchAddress =
673 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
674 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
675 it_prg[i].end.branchAddress =
676 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
677 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
679 /* the last prg generates an interrupt */
680 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
682 /* the last prg doesn't branch */
683 it_prg[i].begin.branchAddress = 0;
684 it_prg[i].end.branchAddress = 0;
685 d->last_used_cmd[n] = i;
691 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
692 unsigned int syt_offset, int flags)
694 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
698 d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
700 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
702 for (i=0;i<d->num_desc;i++)
703 initialize_dma_it_prg(d, i, sync_tag);
705 /* Set up isoRecvIntMask to generate interrupts */
706 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
709 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
714 spin_lock_irqsave(&d->lock, flags);
715 ret = d->buffer_status[buffer];
716 spin_unlock_irqrestore(&d->lock, flags);
720 static int __video1394_ioctl(struct file *file,
721 unsigned int cmd, unsigned long arg)
723 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
724 struct ti_ohci *ohci = ctx->ohci;
726 void __user *argp = (void __user *)arg;
730 case VIDEO1394_IOC_LISTEN_CHANNEL:
731 case VIDEO1394_IOC_TALK_CHANNEL:
733 struct video1394_mmap v;
735 struct dma_iso_ctx *d;
738 if (copy_from_user(&v, argp, sizeof(v)))
741 /* if channel < 0, find lowest available one */
745 if (i == ISO_CHANNELS) {
746 PRINT(KERN_ERR, ohci->host->id,
747 "No free channel found");
750 if (!(ohci->ISO_channel_usage & mask)) {
752 PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
757 } else if (v.channel >= ISO_CHANNELS) {
758 PRINT(KERN_ERR, ohci->host->id,
759 "Iso channel %d out of bounds", v.channel);
762 mask = (u64)0x1<<v.channel;
764 PRINT(KERN_INFO, ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
765 (u32)(mask>>32),(u32)(mask&0xffffffff),
766 (u32)(ohci->ISO_channel_usage>>32),
767 (u32)(ohci->ISO_channel_usage&0xffffffff));
768 if (ohci->ISO_channel_usage & mask) {
769 PRINT(KERN_ERR, ohci->host->id,
770 "Channel %d is already taken", v.channel);
774 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
775 PRINT(KERN_ERR, ohci->host->id,
776 "Invalid %d length buffer requested",v.buf_size);
780 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
781 PRINT(KERN_ERR, ohci->host->id,
782 "Invalid %d buffers requested",v.nb_buffers);
786 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
787 PRINT(KERN_ERR, ohci->host->id,
788 "%d buffers of size %d bytes is too big",
789 v.nb_buffers, v.buf_size);
793 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
794 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
795 v.nb_buffers + 1, v.buf_size,
799 PRINT(KERN_ERR, ohci->host->id,
800 "Couldn't allocate ir context");
803 initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
805 ctx->current_ctx = d;
807 v.buf_size = d->buf_size;
808 list_add_tail(&d->link, &ctx->context_list);
810 PRINT(KERN_INFO, ohci->host->id,
811 "iso context %d listen on channel %d",
815 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
816 v.nb_buffers + 1, v.buf_size,
817 v.channel, v.packet_size);
820 PRINT(KERN_ERR, ohci->host->id,
821 "Couldn't allocate it context");
824 initialize_dma_it_ctx(d, v.sync_tag,
825 v.syt_offset, v.flags);
827 ctx->current_ctx = d;
829 v.buf_size = d->buf_size;
831 list_add_tail(&d->link, &ctx->context_list);
833 PRINT(KERN_INFO, ohci->host->id,
834 "Iso context %d talk on channel %d", d->ctx,
838 if (copy_to_user(argp, &v, sizeof(v))) {
839 /* FIXME : free allocated dma resources */
843 ohci->ISO_channel_usage |= mask;
847 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
848 case VIDEO1394_IOC_UNTALK_CHANNEL:
852 struct dma_iso_ctx *d;
854 if (copy_from_user(&channel, argp, sizeof(int)))
857 if (channel < 0 || channel >= ISO_CHANNELS) {
858 PRINT(KERN_ERR, ohci->host->id,
859 "Iso channel %d out of bound", channel);
862 mask = (u64)0x1<<channel;
863 if (!(ohci->ISO_channel_usage & mask)) {
864 PRINT(KERN_ERR, ohci->host->id,
865 "Channel %d is not being used", channel);
869 /* Mark this channel as unused */
870 ohci->ISO_channel_usage &= ~mask;
872 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
873 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
875 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
877 if (d == NULL) return -ESRCH;
878 PRINT(KERN_INFO, ohci->host->id, "Iso context %d "
879 "stop talking on channel %d", d->ctx, channel);
884 case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
886 struct video1394_wait v;
887 struct dma_iso_ctx *d;
890 if (copy_from_user(&v, argp, sizeof(v)))
893 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
894 if (d == NULL) return -EFAULT;
896 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
897 PRINT(KERN_ERR, ohci->host->id,
898 "Buffer %d out of range",v.buffer);
902 spin_lock_irqsave(&d->lock,flags);
904 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
905 PRINT(KERN_ERR, ohci->host->id,
906 "Buffer %d is already used",v.buffer);
907 spin_unlock_irqrestore(&d->lock,flags);
911 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
913 next_prg = (d->last_buffer + 1) % d->num_desc;
914 if (d->last_buffer>=0)
915 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
916 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
917 & 0xfffffff0) | 0x1);
919 d->last_buffer = next_prg;
920 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
922 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
924 spin_unlock_irqrestore(&d->lock,flags);
926 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
928 DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
930 /* Tell the controller where the first program is */
931 reg_write(ohci, d->cmdPtr,
932 dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
935 reg_write(ohci, d->ctrlSet, 0x8000);
938 /* Wake up dma context if necessary */
939 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
940 PRINT(KERN_INFO, ohci->host->id,
941 "Waking up iso dma ctx=%d", d->ctx);
942 reg_write(ohci, d->ctrlSet, 0x1000);
948 case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
949 case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
951 struct video1394_wait v;
952 struct dma_iso_ctx *d;
955 if (copy_from_user(&v, argp, sizeof(v)))
958 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
959 if (d == NULL) return -EFAULT;
961 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
962 PRINT(KERN_ERR, ohci->host->id,
963 "Buffer %d out of range",v.buffer);
968 * I change the way it works so that it returns
969 * the last received frame.
971 spin_lock_irqsave(&d->lock, flags);
972 switch(d->buffer_status[v.buffer]) {
973 case VIDEO1394_BUFFER_READY:
974 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
976 case VIDEO1394_BUFFER_QUEUED:
977 if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
978 /* for polling, return error code EINTR */
979 spin_unlock_irqrestore(&d->lock, flags);
983 spin_unlock_irqrestore(&d->lock, flags);
984 wait_event_interruptible(d->waitq,
985 video1394_buffer_state(d, v.buffer) ==
986 VIDEO1394_BUFFER_READY);
987 if (signal_pending(current))
989 spin_lock_irqsave(&d->lock, flags);
990 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
993 PRINT(KERN_ERR, ohci->host->id,
994 "Buffer %d is not queued",v.buffer);
995 spin_unlock_irqrestore(&d->lock, flags);
999 /* set time of buffer */
1000 v.filltime = d->buffer_time[v.buffer];
1003 * Look ahead to see how many more buffers have been received
1006 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1007 VIDEO1394_BUFFER_READY) {
1008 v.buffer=(v.buffer+1)%(d->num_desc - 1);
1011 spin_unlock_irqrestore(&d->lock, flags);
1014 if (copy_to_user(argp, &v, sizeof(v)))
1019 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1021 struct video1394_wait v;
1022 unsigned int *psizes = NULL;
1023 struct dma_iso_ctx *d;
1026 if (copy_from_user(&v, argp, sizeof(v)))
1029 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1030 if (d == NULL) return -EFAULT;
1032 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1033 PRINT(KERN_ERR, ohci->host->id,
1034 "Buffer %d out of range",v.buffer);
1038 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1039 int buf_size = d->nb_cmd * sizeof(*psizes);
1040 struct video1394_queue_variable __user *p = argp;
1041 unsigned int __user *qv;
1043 if (get_user(qv, &p->packet_sizes))
1046 psizes = kmalloc(buf_size, GFP_KERNEL);
1050 if (copy_from_user(psizes, qv, buf_size)) {
1056 spin_lock_irqsave(&d->lock,flags);
1058 /* last_buffer is last_prg */
1059 next_prg = (d->last_buffer + 1) % d->num_desc;
1060 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1061 PRINT(KERN_ERR, ohci->host->id,
1062 "Buffer %d is already used",v.buffer);
1063 spin_unlock_irqrestore(&d->lock,flags);
1068 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1069 initialize_dma_it_prg_var_packet_queue(
1070 d, next_prg, psizes, ohci);
1073 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1075 if (d->last_buffer >= 0) {
1076 d->it_prg[d->last_buffer]
1077 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1078 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1079 0) & 0xfffffff0) | 0x3);
1081 d->it_prg[d->last_buffer]
1082 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1083 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1084 0) & 0xfffffff0) | 0x3);
1085 d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1087 d->last_buffer = next_prg;
1088 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1089 d->next_buffer[d->last_buffer] = -1;
1091 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1093 spin_unlock_irqrestore(&d->lock,flags);
1095 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1097 DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1099 put_timestamp(ohci, d, d->last_buffer);
1101 /* Tell the controller where the first program is */
1102 reg_write(ohci, d->cmdPtr,
1103 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1105 /* Run IT context */
1106 reg_write(ohci, d->ctrlSet, 0x8000);
1109 /* Wake up dma context if necessary */
1110 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1111 PRINT(KERN_INFO, ohci->host->id,
1112 "Waking up iso transmit dma ctx=%d",
1114 put_timestamp(ohci, d, d->last_buffer);
1115 reg_write(ohci, d->ctrlSet, 0x1000);
1123 case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1125 struct video1394_wait v;
1126 struct dma_iso_ctx *d;
1128 if (copy_from_user(&v, argp, sizeof(v)))
1131 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1132 if (d == NULL) return -EFAULT;
1134 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1135 PRINT(KERN_ERR, ohci->host->id,
1136 "Buffer %d out of range",v.buffer);
1140 switch(d->buffer_status[v.buffer]) {
1141 case VIDEO1394_BUFFER_READY:
1142 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1144 case VIDEO1394_BUFFER_QUEUED:
1145 wait_event_interruptible(d->waitq,
1146 (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1147 if (signal_pending(current))
1149 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1152 PRINT(KERN_ERR, ohci->host->id,
1153 "Buffer %d is not queued",v.buffer);
1162 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1166 err = __video1394_ioctl(file, cmd, arg);
1172 * This maps the vmalloced and reserved buffer to user space.
1175 * - PAGE_READONLY should suffice!?
1176 * - remap_pfn_range is kind of inefficient for page by page remapping.
1177 * But e.g. pte_alloc() does not work in modules ... :-(
1180 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1182 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1186 if (ctx->current_ctx == NULL) {
1187 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1189 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1195 static int video1394_open(struct inode *inode, struct file *file)
1197 int i = ieee1394_file_to_instance(file);
1198 struct ti_ohci *ohci;
1199 struct file_ctx *ctx;
1201 ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1205 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1207 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1212 INIT_LIST_HEAD(&ctx->context_list);
1213 ctx->current_ctx = NULL;
1214 file->private_data = ctx;
1219 static int video1394_release(struct inode *inode, struct file *file)
1221 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1222 struct ti_ohci *ohci = ctx->ohci;
1223 struct list_head *lh, *next;
1227 list_for_each_safe(lh, next, &ctx->context_list) {
1228 struct dma_iso_ctx *d;
1229 d = list_entry(lh, struct dma_iso_ctx, link);
1230 mask = (u64) 1 << d->channel;
1232 if (!(ohci->ISO_channel_usage & mask))
1233 PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1234 "is not being used", d->channel);
1236 ohci->ISO_channel_usage &= ~mask;
1237 PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context "
1238 "%d stop listening on channel %d",
1239 d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1240 d->ctx, d->channel);
1241 free_dma_iso_ctx(d);
1245 file->private_data = NULL;
1251 #ifdef CONFIG_COMPAT
1252 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1255 static struct cdev video1394_cdev;
1256 static struct file_operations video1394_fops=
1258 .owner = THIS_MODULE,
1259 .unlocked_ioctl = video1394_ioctl,
1260 #ifdef CONFIG_COMPAT
1261 .compat_ioctl = video1394_compat_ioctl,
1263 .mmap = video1394_mmap,
1264 .open = video1394_open,
1265 .release = video1394_release
1268 /*** HOTPLUG STUFF **********************************************************/
1270 * Export information about protocols/devices supported by this driver.
1272 static struct ieee1394_device_id video1394_id_table[] = {
1274 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1275 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1276 .version = CAMERA_SW_VERSION_ENTRY & 0xffffff
1279 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1280 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1281 .version = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1284 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1285 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1286 .version = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1291 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1293 static struct hpsb_protocol_driver video1394_driver = {
1294 .name = "1394 Digital Camera Driver",
1295 .id_table = video1394_id_table,
1297 .name = VIDEO1394_DRIVER_NAME,
1298 .bus = &ieee1394_bus_type,
1303 static void video1394_add_host (struct hpsb_host *host)
1305 struct ti_ohci *ohci;
1308 /* We only work with the OHCI-1394 driver */
1309 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1312 ohci = (struct ti_ohci *)host->hostdata;
1314 if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1315 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1319 hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1320 hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1322 minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1323 class_device_create(hpsb_protocol_class, NULL, MKDEV(
1324 IEEE1394_MAJOR, minor),
1325 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1326 devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor),
1327 S_IFCHR | S_IRUSR | S_IWUSR,
1328 "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1332 static void video1394_remove_host (struct hpsb_host *host)
1334 struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1337 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1338 IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1339 devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1346 static struct hpsb_highlevel video1394_highlevel = {
1347 .name = VIDEO1394_DRIVER_NAME,
1348 .add_host = video1394_add_host,
1349 .remove_host = video1394_remove_host,
1352 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1353 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1354 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1355 MODULE_LICENSE("GPL");
1357 #ifdef CONFIG_COMPAT
1359 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER \
1360 _IOW ('#', 0x12, struct video1394_wait32)
1361 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER \
1362 _IOWR('#', 0x13, struct video1394_wait32)
1363 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER \
1364 _IOW ('#', 0x17, struct video1394_wait32)
1365 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER \
1366 _IOWR('#', 0x18, struct video1394_wait32)
1368 struct video1394_wait32 {
1371 struct compat_timeval filltime;
1374 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1376 struct video1394_wait32 __user *argp = (void __user *)arg;
1377 struct video1394_wait32 wait32;
1378 struct video1394_wait wait;
1379 mm_segment_t old_fs;
1382 if (copy_from_user(&wait32, argp, sizeof(wait32)))
1385 wait.channel = wait32.channel;
1386 wait.buffer = wait32.buffer;
1387 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1388 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1392 if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1393 ret = video1394_ioctl(file,
1394 VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1395 (unsigned long) &wait);
1397 ret = video1394_ioctl(file,
1398 VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1399 (unsigned long) &wait);
1403 wait32.channel = wait.channel;
1404 wait32.buffer = wait.buffer;
1405 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1406 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1408 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1415 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1417 struct video1394_wait32 wait32;
1418 struct video1394_wait wait;
1419 mm_segment_t old_fs;
1422 if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1425 wait.channel = wait32.channel;
1426 wait.buffer = wait32.buffer;
1427 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1428 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1432 if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1433 ret = video1394_ioctl(file,
1434 VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1435 (unsigned long) &wait);
1437 ret = video1394_ioctl(file,
1438 VIDEO1394_IOC_TALK_WAIT_BUFFER,
1439 (unsigned long) &wait);
1445 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1447 return -EFAULT; /* ??? was there before. */
1449 return video1394_ioctl(file,
1450 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1453 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1456 case VIDEO1394_IOC_LISTEN_CHANNEL:
1457 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1458 case VIDEO1394_IOC_TALK_CHANNEL:
1459 case VIDEO1394_IOC_UNTALK_CHANNEL:
1460 return video1394_ioctl(f, cmd, arg);
1462 case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1463 return video1394_w_wait32(f, cmd, arg);
1464 case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1465 return video1394_wr_wait32(f, cmd, arg);
1466 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1467 return video1394_queue_buf32(f, cmd, arg);
1468 case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1469 return video1394_w_wait32(f, cmd, arg);
1470 case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1471 return video1394_wr_wait32(f, cmd, arg);
1473 return -ENOIOCTLCMD;
1477 #endif /* CONFIG_COMPAT */
1479 static void __exit video1394_exit_module (void)
1481 hpsb_unregister_protocol(&video1394_driver);
1483 hpsb_unregister_highlevel(&video1394_highlevel);
1485 devfs_remove(VIDEO1394_DRIVER_NAME);
1486 cdev_del(&video1394_cdev);
1488 PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1491 static int __init video1394_init_module (void)
1495 cdev_init(&video1394_cdev, &video1394_fops);
1496 video1394_cdev.owner = THIS_MODULE;
1497 kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1498 ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1500 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1504 devfs_mk_dir(VIDEO1394_DRIVER_NAME);
1506 hpsb_register_highlevel(&video1394_highlevel);
1508 ret = hpsb_register_protocol(&video1394_driver);
1510 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1511 hpsb_unregister_highlevel(&video1394_highlevel);
1512 devfs_remove(VIDEO1394_DRIVER_NAME);
1513 cdev_del(&video1394_cdev);
1517 PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1522 module_init(video1394_init_module);
1523 module_exit(video1394_exit_module);