drivers/ieee1394/video1394.c

   1 /*
   2  * video1394.c - video driver for OHCI 1394 boards
   3  * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   4  *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software Foundation,
  18  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  *
  20  * NOTES:
  21  *
  22  * jds -- add private data to file to keep track of iso contexts associated
  23  * with each open -- so release won't kill all iso transfers.
  24  *
  25  * Damien Douxchamps: Fix failure when the number of DMA pages per frame is
  26  * one.
  27  *
  28  * ioctl return codes:
  29  * EFAULT is only for invalid address for the argp
  30  * EINVAL for out of range values
  31  * EBUSY when trying to use an already used resource
  32  * ESRCH when trying to free/stop a not used resource
  33  * EAGAIN for resource allocation failure that could perhaps succeed later
  34  * ENOTTY for unsupported ioctl request
  35  *
  36  */
  37
  38 /* Markus Tavenrath <speedygoo@speedygoo.de> :
  39    - fixed checks for valid buffer-numbers in video1394_icotl
  40    - changed the ways the dma prg's are used, now it's possible to use
  41      even a single dma buffer
  42 */
  43 #include <linux/config.h>
  44 #include <linux/kernel.h>
  45 #include <linux/list.h>
  46 #include <linux/slab.h>
  47 #include <linux/interrupt.h>
  48 #include <linux/wait.h>
  49 #include <linux/errno.h>
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/pci.h>
  53 #include <linux/fs.h>
  54 #include <linux/poll.h>
  55 #include <linux/smp_lock.h>
  56 #include <linux/delay.h>
  57 #include <linux/devfs_fs_kernel.h>
  58 #include <linux/bitops.h>
  59 #include <linux/types.h>
  60 #include <linux/vmalloc.h>
  61 #include <linux/timex.h>
  62 #include <linux/mm.h>
  63 #include <linux/ioctl32.h>
  64 #include <linux/compat.h>
  65 #include <linux/cdev.h>
  66
  67 #include "ieee1394.h"
  68 #include "ieee1394_types.h"
  69 #include "hosts.h"
  70 #include "ieee1394_core.h"
  71 #include "highlevel.h"
  72 #include "video1394.h"
  73 #include "nodemgr.h"
  74 #include "dma.h"
  75
  76 #include "ohci1394.h"
  77
  78 #define ISO_CHANNELS 64
  79
  80 #ifndef virt_to_page
  81 #define virt_to_page(x) MAP_NR(x)
  82 #endif
  83
  84 #ifndef vmalloc_32
  85 #define vmalloc_32(x) vmalloc(x)
  86 #endif
  87
  88 struct it_dma_prg {
  89         struct dma_cmd begin;
  90         quadlet_t data[4];
  91         struct dma_cmd end;
  92         quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
  93 };
  94
  95 struct dma_iso_ctx {
  96         struct ti_ohci *ohci;
  97         int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
  98         struct ohci1394_iso_tasklet iso_tasklet;
  99         int channel;
 100         int ctx;
 101         int last_buffer;
 102         int * next_buffer;  /* For ISO Transmit of video packets
 103                                to write the correct SYT field
 104                                into the next block */
 105         unsigned int num_desc;
 106         unsigned int buf_size;
 107         unsigned int frame_size;
 108         unsigned int packet_size;
 109         unsigned int left_size;
 110         unsigned int nb_cmd;
 111
 112         struct dma_region dma;
 113
 114         struct dma_prog_region *prg_reg;
 115
 116         struct dma_cmd **ir_prg;
 117         struct it_dma_prg **it_prg;
 118
 119         unsigned int *buffer_status;
 120         unsigned int *buffer_prg_assignment;
 121         struct timeval *buffer_time; /* time when the buffer was received */
 122         unsigned int *last_used_cmd; /* For ISO Transmit with
 123                                         variable sized packets only ! */
 124         int ctrlClear;
 125         int ctrlSet;
 126         int cmdPtr;
 127         int ctxMatch;
 128         wait_queue_head_t waitq;
 129         spinlock_t lock;
 130         unsigned int syt_offset;
 131         int flags;
 132
 133         struct list_head link;
 134 };
 135
 136
 137 struct file_ctx {
 138         struct ti_ohci *ohci;
 139         struct list_head context_list;
 140         struct dma_iso_ctx *current_ctx;
 141 };
 142
 143 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
 144 #define VIDEO1394_DEBUG
 145 #endif
 146
 147 #ifdef DBGMSG
 148 #undef DBGMSG
 149 #endif
 150
 151 #ifdef VIDEO1394_DEBUG
 152 #define DBGMSG(card, fmt, args...) \
 153 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
 154 #else
 155 #define DBGMSG(card, fmt, args...)
 156 #endif
 157
 158 /* print general (card independent) information */
 159 #define PRINT_G(level, fmt, args...) \
 160 printk(level "video1394: " fmt "\n" , ## args)
 161
 162 /* print card specific information */
 163 #define PRINT(level, card, fmt, args...) \
 164 printk(level "video1394_%d: " fmt "\n" , card , ## args)
 165
 166 static void wakeup_dma_ir_ctx(unsigned long l);
 167 static void wakeup_dma_it_ctx(unsigned long l);
 168
 169 static struct hpsb_highlevel video1394_highlevel;
 170
 171 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
 172 {
 173         int i;
 174
 175         DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
 176
 177         ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
 178         if (d->iso_tasklet.link.next != NULL)
 179                 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
 180
 181         dma_region_free(&d->dma);
 182
 183         if (d->prg_reg) {
 184                 for (i = 0; i < d->num_desc; i++)
 185                         dma_prog_region_free(&d->prg_reg[i]);
 186                 kfree(d->prg_reg);
 187         }
 188
 189         kfree(d->ir_prg);
 190         kfree(d->it_prg);
 191         kfree(d->buffer_status);
 192         kfree(d->buffer_prg_assignment);
 193         kfree(d->buffer_time);
 194         kfree(d->last_used_cmd);
 195         kfree(d->next_buffer);
 196         list_del(&d->link);
 197         kfree(d);
 198
 199         return 0;
 200 }
 201
 202 static struct dma_iso_ctx *
 203 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
 204                   int buf_size, int channel, unsigned int packet_size)
 205 {
 206         struct dma_iso_ctx *d;
 207         int i;
 208
 209         d = kzalloc(sizeof(*d), GFP_KERNEL);
 210         if (!d) {
 211                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
 212                 return NULL;
 213         }
 214
 215         d->ohci = ohci;
 216         d->type = type;
 217         d->channel = channel;
 218         d->num_desc = num_desc;
 219         d->frame_size = buf_size;
 220         d->buf_size = PAGE_ALIGN(buf_size);
 221         d->last_buffer = -1;
 222         INIT_LIST_HEAD(&d->link);
 223         init_waitqueue_head(&d->waitq);
 224
 225         /* Init the regions for easy cleanup */
 226         dma_region_init(&d->dma);
 227
 228         if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
 229                              PCI_DMA_BIDIRECTIONAL)) {
 230                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
 231                 free_dma_iso_ctx(d);
 232                 return NULL;
 233         }
 234
 235         if (type == OHCI_ISO_RECEIVE)
 236                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 237                                           wakeup_dma_ir_ctx,
 238                                           (unsigned long) d);
 239         else
 240                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 241                                           wakeup_dma_it_ctx,
 242                                           (unsigned long) d);
 243
 244         if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
 245                 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
 246                       type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
 247                 free_dma_iso_ctx(d);
 248                 return NULL;
 249         }
 250         d->ctx = d->iso_tasklet.context;
 251
 252         d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
 253         if (!d->prg_reg) {
 254                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
 255                 free_dma_iso_ctx(d);
 256                 return NULL;
 257         }
 258         /* Makes for easier cleanup */
 259         for (i = 0; i < d->num_desc; i++)
 260                 dma_prog_region_init(&d->prg_reg[i]);
 261
 262         if (type == OHCI_ISO_RECEIVE) {
 263                 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
 264                 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
 265                 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
 266                 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
 267
 268                 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
 269                                     GFP_KERNEL);
 270
 271                 if (!d->ir_prg) {
 272                         PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 273                         free_dma_iso_ctx(d);
 274                         return NULL;
 275                 }
 276
 277                 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
 278                 d->left_size = (d->frame_size % PAGE_SIZE) ?
 279                         d->frame_size % PAGE_SIZE : PAGE_SIZE;
 280
 281                 for (i = 0;i < d->num_desc; i++) {
 282                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 283                                                   sizeof(struct dma_cmd), ohci->dev)) {
 284                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 285                                 free_dma_iso_ctx(d);
 286                                 return NULL;
 287                         }
 288                         d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
 289                 }
 290
 291         } else {  /* OHCI_ISO_TRANSMIT */
 292                 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
 293                 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
 294                 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
 295
 296                 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
 297                                     GFP_KERNEL);
 298
 299                 if (!d->it_prg) {
 300                         PRINT(KERN_ERR, ohci->host->id,
 301                               "Failed to allocate dma it prg");
 302                         free_dma_iso_ctx(d);
 303                         return NULL;
 304                 }
 305
 306                 d->packet_size = packet_size;
 307
 308                 if (PAGE_SIZE % packet_size || packet_size>4096) {
 309                         PRINT(KERN_ERR, ohci->host->id,
 310                               "Packet size %d (page_size: %ld) "
 311                               "not yet supported\n",
 312                               packet_size, PAGE_SIZE);
 313                         free_dma_iso_ctx(d);
 314                         return NULL;
 315                 }
 316
 317                 d->nb_cmd = d->frame_size / d->packet_size;
 318                 if (d->frame_size % d->packet_size) {
 319                         d->nb_cmd++;
 320                         d->left_size = d->frame_size % d->packet_size;
 321                 } else
 322                         d->left_size = d->packet_size;
 323
 324                 for (i = 0; i < d->num_desc; i++) {
 325                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 326                                                 sizeof(struct it_dma_prg), ohci->dev)) {
 327                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
 328                                 free_dma_iso_ctx(d);
 329                                 return NULL;
 330                         }
 331                         d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
 332                 }
 333         }
 334
 335         d->buffer_status =
 336             kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
 337         d->buffer_prg_assignment =
 338             kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
 339         d->buffer_time =
 340             kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
 341         d->last_used_cmd =
 342             kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
 343         d->next_buffer =
 344             kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
 345
 346         if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
 347             !d->last_used_cmd || !d->next_buffer) {
 348                 PRINT(KERN_ERR, ohci->host->id,
 349                       "Failed to allocate dma_iso_ctx member");
 350                 free_dma_iso_ctx(d);
 351                 return NULL;
 352         }
 353
 354         spin_lock_init(&d->lock);
 355
 356         PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
 357               "of size %d allocated for a frame size %d, each with %d prgs",
 358               (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
 359               d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
 360
 361         return d;
 362 }
 363
 364 static void reset_ir_status(struct dma_iso_ctx *d, int n)
 365 {
 366         int i;
 367         d->ir_prg[n][0].status = cpu_to_le32(4);
 368         d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
 369         for (i = 2; i < d->nb_cmd - 1; i++)
 370                 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
 371         d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
 372 }
 373
 374 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
 375 {
 376         struct dma_cmd *ir_prg = d->ir_prg[n];
 377         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 378         int i;
 379
 380         d->buffer_prg_assignment[n] = buffer;
 381
 382         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 383                                 (unsigned long)d->dma.kvirt));
 384         ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 385                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 386
 387         for (i=2;i<d->nb_cmd-1;i++) {
 388                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 389                                                 (buf+(i-1)*PAGE_SIZE) -
 390                                                 (unsigned long)d->dma.kvirt));
 391         }
 392
 393         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 394                                   DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 395         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 396                                   (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
 397 }
 398
 399 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
 400 {
 401         struct dma_cmd *ir_prg = d->ir_prg[n];
 402         struct dma_prog_region *ir_reg = &d->prg_reg[n];
 403         unsigned long buf = (unsigned long)d->dma.kvirt;
 404         int i;
 405
 406         /* the first descriptor will read only 4 bytes */
 407         ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 408                 DMA_CTL_BRANCH | 4);
 409
 410         /* set the sync flag */
 411         if (flags & VIDEO1394_SYNC_FRAMES)
 412                 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
 413
 414         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 415                                 (unsigned long)d->dma.kvirt));
 416         ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 417                                         1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 418
 419         /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
 420         if (d->nb_cmd > 2) {
 421                 /* The second descriptor will read PAGE_SIZE-4 bytes */
 422                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 423                                                 DMA_CTL_BRANCH | (PAGE_SIZE-4));
 424                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
 425                                                 (unsigned long)d->dma.kvirt));
 426                 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 427                                                       2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 428
 429                 for (i = 2; i < d->nb_cmd - 1; i++) {
 430                         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 431                                                         DMA_CTL_BRANCH | PAGE_SIZE);
 432                         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 433                                                         (buf+(i-1)*PAGE_SIZE) -
 434                                                         (unsigned long)d->dma.kvirt));
 435
 436                         ir_prg[i].branchAddress =
 437                                 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 438                                             (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 439                 }
 440
 441                 /* The last descriptor will generate an interrupt */
 442                 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 443                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 444                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 445                                                 (buf+(i-1)*PAGE_SIZE) -
 446                                                 (unsigned long)d->dma.kvirt));
 447         } else {
 448                 /* Only one DMA page is used. Read d->left_size immediately and */
 449                 /* generate an interrupt as this is also the last page. */
 450                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 451                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
 452                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 453                                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 454         }
 455 }
 456
 457 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
 458 {
 459         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 460         int i;
 461
 462         d->flags = flags;
 463
 464         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 465
 466         for (i=0;i<d->num_desc;i++) {
 467                 initialize_dma_ir_prg(d, i, flags);
 468                 reset_ir_status(d, i);
 469         }
 470
 471         /* reset the ctrl register */
 472         reg_write(ohci, d->ctrlClear, 0xf0000000);
 473
 474         /* Set bufferFill */
 475         reg_write(ohci, d->ctrlSet, 0x80000000);
 476
 477         /* Set isoch header */
 478         if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
 479                 reg_write(ohci, d->ctrlSet, 0x40000000);
 480
 481         /* Set the context match register to match on all tags,
 482            sync for sync tag, and listen to d->channel */
 483         reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
 484
 485         /* Set up isoRecvIntMask to generate interrupts */
 486         reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
 487 }
 488
 489 /* find which context is listening to this channel */
 490 static struct dma_iso_ctx *
 491 find_ctx(struct list_head *list, int type, int channel)
 492 {
 493         struct dma_iso_ctx *ctx;
 494
 495         list_for_each_entry(ctx, list, link) {
 496                 if (ctx->type == type && ctx->channel == channel)
 497                         return ctx;
 498         }
 499
 500         return NULL;
 501 }
 502
 503 static void wakeup_dma_ir_ctx(unsigned long l)
 504 {
 505         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 506         int i;
 507
 508         spin_lock(&d->lock);
 509
 510         for (i = 0; i < d->num_desc; i++) {
 511                 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
 512                         reset_ir_status(d, i);
 513                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 514                         do_gettimeofday(&d->buffer_time[i]);
 515                 }
 516         }
 517
 518         spin_unlock(&d->lock);
 519
 520         if (waitqueue_active(&d->waitq))
 521                 wake_up_interruptible(&d->waitq);
 522 }
 523
 524 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
 525                                  int n)
 526 {
 527         unsigned char* buf = d->dma.kvirt + n * d->buf_size;
 528         u32 cycleTimer;
 529         u32 timeStamp;
 530
 531         if (n == -1) {
 532           return;
 533         }
 534
 535         cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 536
 537         timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
 538         timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
 539                 + (cycleTimer & 0xf000)) & 0xffff;
 540
 541         buf[6] = timeStamp >> 8;
 542         buf[7] = timeStamp & 0xff;
 543
 544     /* if first packet is empty packet, then put timestamp into the next full one too */
 545     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 546             buf += d->packet_size;
 547         buf[6] = timeStamp >> 8;
 548             buf[7] = timeStamp & 0xff;
 549         }
 550
 551     /* do the next buffer frame too in case of irq latency */
 552         n = d->next_buffer[n];
 553         if (n == -1) {
 554           return;
 555         }
 556         buf = d->dma.kvirt + n * d->buf_size;
 557
 558         timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
 559
 560         buf[6] = timeStamp >> 8;
 561         buf[7] = timeStamp & 0xff;
 562
 563     /* if first packet is empty packet, then put timestamp into the next full one too */
 564     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 565             buf += d->packet_size;
 566         buf[6] = timeStamp >> 8;
 567             buf[7] = timeStamp & 0xff;
 568         }
 569
 570 #if 0
 571         printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
 572                curr, n, cycleTimer, timeStamp);
 573 #endif
 574 }
 575
 576 static void wakeup_dma_it_ctx(unsigned long l)
 577 {
 578         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 579         struct ti_ohci *ohci = d->ohci;
 580         int i;
 581
 582         spin_lock(&d->lock);
 583
 584         for (i = 0; i < d->num_desc; i++) {
 585                 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
 586                     cpu_to_le32(0xFFFF0000)) {
 587                         int next = d->next_buffer[i];
 588                         put_timestamp(ohci, d, next);
 589                         d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
 590                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 591                 }
 592         }
 593
 594         spin_unlock(&d->lock);
 595
 596         if (waitqueue_active(&d->waitq))
 597                 wake_up_interruptible(&d->waitq);
 598 }
 599
 600 static void reprogram_dma_it_prg(struct dma_iso_ctx  *d, int n, int buffer)
 601 {
 602         struct it_dma_prg *it_prg = d->it_prg[n];
 603         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 604         int i;
 605
 606         d->buffer_prg_assignment[n] = buffer;
 607         for (i=0;i<d->nb_cmd;i++) {
 608           it_prg[i].end.address =
 609                 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 610                         (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
 611         }
 612 }
 613
 614 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
 615 {
 616         struct it_dma_prg *it_prg = d->it_prg[n];
 617         struct dma_prog_region *it_reg = &d->prg_reg[n];
 618         unsigned long buf = (unsigned long)d->dma.kvirt;
 619         int i;
 620         d->last_used_cmd[n] = d->nb_cmd - 1;
 621         for (i=0;i<d->nb_cmd;i++) {
 622
 623                 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
 624                         DMA_CTL_IMMEDIATE | 8) ;
 625                 it_prg[i].begin.address = 0;
 626
 627                 it_prg[i].begin.status = 0;
 628
 629                 it_prg[i].data[0] = cpu_to_le32(
 630                         (IEEE1394_SPEED_100 << 16)
 631                         | (/* tag */ 1 << 14)
 632                         | (d->channel << 8)
 633                         | (TCODE_ISO_DATA << 4));
 634                 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
 635                 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
 636                 it_prg[i].data[2] = 0;
 637                 it_prg[i].data[3] = 0;
 638
 639                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
 640                                              DMA_CTL_BRANCH);
 641                 it_prg[i].end.address =
 642                         cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
 643                                                 (unsigned long)d->dma.kvirt));
 644
 645                 if (i<d->nb_cmd-1) {
 646                         it_prg[i].end.control |= cpu_to_le32(d->packet_size);
 647                         it_prg[i].begin.branchAddress =
 648                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 649                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 650                         it_prg[i].end.branchAddress =
 651                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 652                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 653                 } else {
 654                         /* the last prg generates an interrupt */
 655                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 656                                 DMA_CTL_IRQ | d->left_size);
 657                         /* the last prg doesn't branch */
 658                         it_prg[i].begin.branchAddress = 0;
 659                         it_prg[i].end.branchAddress = 0;
 660                 }
 661                 it_prg[i].end.status = 0;
 662         }
 663 }
 664
 665 static void initialize_dma_it_prg_var_packet_queue(
 666         struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
 667         struct ti_ohci *ohci)
 668 {
 669         struct it_dma_prg *it_prg = d->it_prg[n];
 670         struct dma_prog_region *it_reg = &d->prg_reg[n];
 671         int i;
 672
 673 #if 0
 674         if (n != -1) {
 675                 put_timestamp(ohci, d, n);
 676         }
 677 #endif
 678         d->last_used_cmd[n] = d->nb_cmd - 1;
 679
 680         for (i = 0; i < d->nb_cmd; i++) {
 681                 unsigned int size;
 682                 if (packet_sizes[i] > d->packet_size) {
 683                         size = d->packet_size;
 684                 } else {
 685                         size = packet_sizes[i];
 686                 }
 687                 it_prg[i].data[1] = cpu_to_le32(size << 16);
 688                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
 689
 690                 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
 691                         it_prg[i].end.control |= cpu_to_le32(size);
 692                         it_prg[i].begin.branchAddress =
 693                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 694                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 695                         it_prg[i].end.branchAddress =
 696                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 697                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 698                 } else {
 699                         /* the last prg generates an interrupt */
 700                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 701                                 DMA_CTL_IRQ | size);
 702                         /* the last prg doesn't branch */
 703                         it_prg[i].begin.branchAddress = 0;
 704                         it_prg[i].end.branchAddress = 0;
 705                         d->last_used_cmd[n] = i;
 706                         break;
 707                 }
 708         }
 709 }
 710
 711 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
 712                                   unsigned int syt_offset, int flags)
 713 {
 714         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 715         int i;
 716
 717         d->flags = flags;
 718         d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
 719
 720         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 721
 722         for (i=0;i<d->num_desc;i++)
 723                 initialize_dma_it_prg(d, i, sync_tag);
 724
 725         /* Set up isoRecvIntMask to generate interrupts */
 726         reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
 727 }
 728
 729 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
 730                                               unsigned int buffer)
 731 {
 732         unsigned long flags;
 733         unsigned int ret;
 734         spin_lock_irqsave(&d->lock, flags);
 735         ret = d->buffer_status[buffer];
 736         spin_unlock_irqrestore(&d->lock, flags);
 737         return ret;
 738 }
 739
 740 static int __video1394_ioctl(struct file *file,
 741                              unsigned int cmd, unsigned long arg)
 742 {
 743         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
 744         struct ti_ohci *ohci = ctx->ohci;
 745         unsigned long flags;
 746         void __user *argp = (void __user *)arg;
 747
 748         switch(cmd)
 749         {
 750         case VIDEO1394_IOC_LISTEN_CHANNEL:
 751         case VIDEO1394_IOC_TALK_CHANNEL:
 752         {
 753                 struct video1394_mmap v;
 754                 u64 mask;
 755                 struct dma_iso_ctx *d;
 756                 int i;
 757
 758                 if (copy_from_user(&v, argp, sizeof(v)))
 759                         return -EFAULT;
 760
 761                 /* if channel < 0, find lowest available one */
 762                 if (v.channel < 0) {
 763                     mask = (u64)0x1;
 764                     for (i=0; ; i++) {
 765                         if (i == ISO_CHANNELS) {
 766                             PRINT(KERN_ERR, ohci->host->id,
 767                                   "No free channel found");
 768                             return EAGAIN;
 769                         }
 770                         if (!(ohci->ISO_channel_usage & mask)) {
 771                             v.channel = i;
 772                             PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
 773                             break;
 774                         }
 775                         mask = mask << 1;
 776                     }
 777                 } else if (v.channel >= ISO_CHANNELS) {
 778                         PRINT(KERN_ERR, ohci->host->id,
 779                               "Iso channel %d out of bounds", v.channel);
 780                         return -EINVAL;
 781                 } else {
 782                         mask = (u64)0x1<<v.channel;
 783                 }
 784                 PRINT(KERN_INFO, ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
 785                         (u32)(mask>>32),(u32)(mask&0xffffffff),
 786                         (u32)(ohci->ISO_channel_usage>>32),
 787                         (u32)(ohci->ISO_channel_usage&0xffffffff));
 788                 if (ohci->ISO_channel_usage & mask) {
 789                         PRINT(KERN_ERR, ohci->host->id,
 790                               "Channel %d is already taken", v.channel);
 791                         return -EBUSY;
 792                 }
 793
 794                 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
 795                         PRINT(KERN_ERR, ohci->host->id,
 796                               "Invalid %d length buffer requested",v.buf_size);
 797                         return -EINVAL;
 798                 }
 799
 800                 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
 801                         PRINT(KERN_ERR, ohci->host->id,
 802                               "Invalid %d buffers requested",v.nb_buffers);
 803                         return -EINVAL;
 804                 }
 805
 806                 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
 807                         PRINT(KERN_ERR, ohci->host->id,
 808                               "%d buffers of size %d bytes is too big",
 809                               v.nb_buffers, v.buf_size);
 810                         return -EINVAL;
 811                 }
 812
 813                 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
 814                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
 815                                               v.nb_buffers + 1, v.buf_size,
 816                                               v.channel, 0);
 817
 818                         if (d == NULL) {
 819                                 PRINT(KERN_ERR, ohci->host->id,
 820                                       "Couldn't allocate ir context");
 821                                 return -EAGAIN;
 822                         }
 823                         initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
 824
 825                         ctx->current_ctx = d;
 826
 827                         v.buf_size = d->buf_size;
 828                         list_add_tail(&d->link, &ctx->context_list);
 829
 830                         PRINT(KERN_INFO, ohci->host->id,
 831                               "iso context %d listen on channel %d",
 832                               d->ctx, v.channel);
 833                 }
 834                 else {
 835                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
 836                                               v.nb_buffers + 1, v.buf_size,
 837                                               v.channel, v.packet_size);
 838
 839                         if (d == NULL) {
 840                                 PRINT(KERN_ERR, ohci->host->id,
 841                                       "Couldn't allocate it context");
 842                                 return -EAGAIN;
 843                         }
 844                         initialize_dma_it_ctx(d, v.sync_tag,
 845                                               v.syt_offset, v.flags);
 846
 847                         ctx->current_ctx = d;
 848
 849                         v.buf_size = d->buf_size;
 850
 851                         list_add_tail(&d->link, &ctx->context_list);
 852
 853                         PRINT(KERN_INFO, ohci->host->id,
 854                               "Iso context %d talk on channel %d", d->ctx,
 855                               v.channel);
 856                 }
 857
 858                 if (copy_to_user(argp, &v, sizeof(v))) {
 859                         /* FIXME : free allocated dma resources */
 860                         return -EFAULT;
 861                 }
 862
 863                 ohci->ISO_channel_usage |= mask;
 864
 865                 return 0;
 866         }
 867         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
 868         case VIDEO1394_IOC_UNTALK_CHANNEL:
 869         {
 870                 int channel;
 871                 u64 mask;
 872                 struct dma_iso_ctx *d;
 873
 874                 if (copy_from_user(&channel, argp, sizeof(int)))
 875                         return -EFAULT;
 876
 877                 if (channel < 0 || channel >= ISO_CHANNELS) {
 878                         PRINT(KERN_ERR, ohci->host->id,
 879                               "Iso channel %d out of bound", channel);
 880                         return -EINVAL;
 881                 }
 882                 mask = (u64)0x1<<channel;
 883                 if (!(ohci->ISO_channel_usage & mask)) {
 884                         PRINT(KERN_ERR, ohci->host->id,
 885                               "Channel %d is not being used", channel);
 886                         return -ESRCH;
 887                 }
 888
 889                 /* Mark this channel as unused */
 890                 ohci->ISO_channel_usage &= ~mask;
 891
 892                 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
 893                         d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
 894                 else
 895                         d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
 896
 897                 if (d == NULL) return -ESRCH;
 898                 PRINT(KERN_INFO, ohci->host->id, "Iso context %d "
 899                       "stop talking on channel %d", d->ctx, channel);
 900                 free_dma_iso_ctx(d);
 901
 902                 return 0;
 903         }
 904         case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
 905         {
 906                 struct video1394_wait v;
 907                 struct dma_iso_ctx *d;
 908                 int next_prg;
 909
 910                 if (copy_from_user(&v, argp, sizeof(v)))
 911                         return -EFAULT;
 912
 913                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 914                 if (d == NULL) return -EFAULT;
 915
 916                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
 917                         PRINT(KERN_ERR, ohci->host->id,
 918                               "Buffer %d out of range",v.buffer);
 919                         return -EINVAL;
 920                 }
 921
 922                 spin_lock_irqsave(&d->lock,flags);
 923
 924                 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
 925                         PRINT(KERN_ERR, ohci->host->id,
 926                               "Buffer %d is already used",v.buffer);
 927                         spin_unlock_irqrestore(&d->lock,flags);
 928                         return -EBUSY;
 929                 }
 930
 931                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
 932
 933                 next_prg = (d->last_buffer + 1) % d->num_desc;
 934                 if (d->last_buffer>=0)
 935                         d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
 936                                 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
 937                                         & 0xfffffff0) | 0x1);
 938
 939                 d->last_buffer = next_prg;
 940                 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
 941
 942                 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
 943
 944                 spin_unlock_irqrestore(&d->lock,flags);
 945
 946                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
 947                 {
 948                         DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
 949
 950                         /* Tell the controller where the first program is */
 951                         reg_write(ohci, d->cmdPtr,
 952                                   dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
 953
 954                         /* Run IR context */
 955                         reg_write(ohci, d->ctrlSet, 0x8000);
 956                 }
 957                 else {
 958                         /* Wake up dma context if necessary */
 959                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
 960                                 PRINT(KERN_INFO, ohci->host->id,
 961                                       "Waking up iso dma ctx=%d", d->ctx);
 962                                 reg_write(ohci, d->ctrlSet, 0x1000);
 963                         }
 964                 }
 965                 return 0;
 966
 967         }
 968         case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
 969         case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
 970         {
 971                 struct video1394_wait v;
 972                 struct dma_iso_ctx *d;
 973                 int i = 0;
 974
 975                 if (copy_from_user(&v, argp, sizeof(v)))
 976                         return -EFAULT;
 977
 978                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 979                 if (d == NULL) return -EFAULT;
 980
 981                 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
 982                         PRINT(KERN_ERR, ohci->host->id,
 983                               "Buffer %d out of range",v.buffer);
 984                         return -EINVAL;
 985                 }
 986
 987                 /*
 988                  * I change the way it works so that it returns
 989                  * the last received frame.
 990                  */
 991                 spin_lock_irqsave(&d->lock, flags);
 992                 switch(d->buffer_status[v.buffer]) {
 993                 case VIDEO1394_BUFFER_READY:
 994                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 995                         break;
 996                 case VIDEO1394_BUFFER_QUEUED:
 997                         if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
 998                             /* for polling, return error code EINTR */
 999                             spin_unlock_irqrestore(&d->lock, flags);
1000                             return -EINTR;
1001                         }
1002
1003                         spin_unlock_irqrestore(&d->lock, flags);
1004                         wait_event_interruptible(d->waitq,
1005                                         video1394_buffer_state(d, v.buffer) ==
1006                                          VIDEO1394_BUFFER_READY);
1007                         if (signal_pending(current))
1008                                 return -EINTR;
1009                         spin_lock_irqsave(&d->lock, flags);
1010                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1011                         break;
1012                 default:
1013                         PRINT(KERN_ERR, ohci->host->id,
1014                               "Buffer %d is not queued",v.buffer);
1015                         spin_unlock_irqrestore(&d->lock, flags);
1016                         return -ESRCH;
1017                 }
1018
1019                 /* set time of buffer */
1020                 v.filltime = d->buffer_time[v.buffer];
1021 //              printk("Buffer %d time %d\n", v.buffer, (d->buffer_time[v.buffer]).tv_usec);
1022
1023                 /*
1024                  * Look ahead to see how many more buffers have been received
1025                  */
1026                 i=0;
1027                 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1028                        VIDEO1394_BUFFER_READY) {
1029                         v.buffer=(v.buffer+1)%(d->num_desc - 1);
1030                         i++;
1031                 }
1032                 spin_unlock_irqrestore(&d->lock, flags);
1033
1034                 v.buffer=i;
1035                 if (copy_to_user(argp, &v, sizeof(v)))
1036                         return -EFAULT;
1037
1038                 return 0;
1039         }
1040         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1041         {
1042                 struct video1394_wait v;
1043                 unsigned int *psizes = NULL;
1044                 struct dma_iso_ctx *d;
1045                 int next_prg;
1046
1047                 if (copy_from_user(&v, argp, sizeof(v)))
1048                         return -EFAULT;
1049
1050                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1051                 if (d == NULL) return -EFAULT;
1052
1053                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1054                         PRINT(KERN_ERR, ohci->host->id,
1055                               "Buffer %d out of range",v.buffer);
1056                         return -EINVAL;
1057                 }
1058
1059                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1060                         int buf_size = d->nb_cmd * sizeof(*psizes);
1061                         struct video1394_queue_variable __user *p = argp;
1062                         unsigned int __user *qv;
1063
1064                         if (get_user(qv, &p->packet_sizes))
1065                                 return -EFAULT;
1066
1067                         psizes = kmalloc(buf_size, GFP_KERNEL);
1068                         if (!psizes)
1069                                 return -ENOMEM;
1070
1071                         if (copy_from_user(psizes, qv, buf_size)) {
1072                                 kfree(psizes);
1073                                 return -EFAULT;
1074                         }
1075                 }
1076
1077                 spin_lock_irqsave(&d->lock,flags);
1078
1079                 // last_buffer is last_prg
1080                 next_prg = (d->last_buffer + 1) % d->num_desc;
1081                 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1082                         PRINT(KERN_ERR, ohci->host->id,
1083                               "Buffer %d is already used",v.buffer);
1084                         spin_unlock_irqrestore(&d->lock,flags);
1085                         kfree(psizes);
1086                         return -EBUSY;
1087                 }
1088
1089                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1090                         initialize_dma_it_prg_var_packet_queue(
1091                                 d, next_prg, psizes, ohci);
1092                 }
1093
1094                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1095
1096                 if (d->last_buffer >= 0) {
1097                         d->it_prg[d->last_buffer]
1098                                 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1099                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1100                                                 0) & 0xfffffff0) | 0x3);
1101
1102                         d->it_prg[d->last_buffer]
1103                                 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1104                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1105                                                 0) & 0xfffffff0) | 0x3);
1106                         d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1107                 }
1108                 d->last_buffer = next_prg;
1109                 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1110                 d->next_buffer[d->last_buffer] = -1;
1111
1112                 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1113
1114                 spin_unlock_irqrestore(&d->lock,flags);
1115
1116                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1117                 {
1118                         DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1119                                d->ctx);
1120                         put_timestamp(ohci, d, d->last_buffer);
1121
1122                         /* Tell the controller where the first program is */
1123                         reg_write(ohci, d->cmdPtr,
1124                                 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1125
1126                         /* Run IT context */
1127                         reg_write(ohci, d->ctrlSet, 0x8000);
1128                 }
1129                 else {
1130                         /* Wake up dma context if necessary */
1131                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1132                                 PRINT(KERN_INFO, ohci->host->id,
1133                                       "Waking up iso transmit dma ctx=%d",
1134                                       d->ctx);
1135                                 put_timestamp(ohci, d, d->last_buffer);
1136                                 reg_write(ohci, d->ctrlSet, 0x1000);
1137                         }
1138                 }
1139
1140                 kfree(psizes);
1141                 return 0;
1142
1143         }
1144         case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1145         {
1146                 struct video1394_wait v;
1147                 struct dma_iso_ctx *d;
1148
1149                 if (copy_from_user(&v, argp, sizeof(v)))
1150                         return -EFAULT;
1151
1152                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1153                 if (d == NULL) return -EFAULT;
1154
1155                 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1156                         PRINT(KERN_ERR, ohci->host->id,
1157                               "Buffer %d out of range",v.buffer);
1158                         return -EINVAL;
1159                 }
1160
1161                 switch(d->buffer_status[v.buffer]) {
1162                 case VIDEO1394_BUFFER_READY:
1163                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1164                         return 0;
1165                 case VIDEO1394_BUFFER_QUEUED:
1166                         wait_event_interruptible(d->waitq,
1167                                         (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1168                         if (signal_pending(current))
1169                                 return -EINTR;
1170                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1171                         return 0;
1172                 default:
1173                         PRINT(KERN_ERR, ohci->host->id,
1174                               "Buffer %d is not queued",v.buffer);
1175                         return -ESRCH;
1176                 }
1177         }
1178         default:
1179                 return -ENOTTY;
1180         }
1181 }
1182
1183 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1184 {
1185         int err;
1186         lock_kernel();
1187         err = __video1394_ioctl(file, cmd, arg);
1188         unlock_kernel();
1189         return err;
1190 }
1191
1192 /*
1193  *      This maps the vmalloced and reserved buffer to user space.
1194  *
1195  *  FIXME:
1196  *  - PAGE_READONLY should suffice!?
1197  *  - remap_pfn_range is kind of inefficient for page by page remapping.
1198  *    But e.g. pte_alloc() does not work in modules ... :-(
1199  */
1200
1201 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1202 {
1203         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1204         int res = -EINVAL;
1205
1206         lock_kernel();
1207         if (ctx->current_ctx == NULL) {
1208                 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1209         } else
1210                 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1211         unlock_kernel();
1212
1213         return res;
1214 }
1215
1216 static int video1394_open(struct inode *inode, struct file *file)
1217 {
1218         int i = ieee1394_file_to_instance(file);
1219         struct ti_ohci *ohci;
1220         struct file_ctx *ctx;
1221
1222         ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1223         if (ohci == NULL)
1224                 return -EIO;
1225
1226         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1227         if (!ctx)  {
1228                 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1229                 return -ENOMEM;
1230         }
1231
1232         ctx->ohci = ohci;
1233         INIT_LIST_HEAD(&ctx->context_list);
1234         ctx->current_ctx = NULL;
1235         file->private_data = ctx;
1236
1237         return 0;
1238 }
1239
1240 static int video1394_release(struct inode *inode, struct file *file)
1241 {
1242         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1243         struct ti_ohci *ohci = ctx->ohci;
1244         struct list_head *lh, *next;
1245         u64 mask;
1246
1247         lock_kernel();
1248         list_for_each_safe(lh, next, &ctx->context_list) {
1249                 struct dma_iso_ctx *d;
1250                 d = list_entry(lh, struct dma_iso_ctx, link);
1251                 mask = (u64) 1 << d->channel;
1252
1253                 if (!(ohci->ISO_channel_usage & mask))
1254                         PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1255                               "is not being used", d->channel);
1256                 else
1257                         ohci->ISO_channel_usage &= ~mask;
1258                 PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context "
1259                       "%d stop listening on channel %d",
1260                       d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1261                       d->ctx, d->channel);
1262                 free_dma_iso_ctx(d);
1263         }
1264
1265         kfree(ctx);
1266         file->private_data = NULL;
1267
1268         unlock_kernel();
1269         return 0;
1270 }
1271
1272 #ifdef CONFIG_COMPAT
1273 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1274 #endif
1275
1276 static struct cdev video1394_cdev;
1277 static struct file_operations video1394_fops=
1278 {
1279         .owner =        THIS_MODULE,
1280         .unlocked_ioctl = video1394_ioctl,
1281 #ifdef CONFIG_COMPAT
1282         .compat_ioctl = video1394_compat_ioctl,
1283 #endif
1284         .mmap =         video1394_mmap,
1285         .open =         video1394_open,
1286         .release =      video1394_release
1287 };
1288
1289 /*** HOTPLUG STUFF **********************************************************/
1290 /*
1291  * Export information about protocols/devices supported by this driver.
1292  */
1293 static struct ieee1394_device_id video1394_id_table[] = {
1294         {
1295                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1296                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1297                 .version        = CAMERA_SW_VERSION_ENTRY & 0xffffff
1298         },
1299         {
1300                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1301                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1302                 .version        = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1303         },
1304         {
1305                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1306                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1307                 .version        = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1308         },
1309         { }
1310 };
1311
1312 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1313
1314 static struct hpsb_protocol_driver video1394_driver = {
1315         .name           = "1394 Digital Camera Driver",
1316         .id_table       = video1394_id_table,
1317         .driver         = {
1318                 .name   = VIDEO1394_DRIVER_NAME,
1319                 .bus    = &ieee1394_bus_type,
1320         },
1321 };
1322
1323
1324 static void video1394_add_host (struct hpsb_host *host)
1325 {
1326         struct ti_ohci *ohci;
1327         int minor;
1328
1329         /* We only work with the OHCI-1394 driver */
1330         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1331                 return;
1332
1333         ohci = (struct ti_ohci *)host->hostdata;
1334
1335         if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1336                 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1337                 return;
1338         }
1339
1340         hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1341         hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1342
1343         minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1344         class_device_create(hpsb_protocol_class, NULL, MKDEV(
1345                 IEEE1394_MAJOR, minor),
1346                 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1347         devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor),
1348                        S_IFCHR | S_IRUSR | S_IWUSR,
1349                        "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1350 }
1351
1352
1353 static void video1394_remove_host (struct hpsb_host *host)
1354 {
1355         struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1356
1357         if (ohci) {
1358                 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1359                         IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1360                 devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1361         }
1362
1363         return;
1364 }
1365
1366
1367 static struct hpsb_highlevel video1394_highlevel = {
1368         .name =         VIDEO1394_DRIVER_NAME,
1369         .add_host =     video1394_add_host,
1370         .remove_host =  video1394_remove_host,
1371 };
1372
1373 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1374 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1375 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1376 MODULE_LICENSE("GPL");
1377
1378 #ifdef CONFIG_COMPAT
1379
1380 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER     \
1381         _IOW ('#', 0x12, struct video1394_wait32)
1382 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER      \
1383         _IOWR('#', 0x13, struct video1394_wait32)
1384 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER        \
1385         _IOW ('#', 0x17, struct video1394_wait32)
1386 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER      \
1387         _IOWR('#', 0x18, struct video1394_wait32)
1388
1389 struct video1394_wait32 {
1390         u32 channel;
1391         u32 buffer;
1392         struct compat_timeval filltime;
1393 };
1394
1395 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1396 {
1397         struct video1394_wait32 __user *argp = (void __user *)arg;
1398         struct video1394_wait32 wait32;
1399         struct video1394_wait wait;
1400         mm_segment_t old_fs;
1401         int ret;
1402
1403         if (copy_from_user(&wait32, argp, sizeof(wait32)))
1404                 return -EFAULT;
1405
1406         wait.channel = wait32.channel;
1407         wait.buffer = wait32.buffer;
1408         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1409         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1410
1411         old_fs = get_fs();
1412         set_fs(KERNEL_DS);
1413         if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1414                 ret = video1394_ioctl(file,
1415                                       VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1416                                       (unsigned long) &wait);
1417         else
1418                 ret = video1394_ioctl(file,
1419                                       VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1420                                       (unsigned long) &wait);
1421         set_fs(old_fs);
1422
1423         if (!ret) {
1424                 wait32.channel = wait.channel;
1425                 wait32.buffer = wait.buffer;
1426                 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1427                 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1428
1429                 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1430                         ret = -EFAULT;
1431         }
1432
1433         return ret;
1434 }
1435
1436 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1437 {
1438         struct video1394_wait32 wait32;
1439         struct video1394_wait wait;
1440         mm_segment_t old_fs;
1441         int ret;
1442
1443         if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1444                 return -EFAULT;
1445
1446         wait.channel = wait32.channel;
1447         wait.buffer = wait32.buffer;
1448         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1449         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1450
1451         old_fs = get_fs();
1452         set_fs(KERNEL_DS);
1453         if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1454                 ret = video1394_ioctl(file,
1455                                       VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1456                                       (unsigned long) &wait);
1457         else
1458                 ret = video1394_ioctl(file,
1459                                       VIDEO1394_IOC_TALK_WAIT_BUFFER,
1460                                       (unsigned long) &wait);
1461         set_fs(old_fs);
1462
1463         return ret;
1464 }
1465
1466 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1467 {
1468         return -EFAULT;   /* ??? was there before. */
1469
1470         return video1394_ioctl(file,
1471                                 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1472 }
1473
1474 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1475 {
1476         switch (cmd) {
1477         case VIDEO1394_IOC_LISTEN_CHANNEL:
1478         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1479         case VIDEO1394_IOC_TALK_CHANNEL:
1480         case VIDEO1394_IOC_UNTALK_CHANNEL:
1481                 return video1394_ioctl(f, cmd, arg);
1482
1483         case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1484                 return video1394_w_wait32(f, cmd, arg);
1485         case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1486                 return video1394_wr_wait32(f, cmd, arg);
1487         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1488                 return video1394_queue_buf32(f, cmd, arg);
1489         case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1490                 return video1394_w_wait32(f, cmd, arg);
1491         case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1492                 return video1394_wr_wait32(f, cmd, arg);
1493         default:
1494                 return -ENOIOCTLCMD;
1495         }
1496 }
1497
1498 #endif /* CONFIG_COMPAT */
1499
1500 static void __exit video1394_exit_module (void)
1501 {
1502         hpsb_unregister_protocol(&video1394_driver);
1503
1504         hpsb_unregister_highlevel(&video1394_highlevel);
1505
1506         devfs_remove(VIDEO1394_DRIVER_NAME);
1507         cdev_del(&video1394_cdev);
1508
1509         PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1510 }
1511
1512 static int __init video1394_init_module (void)
1513 {
1514         int ret;
1515
1516         cdev_init(&video1394_cdev, &video1394_fops);
1517         video1394_cdev.owner = THIS_MODULE;
1518         kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1519         ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1520         if (ret) {
1521                 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1522                 return ret;
1523         }
1524
1525         devfs_mk_dir(VIDEO1394_DRIVER_NAME);
1526
1527         hpsb_register_highlevel(&video1394_highlevel);
1528
1529         ret = hpsb_register_protocol(&video1394_driver);
1530         if (ret) {
1531                 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1532                 hpsb_unregister_highlevel(&video1394_highlevel);
1533                 devfs_remove(VIDEO1394_DRIVER_NAME);
1534                 cdev_del(&video1394_cdev);
1535                 return ret;
1536         }
1537
1538         PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1539         return 0;
1540 }
1541
1542
1543 module_init(video1394_init_module);
1544 module_exit(video1394_exit_module);