2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
26 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
27 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
28 MODULE_LICENSE("GPL");
30 static unsigned int i8042_nokbd;
31 module_param_named(nokbd, i8042_nokbd, bool, 0);
32 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
34 static unsigned int i8042_noaux;
35 module_param_named(noaux, i8042_noaux, bool, 0);
36 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
38 static unsigned int i8042_nomux;
39 module_param_named(nomux, i8042_nomux, bool, 0);
40 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
42 static unsigned int i8042_unlock;
43 module_param_named(unlock, i8042_unlock, bool, 0);
44 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
46 static unsigned int i8042_reset;
47 module_param_named(reset, i8042_reset, bool, 0);
48 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
50 static unsigned int i8042_direct;
51 module_param_named(direct, i8042_direct, bool, 0);
52 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
54 static unsigned int i8042_dumbkbd;
55 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
56 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
58 static unsigned int i8042_noloop;
59 module_param_named(noloop, i8042_noloop, bool, 0);
60 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
62 static unsigned int i8042_blink_frequency = 500;
63 module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
64 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
67 static int i8042_nopnp;
68 module_param_named(nopnp, i8042_nopnp, bool, 0);
69 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
74 static int i8042_debug;
75 module_param_named(debug, i8042_debug, bool, 0600);
76 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
79 __obsolete_setup("i8042_noaux");
80 __obsolete_setup("i8042_nomux");
81 __obsolete_setup("i8042_unlock");
82 __obsolete_setup("i8042_reset");
83 __obsolete_setup("i8042_direct");
84 __obsolete_setup("i8042_dumbkbd");
88 static DEFINE_SPINLOCK(i8042_lock);
97 #define I8042_KBD_PORT_NO 0
98 #define I8042_AUX_PORT_NO 1
99 #define I8042_MUX_PORT_NO 2
100 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
102 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
104 static unsigned char i8042_initial_ctr;
105 static unsigned char i8042_ctr;
106 static unsigned char i8042_mux_present;
107 static unsigned char i8042_kbd_irq_registered;
108 static unsigned char i8042_aux_irq_registered;
109 static unsigned char i8042_suppress_kbd_ack;
110 static struct platform_device *i8042_platform_device;
112 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
115 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
116 * be ready for reading values from it / writing values to it.
117 * Called always with i8042_lock held.
120 static int i8042_wait_read(void)
124 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
128 return -(i == I8042_CTL_TIMEOUT);
131 static int i8042_wait_write(void)
135 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
139 return -(i == I8042_CTL_TIMEOUT);
143 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
144 * of the i8042 down the toilet.
147 static int i8042_flush(void)
150 unsigned char data, str;
153 spin_lock_irqsave(&i8042_lock, flags);
155 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
157 data = i8042_read_data();
159 dbg("%02x <- i8042 (flush, %s)", data,
160 str & I8042_STR_AUXDATA ? "aux" : "kbd");
163 spin_unlock_irqrestore(&i8042_lock, flags);
169 * i8042_command() executes a command on the i8042. It also sends the input
170 * parameter(s) of the commands to it, and receives the output value(s). The
171 * parameters are to be stored in the param array, and the output is placed
172 * into the same array. The number of the parameters and output values is
173 * encoded in bits 8-11 of the command number.
176 static int __i8042_command(unsigned char *param, int command)
180 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
183 error = i8042_wait_write();
187 dbg("%02x -> i8042 (command)", command & 0xff);
188 i8042_write_command(command & 0xff);
190 for (i = 0; i < ((command >> 12) & 0xf); i++) {
191 error = i8042_wait_write();
194 dbg("%02x -> i8042 (parameter)", param[i]);
195 i8042_write_data(param[i]);
198 for (i = 0; i < ((command >> 8) & 0xf); i++) {
199 error = i8042_wait_read();
201 dbg(" -- i8042 (timeout)");
205 if (command == I8042_CMD_AUX_LOOP &&
206 !(i8042_read_status() & I8042_STR_AUXDATA)) {
207 dbg(" -- i8042 (auxerr)");
211 param[i] = i8042_read_data();
212 dbg("%02x <- i8042 (return)", param[i]);
218 static int i8042_command(unsigned char *param, int command)
223 spin_lock_irqsave(&i8042_lock, flags);
224 retval = __i8042_command(param, command);
225 spin_unlock_irqrestore(&i8042_lock, flags);
231 * i8042_kbd_write() sends a byte out through the keyboard interface.
234 static int i8042_kbd_write(struct serio *port, unsigned char c)
239 spin_lock_irqsave(&i8042_lock, flags);
241 if (!(retval = i8042_wait_write())) {
242 dbg("%02x -> i8042 (kbd-data)", c);
246 spin_unlock_irqrestore(&i8042_lock, flags);
252 * i8042_aux_write() sends a byte out through the aux interface.
255 static int i8042_aux_write(struct serio *serio, unsigned char c)
257 struct i8042_port *port = serio->port_data;
265 retval = i8042_command(&c, I8042_CMD_AUX_SEND);
267 retval = i8042_command(&c, I8042_CMD_MUX_SEND + port->mux);
270 * Make sure the interrupt happens and the character is received even
271 * in the case the IRQ isn't wired, so that we can receive further
275 i8042_interrupt(0, NULL);
280 * i8042_start() is called by serio core when port is about to finish
281 * registering. It will mark port as existing so i8042_interrupt can
282 * start sending data through it.
284 static int i8042_start(struct serio *serio)
286 struct i8042_port *port = serio->port_data;
294 * i8042_stop() marks serio port as non-existing so i8042_interrupt
295 * will not try to send data to the port that is about to go away.
296 * The function is called by serio core as part of unregister procedure.
298 static void i8042_stop(struct serio *serio)
300 struct i8042_port *port = serio->port_data;
308 * i8042_interrupt() is the most important function in this driver -
309 * it handles the interrupts from the i8042, and sends incoming bytes
310 * to the upper layers.
313 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
315 struct i8042_port *port;
317 unsigned char str, data;
319 unsigned int port_no;
322 spin_lock_irqsave(&i8042_lock, flags);
323 str = i8042_read_status();
324 if (unlikely(~str & I8042_STR_OBF)) {
325 spin_unlock_irqrestore(&i8042_lock, flags);
326 if (irq) dbg("Interrupt %d, without any data", irq);
330 data = i8042_read_data();
331 spin_unlock_irqrestore(&i8042_lock, flags);
333 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
334 static unsigned long last_transmit;
335 static unsigned char last_str;
338 if (str & I8042_STR_MUXERR) {
339 dbg("MUX error, status is %02x, data is %02x", str, data);
343 * When MUXERR condition is signalled the data register can only contain
344 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
345 * it is not always the case. Some KBC just get confused which port the
346 * data came from and signal error leaving the data intact. They _do not_
347 * revert to legacy mode (actually I've never seen KBC reverting to legacy
348 * mode yet, when we see one we'll add proper handling).
349 * Anyway, we will assume that the data came from the same serio last byte
350 * was transmitted (if transmission happened not too long ago).
352 if (time_before(jiffies, last_transmit + HZ/10)) {
356 /* fall through - report timeout */
358 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
359 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
363 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
365 last_transmit = jiffies;
368 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
369 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
371 port_no = (str & I8042_STR_AUXDATA) ?
372 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
375 port = &i8042_ports[port_no];
377 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
379 dfl & SERIO_PARITY ? ", bad parity" : "",
380 dfl & SERIO_TIMEOUT ? ", timeout" : "");
382 if (unlikely(i8042_suppress_kbd_ack))
383 if (port_no == I8042_KBD_PORT_NO &&
384 (data == 0xfa || data == 0xfe)) {
385 i8042_suppress_kbd_ack = 0;
389 if (likely(port->exists))
390 serio_interrupt(port->serio, data, dfl);
393 return IRQ_RETVAL(ret);
397 * i8042_enable_kbd_port enables keybaord port on chip
400 static int i8042_enable_kbd_port(void)
402 i8042_ctr &= ~I8042_CTR_KBDDIS;
403 i8042_ctr |= I8042_CTR_KBDINT;
405 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
406 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
414 * i8042_enable_aux_port enables AUX (mouse) port on chip
417 static int i8042_enable_aux_port(void)
419 i8042_ctr &= ~I8042_CTR_AUXDIS;
420 i8042_ctr |= I8042_CTR_AUXINT;
422 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
423 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
431 * i8042_enable_mux_ports enables 4 individual AUX ports after
432 * the controller has been switched into Multiplexed mode
435 static int i8042_enable_mux_ports(void)
440 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
441 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
442 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
445 return i8042_enable_aux_port();
449 * i8042_set_mux_mode checks whether the controller has an active
450 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
453 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
458 * Get rid of bytes in the queue.
464 * Internal loopback test - send three bytes, they should come back from the
465 * mouse interface, the last should be version.
469 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0)
471 param = mode ? 0x56 : 0xf6;
472 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
474 param = mode ? 0xa4 : 0xa5;
475 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
479 *mux_version = param;
485 * i8042_check_mux() checks whether the controller supports the PS/2 Active
486 * Multiplexing specification by Synaptics, Phoenix, Insyde and
490 static int __devinit i8042_check_mux(void)
492 unsigned char mux_version;
494 if (i8042_set_mux_mode(1, &mux_version))
498 * Workaround for interference with USB Legacy emulation
499 * that causes a v10.12 MUX to be found.
501 if (mux_version == 0xAC)
504 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
505 (mux_version >> 4) & 0xf, mux_version & 0xf);
508 * Disable all muxed ports by disabling AUX.
510 i8042_ctr |= I8042_CTR_AUXDIS;
511 i8042_ctr &= ~I8042_CTR_AUXINT;
513 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
514 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
518 i8042_mux_present = 1;
524 * The following is used to test AUX IRQ delivery.
526 static struct completion i8042_aux_irq_delivered __devinitdata;
527 static int i8042_irq_being_tested __devinitdata;
529 static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
532 unsigned char str, data;
534 spin_lock_irqsave(&i8042_lock, flags);
535 str = i8042_read_status();
536 if (str & I8042_STR_OBF) {
537 data = i8042_read_data();
538 if (i8042_irq_being_tested &&
539 data == 0xa5 && (str & I8042_STR_AUXDATA))
540 complete(&i8042_aux_irq_delivered);
542 spin_unlock_irqrestore(&i8042_lock, flags);
549 * i8042_check_aux() applies as much paranoia as it can at detecting
550 * the presence of an AUX interface.
553 static int __devinit i8042_check_aux(void)
556 int irq_registered = 0;
561 * Get rid of bytes in the queue.
567 * Internal loopback test - filters out AT-type i8042's. Unfortunately
568 * SiS screwed up and their 5597 doesn't support the LOOP command even
569 * though it has an AUX port.
573 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x5a) {
576 * External connection test - filters out AT-soldered PS/2 i8042's
577 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
578 * 0xfa - no error on some notebooks which ignore the spec
579 * Because it's common for chipsets to return error on perfectly functioning
580 * AUX ports, we test for this only when the LOOP command failed.
583 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
584 (param && param != 0xfa && param != 0xff))
589 * Bit assignment test - filters out PS/2 i8042's in AT mode
592 if (i8042_command(¶m, I8042_CMD_AUX_DISABLE))
594 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
595 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
596 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
599 if (i8042_command(¶m, I8042_CMD_AUX_ENABLE))
601 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
605 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
606 * used it for a PCI card or somethig else.
611 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
612 * is working and hope we are right.
618 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
619 "i8042", i8042_platform_device))
624 if (i8042_enable_aux_port())
627 spin_lock_irqsave(&i8042_lock, flags);
629 init_completion(&i8042_aux_irq_delivered);
630 i8042_irq_being_tested = 1;
633 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
635 spin_unlock_irqrestore(&i8042_lock, flags);
640 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
641 msecs_to_jiffies(250)) == 0) {
643 * AUX IRQ was never delivered so we need to flush the controller to
644 * get rid of the byte we put there; otherwise keyboard may not work.
653 * Disable the interface.
656 i8042_ctr |= I8042_CTR_AUXDIS;
657 i8042_ctr &= ~I8042_CTR_AUXINT;
659 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
663 free_irq(I8042_AUX_IRQ, i8042_platform_device);
668 static int i8042_controller_check(void)
670 if (i8042_flush() == I8042_BUFFER_SIZE) {
671 printk(KERN_ERR "i8042.c: No controller found.\n");
678 static int i8042_controller_selftest(void)
685 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
686 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
690 if (param != I8042_RET_CTL_TEST) {
691 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
692 param, I8042_RET_CTL_TEST);
700 * i8042_controller init initializes the i8042 controller, and,
701 * most importantly, sets it into non-xlated mode if that's
705 static int i8042_controller_init(void)
710 * Save the CTR for restoral on unload / reboot.
713 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
714 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
718 i8042_initial_ctr = i8042_ctr;
721 * Disable the keyboard interface and interrupt.
724 i8042_ctr |= I8042_CTR_KBDDIS;
725 i8042_ctr &= ~I8042_CTR_KBDINT;
731 spin_lock_irqsave(&i8042_lock, flags);
732 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
734 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
736 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
738 spin_unlock_irqrestore(&i8042_lock, flags);
741 * If the chip is configured into nontranslated mode by the BIOS, don't
742 * bother enabling translating and be happy.
745 if (~i8042_ctr & I8042_CTR_XLATE)
749 * Set nontranslated mode for the kbd interface if requested by an option.
750 * After this the kbd interface becomes a simple serial in/out, like the aux
751 * interface is. We don't do this by default, since it can confuse notebook
756 i8042_ctr &= ~I8042_CTR_XLATE;
762 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
763 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
772 * Reset the controller and reset CRT to the original value set by BIOS.
775 static void i8042_controller_reset(void)
780 * Disable MUX mode if present.
783 if (i8042_mux_present)
784 i8042_set_mux_mode(0, NULL);
787 * Reset the controller if requested.
790 i8042_controller_selftest();
793 * Restore the original control register setting.
796 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
797 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
802 * Here we try to reset everything back to a state in which the BIOS will be
803 * able to talk to the hardware when rebooting.
806 static void i8042_controller_cleanup(void)
811 * Reset anything that is connected to the ports.
814 for (i = 0; i < I8042_NUM_PORTS; i++)
815 if (i8042_ports[i].serio)
816 serio_cleanup(i8042_ports[i].serio);
818 i8042_controller_reset();
823 * i8042_panic_blink() will flash the keyboard LEDs and is called when
824 * kernel panics. Flashing LEDs is useful for users running X who may
825 * not see the console and will help distingushing panics from "real"
828 * Note that DELAY has a limit of 10ms so we will not get stuck here
829 * waiting for KBC to free up even if KBD interrupt is off
832 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
834 static long i8042_panic_blink(long count)
837 static long last_blink;
841 * We expect frequency to be about 1/2s. KDB uses about 1s.
842 * Make sure they are different.
844 if (!i8042_blink_frequency)
846 if (count - last_blink < i8042_blink_frequency)
850 while (i8042_read_status() & I8042_STR_IBF)
852 i8042_suppress_kbd_ack = 1;
853 i8042_write_data(0xed); /* set leds */
855 while (i8042_read_status() & I8042_STR_IBF)
858 i8042_suppress_kbd_ack = 1;
859 i8042_write_data(led);
868 * Here we try to restore the original BIOS settings
871 static int i8042_suspend(struct platform_device *dev, pm_message_t state)
873 i8042_controller_cleanup();
880 * Here we try to reset everything back to a state in which suspended
883 static int i8042_resume(struct platform_device *dev)
887 error = i8042_controller_check();
891 error = i8042_controller_selftest();
896 * Restore pre-resume CTR value and disable all ports
899 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
900 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
901 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
902 printk(KERN_ERR "i8042: Can't write CTR to resume\n");
906 if (i8042_mux_present) {
907 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
909 "i8042: failed to resume active multiplexor, "
910 "mouse won't work.\n");
911 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
912 i8042_enable_aux_port();
914 if (i8042_ports[I8042_KBD_PORT_NO].serio)
915 i8042_enable_kbd_port();
917 i8042_interrupt(0, NULL);
923 * We need to reset the 8042 back to original mode on system shutdown,
924 * because otherwise BIOSes will be confused.
927 static void i8042_shutdown(struct platform_device *dev)
929 i8042_controller_cleanup();
932 static int __devinit i8042_create_kbd_port(void)
935 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
937 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
941 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
942 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
943 serio->start = i8042_start;
944 serio->stop = i8042_stop;
945 serio->port_data = port;
946 serio->dev.parent = &i8042_platform_device->dev;
947 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
948 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
951 port->irq = I8042_KBD_IRQ;
956 static int __devinit i8042_create_aux_port(int idx)
959 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
960 struct i8042_port *port = &i8042_ports[port_no];
962 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
966 serio->id.type = SERIO_8042;
967 serio->write = i8042_aux_write;
968 serio->start = i8042_start;
969 serio->stop = i8042_stop;
970 serio->port_data = port;
971 serio->dev.parent = &i8042_platform_device->dev;
973 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
974 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
976 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
977 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
982 port->irq = I8042_AUX_IRQ;
987 static void __devinit i8042_free_kbd_port(void)
989 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
990 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
993 static void __devinit i8042_free_aux_ports(void)
997 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
998 kfree(i8042_ports[i].serio);
999 i8042_ports[i].serio = NULL;
1003 static void __devinit i8042_register_ports(void)
1007 for (i = 0; i < I8042_NUM_PORTS; i++) {
1008 if (i8042_ports[i].serio) {
1009 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1010 i8042_ports[i].serio->name,
1011 (unsigned long) I8042_DATA_REG,
1012 (unsigned long) I8042_COMMAND_REG,
1013 i8042_ports[i].irq);
1014 serio_register_port(i8042_ports[i].serio);
1019 static void __devinit i8042_unregister_ports(void)
1023 for (i = 0; i < I8042_NUM_PORTS; i++) {
1024 if (i8042_ports[i].serio) {
1025 serio_unregister_port(i8042_ports[i].serio);
1026 i8042_ports[i].serio = NULL;
1031 static void i8042_free_irqs(void)
1033 if (i8042_aux_irq_registered)
1034 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1035 if (i8042_kbd_irq_registered)
1036 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1038 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
1041 static int __devinit i8042_setup_aux(void)
1043 int (*aux_enable)(void);
1047 if (i8042_check_aux())
1050 if (i8042_nomux || i8042_check_mux()) {
1051 error = i8042_create_aux_port(-1);
1053 goto err_free_ports;
1054 aux_enable = i8042_enable_aux_port;
1056 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1057 error = i8042_create_aux_port(i);
1059 goto err_free_ports;
1061 aux_enable = i8042_enable_mux_ports;
1064 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1065 "i8042", i8042_platform_device);
1067 goto err_free_ports;
1072 i8042_aux_irq_registered = 1;
1076 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1078 i8042_free_aux_ports();
1082 static int __devinit i8042_setup_kbd(void)
1086 error = i8042_create_kbd_port();
1090 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1091 "i8042", i8042_platform_device);
1095 error = i8042_enable_kbd_port();
1099 i8042_kbd_irq_registered = 1;
1103 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1105 i8042_free_kbd_port();
1109 static int __devinit i8042_probe(struct platform_device *dev)
1113 error = i8042_controller_selftest();
1117 error = i8042_controller_init();
1122 error = i8042_setup_aux();
1123 if (error && error != -ENODEV && error != -EBUSY)
1128 error = i8042_setup_kbd();
1134 * Ok, everything is ready, let's register all serio ports
1136 i8042_register_ports();
1141 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1143 i8042_controller_reset();
1148 static int __devexit i8042_remove(struct platform_device *dev)
1150 i8042_unregister_ports();
1152 i8042_controller_reset();
1157 static struct platform_driver i8042_driver = {
1160 .owner = THIS_MODULE,
1162 .probe = i8042_probe,
1163 .remove = __devexit_p(i8042_remove),
1164 .suspend = i8042_suspend,
1165 .resume = i8042_resume,
1166 .shutdown = i8042_shutdown,
1169 static int __init i8042_init(void)
1175 err = i8042_platform_init();
1179 err = i8042_controller_check();
1181 goto err_platform_exit;
1183 err = platform_driver_register(&i8042_driver);
1185 goto err_platform_exit;
1187 i8042_platform_device = platform_device_alloc("i8042", -1);
1188 if (!i8042_platform_device) {
1190 goto err_unregister_driver;
1193 err = platform_device_add(i8042_platform_device);
1195 goto err_free_device;
1197 panic_blink = i8042_panic_blink;
1202 platform_device_put(i8042_platform_device);
1203 err_unregister_driver:
1204 platform_driver_unregister(&i8042_driver);
1206 i8042_platform_exit();
1211 static void __exit i8042_exit(void)
1213 platform_device_unregister(i8042_platform_device);
1214 platform_driver_unregister(&i8042_driver);
1215 i8042_platform_exit();
1220 module_init(i8042_init);
1221 module_exit(i8042_exit);