1 /* enternow_pci.c,v 0.99 2001/10/02
3 * enternow_pci.c Card-specific routines for
4 * Formula-n enter:now ISDN PCI ab
5 * Gerdes AG Power ISDN PCI
6 * Woerltronic SA 16 PCI
7 * (based on HiSax driver by Karsten Keil)
9 * Author Christoph Ersfeld <info@formula-n.de>
10 * Formula-n Europe AG (www.formula-n.com)
11 * previously Gerdes AG
14 * This file is (c) under GNU PUBLIC LICENSE
17 * This driver interfaces to netjet.c which performs B-channel
20 * Version 0.99 is the first release of this driver and there are
21 * certainly a few bugs.
22 * It isn't testet on linux 2.4 yet, so consider this code to be
25 * Please don't report me any malfunction without sending
26 * (compressed) debug-logs.
27 * It would be nearly impossible to retrace it.
29 * Log D-channel-processing as follows:
31 * 1. Load hisax with card-specific parameters, this example ist for
32 * Formula-n enter:now ISDN PCI and compatible
33 * (f.e. Gerdes Power ISDN PCI)
35 * modprobe hisax type=41 protocol=2 id=gerdes
37 * if you chose an other value for id, you need to modify the
42 * hisaxctrl gerdes 1 0x3ff
43 * hisaxctrl gerdes 11 0x4f
44 * cat /dev/isdnctrl >> ~/log &
46 * Please take also a look into /var/log/messages if there is
47 * anything importand concerning HISAX.
51 * Programming the driver for Formula-n enter:now ISDN PCI and
52 * necessary the driver for the used Amd 7930 D-channel-controller
53 * was spnsored by Formula-n Europe AG.
54 * Thanks to Karsten Keil and Petr Novak, who gave me support in
55 * Hisax-specific questions.
56 * I want so say special thanks to Carl-Friedrich Braun, who had to
57 * answer a lot of questions about generally ISDN and about handling
63 #include <linux/config.h>
67 #include "amd7930_fn.h"
69 #include <linux/interrupt.h>
70 #include <linux/ppp_defs.h>
71 #include <linux/pci.h>
72 #include <linux/init.h>
77 const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";
80 /* *************************** I/O-Interface functions ************************************* */
83 /* cs->readisac, macro rByteAMD */
85 ReadByteAmd7930(struct IsdnCardState *cs, BYTE offset)
87 /* direktes Register */
89 return (InByte(cs->hw.njet.isac + 4*offset));
91 /* indirektes Register */
93 OutByte(cs->hw.njet.isac + 4*AMD_CR, offset);
94 return(InByte(cs->hw.njet.isac + 4*AMD_DR));
98 /* cs->writeisac, macro wByteAMD */
100 WriteByteAmd7930(struct IsdnCardState *cs, BYTE offset, BYTE value)
102 /* direktes Register */
104 OutByte(cs->hw.njet.isac + 4*offset, value);
106 /* indirektes Register */
108 OutByte(cs->hw.njet.isac + 4*AMD_CR, offset);
109 OutByte(cs->hw.njet.isac + 4*AMD_DR, value);
115 enpci_setIrqMask(struct IsdnCardState *cs, BYTE val) {
117 OutByte(cs->hw.njet.base+NETJET_IRQMASK1, 0x00);
119 OutByte(cs->hw.njet.base+NETJET_IRQMASK1, TJ_AMD_IRQ);
123 static BYTE dummyrr(struct IsdnCardState *cs, int chan, BYTE off)
128 static void dummywr(struct IsdnCardState *cs, int chan, BYTE off, BYTE value)
134 /* ******************************************************************************** */
138 reset_enpci(struct IsdnCardState *cs)
140 if (cs->debug & L1_DEB_ISAC)
141 debugl1(cs, "enter:now PCI: reset");
143 /* Reset on, (also for AMD) */
144 cs->hw.njet.ctrl_reg = 0x07;
145 OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
148 cs->hw.njet.ctrl_reg = 0x30;
149 OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
152 cs->hw.njet.auxd = 0; // LED-status
153 cs->hw.njet.dmactrl = 0;
154 OutByte(cs->hw.njet.base + NETJET_AUXCTRL, ~TJ_AMD_IRQ);
155 OutByte(cs->hw.njet.base + NETJET_IRQMASK1, TJ_AMD_IRQ);
156 OutByte(cs->hw.njet.auxa, cs->hw.njet.auxd); // LED off
161 enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
166 if (cs->debug & L1_DEB_ISAC)
167 debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
171 spin_lock_irqsave(&cs->lock, flags);
174 spin_unlock_irqrestore(&cs->lock, flags);
177 release_io_netjet(cs);
182 /* irq must be on here */
188 /* TEI assigned, LED1 on */
189 cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
190 OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd);
193 /* TEI removed, LEDs off */
194 cs->hw.njet.auxd = 0;
195 OutByte(cs->hw.njet.base + NETJET_AUXDATA, 0x00);
198 /* activate B-channel */
201 if (cs->debug & L1_DEB_ISAC)
202 debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
204 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
205 /* at least one b-channel in use, LED 2 on */
206 cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
207 OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd);
210 /* deactivate B-channel */
213 if (cs->debug & L1_DEB_ISAC)
214 debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
216 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
217 /* no b-channel active -> LED2 off */
218 if (!(cs->dc.amd7930.lmr1 & 3)) {
219 cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
220 OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd);
231 enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
233 struct IsdnCardState *cs = dev_id;
234 BYTE s0val, s1val, ir;
237 spin_lock_irqsave(&cs->lock, flags);
238 s1val = InByte(cs->hw.njet.base + NETJET_IRQSTAT1);
240 /* AMD threw an interrupt */
241 if (!(s1val & TJ_AMD_IRQ)) {
242 /* read and clear interrupt-register */
243 ir = ReadByteAmd7930(cs, 0x00);
244 Amd7930_interrupt(cs, ir);
248 s0val = InByte(cs->hw.njet.base + NETJET_IRQSTAT0);
249 if ((s0val | s1val)==0) { // shared IRQ
250 spin_unlock_irqrestore(&cs->lock, flags);
254 OutByte(cs->hw.njet.base + NETJET_IRQSTAT0, s0val);
256 /* DMA-Interrupt: B-channel-stuff */
257 /* set bits in sval to indicate which page is free */
258 if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
259 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
260 /* the 2nd write page is free */
262 else /* the 1st write page is free */
264 if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
265 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
266 /* the 2nd read page is free */
267 s0val = s0val | 0x02;
268 else /* the 1st read page is free */
269 s0val = s0val | 0x01;
270 if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
272 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
273 spin_unlock_irqrestore(&cs->lock, flags);
276 cs->hw.njet.irqstat0 = s0val;
277 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
278 (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
279 /* we have a read dma int */
281 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
282 (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
283 /* we have a write dma int */
285 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
287 spin_unlock_irqrestore(&cs->lock, flags);
292 static struct pci_dev *dev_netjet __initdata = NULL;
294 /* called by config.c */
296 setup_enternow_pci(struct IsdnCard *card)
299 struct IsdnCardState *cs = card->cs;
304 #error "not running on big endian machines now"
306 strcpy(tmp, enternow_pci_rev);
307 printk(KERN_INFO "HiSax: Formula-n Europe AG enter:now ISDN PCI driver Rev. %s\n", HiSax_getrev(tmp));
308 if (cs->typ != ISDN_CTYPE_ENTERNOW)
310 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
314 if ((dev_netjet = pci_find_device(PCI_VENDOR_ID_TIGERJET,
315 PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
316 if (pci_enable_device(dev_netjet))
318 cs->irq = dev_netjet->irq;
320 printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n");
323 cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
324 if (!cs->hw.njet.base) {
325 printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n");
328 /* checks Sub-Vendor ID because system crashes with Traverse-Card */
329 if ((dev_netjet->subsystem_vendor != 0x55) ||
330 (dev_netjet->subsystem_device != 0x02)) {
331 printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
332 printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n");
336 printk(KERN_WARNING "enter:now PCI: No PCI card found\n");
340 cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
341 cs->hw.njet.isac = cs->hw.njet.base + 0xC0; // Fenster zum AMD
344 cs->hw.njet.ctrl_reg = 0x07; // geƤndert von 0xff
345 OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
349 cs->hw.njet.ctrl_reg = 0x30; /* Reset Off and status read clear */
350 OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
353 cs->hw.njet.auxd = 0x00; // war 0xc0
354 cs->hw.njet.dmactrl = 0;
356 OutByte(cs->hw.njet.base + NETJET_AUXCTRL, ~TJ_AMD_IRQ);
357 OutByte(cs->hw.njet.base + NETJET_IRQMASK1, TJ_AMD_IRQ);
358 OutByte(cs->hw.njet.auxa, cs->hw.njet.auxd);
364 printk(KERN_WARNING "enter:now PCI: NO_PCI_BIOS\n");
365 printk(KERN_WARNING "enter:now PCI: unable to config Formula-n enter:now ISDN PCI ab\n");
368 #endif /* CONFIG_PCI */
373 "enter:now PCI: PCI card configured at 0x%lx IRQ %d\n",
374 cs->hw.njet.base, cs->irq);
375 if (!request_region(cs->hw.njet.base, bytecnt, "Fn_ISDN")) {
377 "HiSax: %s config port %lx-%lx already in use\n",
380 cs->hw.njet.base + bytecnt);
384 cs->hw.njet.last_is0 = 0;
386 cs->readisac = &ReadByteAmd7930;
388 cs->writeisac = &WriteByteAmd7930;
389 cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
391 cs->BC_Read_Reg = &dummyrr;
392 cs->BC_Write_Reg = &dummywr;
393 cs->BC_Send_Data = &netjet_fill_dma;
394 cs->cardmsg = &enpci_card_msg;
395 cs->irq_func = &enpci_interrupt;
396 cs->irq_flags |= SA_SHIRQ;