drivers/mmc/omap.c

   1 /*
   2  *  linux/drivers/media/mmc/omap.c
   3  *
   4  *  Copyright (C) 2004 Nokia Corporation
   5  *  Written by Tuukka Tikkanen and Juha Yrjölä <juha.yrjola@nokia.com>
   6  *  Pin multiplexing and Innovator support by Tony Lindgren <tony@atomide.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/config.h>
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/init.h>
  17 #include <linux/ioport.h>
  18 #include <linux/device.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/dma-mapping.h>
  21 #include <linux/delay.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/timer.h>
  24 #include <linux/mmc/host.h>
  25 #include <linux/mmc/protocol.h>
  26 #include <linux/mmc/card.h>
  27
  28 #include <asm/io.h>
  29 #include <asm/irq.h>
  30 #include <asm/scatterlist.h>
  31 #include <asm/mach-types.h>
  32
  33 #include <asm/arch/board.h>
  34 #include <asm/arch/gpio.h>
  35 #include <asm/arch/dma.h>
  36 #include <asm/arch/mux.h>
  37 #include <asm/arch/fpga.h>
  38 #include <asm/arch/tps65010.h>
  39
  40 #include <asm/hardware/clock.h>
  41
  42 #include "omap.h"
  43
  44 #define DRIVER_NAME "mmci-omap"
  45
  46 #ifdef CONFIG_MMC_DEBUG
  47 //#define DBG(x...)     printk(KERN_DEBUG x)
  48 #define DBG(x...)       printk(x)
  49 #else
  50 #define DBG(x...)       do { } while (0)
  51 #endif
  52
  53 /* Specifies how often in millisecs to poll for card status changes
  54  * when the cover switch is open */
  55 #define OMAP_MMC_SWITCH_POLL_DELAY     500
  56
  57 static s16 mmc1_power_pin = -1,
  58            mmc2_power_pin = -1;
  59 static s16 mmc1_switch_pin = -1,
  60            mmc2_switch_pin = -1;
  61
  62 static int mmc_omap_enable_poll = 1;
  63
  64 struct mmc_omap_host {
  65         int                     initialized;
  66         int                     suspended;
  67         struct mmc_request *    mrq;
  68         struct mmc_command *    cmd;
  69         struct mmc_data *       data;
  70         struct mmc_host *       mmc;
  71         struct device *         dev;
  72         unsigned char           id; /* 16xx chips have 2 MMC blocks */
  73         struct clk *            clk;
  74         void __iomem            *base;
  75         int irq;
  76         unsigned char           bus_mode;
  77         unsigned int            dma_len;
  78 #define OMAP_MMC_DATADIR_NONE   0
  79 #define OMAP_MMC_DATADIR_READ   1
  80 #define OMAP_MMC_DATADIR_WRITE  2
  81         unsigned char           datadir;
  82         u16 * buffer;
  83         u32 bytesleft;
  84         int                     power_pin;
  85
  86         int                     use_dma, dma_ch;
  87         struct completion       dma_completion;
  88
  89         int                     switch_pin;
  90         struct work_struct      switch_work;
  91         struct timer_list       switch_timer;
  92         int                     switch_last_state;
  93
  94         unsigned char           sd_support;
  95 };
  96
  97 static inline int
  98 mmc_omap_cover_is_open(struct mmc_omap_host *host)
  99 {
 100         if (host->switch_pin < 0)
 101                 return 0;
 102         return omap_get_gpio_datain(host->switch_pin);
 103 }
 104
 105 static ssize_t
 106 mmc_omap_show_cover_switch(struct device *dev, char *buf)
 107 {
 108         struct mmc_omap_host *host = dev_get_drvdata(dev);
 109
 110         return sprintf(buf, "%s\n", mmc_omap_cover_is_open(host) ? "open" : "closed");
 111 }
 112
 113 static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
 114
 115 static ssize_t
 116 mmc_omap_show_enable_poll(struct device *dev, char *buf)
 117 {
 118         return snprintf(buf, PAGE_SIZE, "%d\n", mmc_omap_enable_poll);
 119 }
 120
 121 static ssize_t
 122 mmc_omap_store_enable_poll(struct device *dev, const char *buf, size_t size)
 123 {
 124         int enable_poll;
 125
 126         if (sscanf(buf, "%10d", &enable_poll) != 1)
 127                 return -EINVAL;
 128
 129         if (enable_poll != mmc_omap_enable_poll) {
 130                 struct mmc_omap_host *host = dev_get_drvdata(dev);
 131
 132                 mmc_omap_enable_poll = enable_poll;
 133                 if (enable_poll && host->switch_pin >= 0)
 134                         schedule_work(&host->switch_work);
 135         }
 136         return size;
 137 }
 138
 139 static DEVICE_ATTR(enable_poll, 0664,
 140                    mmc_omap_show_enable_poll, mmc_omap_store_enable_poll);
 141
 142 static void
 143 mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
 144 {
 145         u32 cmdreg;
 146         u32 resptype;
 147         u32 cmdtype;
 148
 149         DBG("MMC%d: CMD%d, argument 0x%08x", host->id, cmd->opcode, cmd->arg);
 150         if (cmd->flags & MMC_RSP_SHORT)
 151                 DBG(", 32-bit response");
 152         if (cmd->flags & MMC_RSP_LONG)
 153                 DBG(", 128-bit response");
 154         if (cmd->flags & MMC_RSP_CRC)
 155                 DBG(", CRC");
 156         if (cmd->flags & MMC_RSP_BUSY)
 157                 DBG(", busy notification");
 158         DBG("\n");
 159
 160         host->cmd = cmd;
 161
 162         resptype = 0;
 163         cmdtype = 0;
 164
 165         /* Protocol layer does not provide response type,
 166          * but our hardware needs to know exact type, not just size!
 167          */
 168         switch (cmd->flags & MMC_RSP_MASK) {
 169         case MMC_RSP_NONE:
 170                 /* resp 0 */
 171                 break;
 172         case MMC_RSP_SHORT:
 173                 /* resp 1, resp 1b */
 174                 /* OR resp 3!! (assume this if bus is set opendrain) */
 175                 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 176                         resptype = 3;
 177                 else
 178                         resptype = 1;
 179                 break;
 180         case MMC_RSP_LONG:
 181                 /* resp 2 */
 182                 resptype = 2;
 183                 break;
 184         }
 185
 186         /* Protocol layer does not provide command type, but our hardware
 187          * needs it!
 188          * any data transfer means adtc type (but that information is not
 189          * in command structure, so we flagged it into host struct.)
 190          * However, telling bc, bcr and ac apart based on response is
 191          * not foolproof:
 192          * CMD0  = bc  = resp0  CMD15 = ac  = resp0
 193          * CMD2  = bcr = resp2  CMD10 = ac  = resp2
 194          *
 195          * Resolve to best guess with some exception testing:
 196          * resp0 -> bc, except CMD15 = ac
 197          * rest are ac, except if opendrain
 198          */
 199         if (host->datadir) {
 200                 cmdtype = OMAP_MMC_CMDTYPE_ADTC;
 201         } else if (resptype == 0 && cmd->opcode != 15) {
 202                 cmdtype = OMAP_MMC_CMDTYPE_BC;
 203         } else if (host->bus_mode == MMC_BUSMODE_OPENDRAIN) {
 204                 cmdtype = OMAP_MMC_CMDTYPE_BCR;
 205         } else {
 206                 cmdtype = OMAP_MMC_CMDTYPE_AC;
 207         }
 208
 209         cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12);
 210
 211         if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 212                 cmdreg |= 1 << 6;
 213
 214         if (cmd->flags & MMC_RSP_BUSY)
 215                 cmdreg |= 1 << 11;
 216
 217         if (host->datadir == OMAP_MMC_DATADIR_READ)
 218                 cmdreg |= 1 << 15;
 219
 220         clk_use(host->clk);
 221
 222         OMAP_MMC_WRITE(host->base, CTO, 200);
 223         OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff);
 224         OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16);
 225         OMAP_MMC_WRITE(host->base, IE,
 226                        OMAP_MMC_STAT_A_EMPTY    | OMAP_MMC_STAT_A_FULL    |
 227                        OMAP_MMC_STAT_CMD_CRC    | OMAP_MMC_STAT_CMD_TOUT  |
 228                        OMAP_MMC_STAT_DATA_CRC   | OMAP_MMC_STAT_DATA_TOUT |
 229                        OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR  |
 230                        OMAP_MMC_STAT_END_OF_DATA);
 231         OMAP_MMC_WRITE(host->base, CMD, cmdreg);
 232 }
 233
 234 static void
 235 mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
 236 {
 237         host->data = NULL;
 238         host->datadir = OMAP_MMC_DATADIR_NONE;
 239
 240         if (data->error == MMC_ERR_NONE)
 241                 data->bytes_xfered += data->blocks * (1<<data->blksz_bits);
 242         else {
 243                 int dma_ch = host->dma_ch;
 244
 245                 /* We got an error, let's free the DMA channel if it's
 246                  * still allocated. */
 247                 if (dma_ch != -1) {
 248                         host->dma_ch = -1;
 249                         omap_free_dma(dma_ch);
 250                 }
 251         }
 252
 253         dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
 254                      host->datadir);
 255         host->dma_len = 0;
 256
 257         clk_unuse(host->clk);
 258
 259         if (!data->stop) {
 260                 host->mrq = NULL;
 261                 mmc_request_done(host->mmc, data->mrq);
 262                 return;
 263         }
 264
 265         mmc_omap_start_command(host, data->stop);
 266 }
 267
 268
 269 static void
 270 mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
 271 {
 272         host->cmd = NULL;
 273
 274         switch (cmd->flags & MMC_RSP_MASK) {
 275         case MMC_RSP_NONE:
 276                 /* resp 0 */
 277                 break;
 278         case MMC_RSP_SHORT:
 279                 /* response types 1, 1b, 3, 4, 5, 6 */
 280                 cmd->resp[0] =
 281                         OMAP_MMC_READ(host->base, RSP6) |
 282                         (OMAP_MMC_READ(host->base, RSP7) << 16);
 283                 DBG("MMC%d: Response %08x\n", host->id, cmd->resp[0]);
 284                 break;
 285         case MMC_RSP_LONG:
 286                 /* response type 2 */
 287                 cmd->resp[3] =
 288                         OMAP_MMC_READ(host->base, RSP0) |
 289                         (OMAP_MMC_READ(host->base, RSP1) << 16);
 290                 cmd->resp[2] =
 291                         OMAP_MMC_READ(host->base, RSP2) |
 292                         (OMAP_MMC_READ(host->base, RSP3) << 16);
 293                 cmd->resp[1] =
 294                         OMAP_MMC_READ(host->base, RSP4) |
 295                         (OMAP_MMC_READ(host->base, RSP5) << 16);
 296                 cmd->resp[0] =
 297                         OMAP_MMC_READ(host->base, RSP6) |
 298                         (OMAP_MMC_READ(host->base, RSP7) << 16);
 299                 DBG("MMC%d: Response %08x %08x %08x %08x\n", host->id,
 300                     cmd->resp[0], cmd->resp[1],
 301                     cmd->resp[2], cmd->resp[3]);
 302                 break;
 303         }
 304
 305         if (host->data == NULL || cmd->error != MMC_ERR_NONE) {
 306                 DBG("MMC%d: End request, err %x\n", host->id, cmd->error);
 307                 host->mrq = NULL;
 308                 clk_unuse(host->clk);
 309                 mmc_request_done(host->mmc, cmd->mrq);
 310         }
 311 }
 312
 313 static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
 314 {
 315         struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id;
 316         u16 status;
 317         int end_command;
 318         int end_transfer;
 319         int ii;
 320
 321         if (host->cmd == NULL && host->data == NULL) {
 322                 status = OMAP_MMC_READ(host->base, STAT);
 323                 printk(KERN_INFO "MMC%d: Spurious interrupt 0x%04x\n", host->id, status);
 324                 if (status != 0) {
 325                         OMAP_MMC_WRITE(host->base, STAT, status);
 326                         OMAP_MMC_WRITE(host->base, IE, 0);
 327                 }
 328                 return IRQ_HANDLED;
 329         }
 330
 331         end_command = 0;
 332         end_transfer = 0;
 333
 334         while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) {
 335                 OMAP_MMC_WRITE(host->base, STAT, status); // Reset status bits
 336                 DBG("\tMMC IRQ %04x (cmd %d)\n", status,
 337                     host->cmd != NULL ? host->cmd->opcode : -1);
 338
 339                 if ((status & OMAP_MMC_STAT_A_FULL) ||
 340                     ((status & OMAP_MMC_STAT_END_OF_DATA) &&
 341                      (host->bytesleft > 0))) {
 342                         // Buffer almost full
 343                         ii = host->bytesleft / 2;
 344                         if (ii > 32)
 345                                 ii = 32;
 346                         host->bytesleft -= ii * 2;
 347                         while (ii-- > 0)
 348                                 *host->buffer++ = OMAP_MMC_READ(host->base, DATA);
 349                 }
 350
 351                 if (status & OMAP_MMC_STAT_A_EMPTY) {
 352                         // Buffer almost empty
 353                         ii = host->bytesleft / 2;
 354                         if (ii > 32)
 355                                 ii = 32;
 356                         host->bytesleft -= ii * 2;
 357                         while (ii-- > 0)
 358                                 OMAP_MMC_WRITE(host->base, DATA, *host->buffer++);
 359                 }
 360
 361                 if (status & OMAP_MMC_STAT_END_OF_DATA) {
 362                         // Block sent/received
 363                         end_transfer = 1;
 364                 }
 365
 366                 if (status & OMAP_MMC_STAT_DATA_TOUT) {
 367                         // Data timeout
 368                         printk(KERN_DEBUG "MMC%d: Data timeout\n", host->id);
 369                         if (host->data) {
 370                                 host->data->error |= MMC_ERR_TIMEOUT;
 371                                 end_transfer = 1;
 372                         }
 373                 }
 374
 375                 if (status & OMAP_MMC_STAT_DATA_CRC) {
 376                         // Data CRC error
 377                         if (host->data) {
 378                                 host->data->error |= MMC_ERR_BADCRC;
 379                                 printk(KERN_DEBUG "MMC%d: Data CRC error, bytes left %d\n",
 380                                        host->id, host->bytesleft);
 381                                 end_transfer = 1;
 382                         } else {
 383                                 printk(KERN_DEBUG "MMC%d: Data CRC error\n",
 384                                        host->id);
 385                         }
 386                 }
 387
 388                 if (status & OMAP_MMC_STAT_CMD_TOUT) {
 389                         // Command timeout
 390                         if (host->cmd) {
 391                                 /* Timeouts are normal in case of MMC_SEND_STATUS */
 392                                 if (host->cmd->opcode != MMC_ALL_SEND_CID &&
 393                                     host->cmd->opcode != MMC_SEND_OP_COND &&
 394                                     !mmc_omap_cover_is_open(host))
 395                                         printk(KERN_ERR "MMC%d: Command timeout, CMD%d\n",
 396                                                host->id, host->cmd->opcode);
 397                                 host->cmd->error |= MMC_ERR_TIMEOUT;
 398                                 end_command = 1;
 399                         }
 400                 }
 401
 402                 if (status & OMAP_MMC_STAT_CMD_CRC) {
 403                         // Command CRC error
 404                         printk(KERN_ERR "MMC%d: Command CRC error\n", host->id);
 405                         if (host->cmd) {
 406                                 host->cmd->error |= MMC_ERR_BADCRC;
 407                                 end_command = 1;
 408                         }
 409                 }
 410
 411                 if (status & OMAP_MMC_STAT_OCR_BUSY) {
 412                         // OCR Busy
 413                         if (host->cmd && host->cmd->opcode != MMC_SEND_OP_COND &&
 414                             host->cmd->opcode != MMC_SET_RELATIVE_ADDR) {
 415                                 printk(KERN_DEBUG "MMC%d: OCR busy error, CMD%d\n",
 416                                        host->id, host->cmd->opcode);
 417                         }
 418                 }
 419
 420                 if (status & OMAP_MMC_STAT_CARD_ERR) {
 421                         // Card status error
 422                         printk(KERN_DEBUG "MMC%d: Card status error (CMD%d)\n",
 423                                host->id, host->cmd->opcode);
 424                         if (host->cmd) {
 425                                 host->cmd->error |= MMC_ERR_FAILED;
 426                                 end_command = 1;
 427                         }
 428                         if (host->data) {
 429                                 host->data->error |= MMC_ERR_FAILED;
 430                                 end_transfer = 1;
 431                         }
 432                 }
 433
 434                 /*
 435                  * NOTE: On 1610 the END_OF_CMD may come too early when
 436                  *       starting a write
 437                  */
 438                 if ((status & OMAP_MMC_STAT_END_OF_CMD) &&
 439                     (!(status & OMAP_MMC_STAT_A_EMPTY))) {
 440                         // End of command phase
 441                         end_command = 1;
 442                 }
 443         }
 444
 445         if (end_command) {
 446                 mmc_omap_cmd_done(host, host->cmd);
 447         }
 448         if (end_transfer) {
 449                 mmc_omap_xfer_done(host, host->data);
 450         }
 451
 452         return IRQ_HANDLED;
 453 }
 454
 455 static irqreturn_t mmc_omap_switch_irq(int irq, void *dev_id, struct pt_regs *regs)
 456 {
 457         struct mmc_omap_host *host = (struct mmc_omap_host *) dev_id;
 458
 459         DBG("MMC%d cover is now %s\n", host->id,
 460             omap_get_gpio_datain(host->switch_pin) ? "open" : "closed");
 461         schedule_work(&host->switch_work);
 462
 463         return IRQ_HANDLED;
 464 }
 465
 466 static void mmc_omap_switch_timer(unsigned long arg)
 467 {
 468         struct mmc_omap_host *host = (struct mmc_omap_host *) arg;
 469
 470         schedule_work(&host->switch_work);
 471 }
 472
 473 static void mmc_omap_switch_handler(void *data)
 474 {
 475         struct mmc_omap_host *host = (struct mmc_omap_host *) data;
 476         struct mmc_card *card;
 477         static int complained = 0;
 478         int cards = 0, cover_open;
 479
 480         if (host->switch_pin == -1)
 481                 return;
 482         cover_open = mmc_omap_cover_is_open(host);
 483         if (cover_open != host->switch_last_state) {
 484                 kobject_uevent(&host->dev->kobj, KOBJ_CHANGE, &dev_attr_cover_switch.attr);
 485                 host->switch_last_state = cover_open;
 486         }
 487         DBG("MMC cover switch handler started\n");
 488         mmc_detect_change(host->mmc);
 489         list_for_each_entry(card, &host->mmc->cards, node) {
 490                 if (mmc_card_present(card))
 491                         cards++;
 492         }
 493         DBG("MMC%d: %d card(s) present\n", host->id, cards);
 494         if (mmc_omap_cover_is_open(host)) {
 495                 if (!complained) {
 496                         printk(KERN_INFO "MMC%d: cover is open\n", host->id);
 497                         complained = 1;
 498                 }
 499                 if (mmc_omap_enable_poll)
 500                         mod_timer(&host->switch_timer, jiffies +
 501                                 msecs_to_jiffies(OMAP_MMC_SWITCH_POLL_DELAY));
 502         } else {
 503                 complained = 0;
 504         }
 505 }
 506
 507 static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
 508 {
 509         struct mmc_omap_host *host = (struct mmc_omap_host *) data;
 510         int dma_ch;
 511
 512         /* FIXME: We ignore the possible errors for now. */
 513         if (host->dma_ch < 0) {
 514                 printk(KERN_ERR "MMC%d: DMA callback while DMA not enabled?\n",
 515                        host->id);
 516                 return;
 517         }
 518         dma_ch = host->dma_ch;
 519         host->dma_ch = -1;
 520
 521         omap_free_dma(dma_ch);
 522         complete(&host->dma_completion);
 523 }
 524
 525 static int
 526 mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req)
 527 {
 528         int sync_dev, dma_ch, r;
 529         const char *dev_name;
 530         struct mmc_data *data = req->data;
 531         u16 buf, frame;
 532         u32 words;
 533
 534         /* If for some reason the DMA transfer is still active,
 535          * we wait for it to complete. This shouldn't normally happen. */
 536         if (host->dma_ch != -1)
 537                 wait_for_completion(&host->dma_completion);
 538
 539         init_completion(&host->dma_completion);
 540
 541         if (!(data->flags & MMC_DATA_WRITE)) {
 542                 if (host->id == 1) {
 543                         sync_dev = OMAP_DMA_MMC_RX;
 544                         dev_name = "MMC1 read";
 545                 } else {
 546                         sync_dev = OMAP_DMA_MMC2_RX;
 547                         dev_name = "MMC2 read";
 548                 }
 549         } else {
 550                 if (host->id == 1) {
 551                         sync_dev = OMAP_DMA_MMC_TX;
 552                         dev_name = "MMC1 write";
 553                 } else {
 554                         sync_dev = OMAP_DMA_MMC2_TX;
 555                         dev_name = "MMC2 write";
 556                 }
 557         }
 558         r = omap_request_dma(sync_dev, dev_name, mmc_omap_dma_cb,
 559                         host, &dma_ch);
 560         if (r != 0) {
 561                 printk("MMC%d: omap_request_dma() failed with %d\n",
 562                                 host->id, r);
 563                 return r;
 564         }
 565
 566         /* FIFO is 32x2 bytes; use 32 word frames when possible */
 567         frame = 1 << (data->blksz_bits - 1);
 568         words = data->blocks * frame;
 569         if (frame > 32)
 570                 frame = 32;
 571
 572         if (!(data->flags & MMC_DATA_WRITE)) {
 573                 buf = 0x800f | ((frame - 1) << 8);
 574                 omap_set_dma_src_params(dma_ch, OMAP_DMA_PORT_TIPB,
 575                                 OMAP_DMA_AMODE_CONSTANT,
 576                                 virt_to_phys((void __force *)host->base)
 577                                                 + OMAP_MMC_REG_DATA);
 578                 omap_set_dma_dest_params(dma_ch, OMAP_DMA_PORT_EMIFF,
 579                                 OMAP_DMA_AMODE_POST_INC,
 580                                 data->sg->dma_address);
 581                 omap_set_dma_dest_data_pack(dma_ch, 1);
 582                 omap_set_dma_dest_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
 583         } else {
 584                 buf = 0x0f80 | ((frame - 1) << 0);
 585                 omap_set_dma_dest_params(dma_ch, OMAP_DMA_PORT_TIPB,
 586                                 OMAP_DMA_AMODE_CONSTANT,
 587                                 virt_to_phys((void __force *)host->base)
 588                                                 + OMAP_MMC_REG_DATA);
 589                 omap_set_dma_src_params(dma_ch, OMAP_DMA_PORT_EMIFF,
 590                                 OMAP_DMA_AMODE_POST_INC,
 591                                 data->sg->dma_address);
 592                 omap_set_dma_src_data_pack(dma_ch, 1);
 593                 omap_set_dma_src_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
 594         }
 595
 596         /* blocksize is usually 512 bytes; but not for some SD reads */
 597         OMAP_MMC_WRITE(host->base, BUF, buf);
 598         omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
 599                 frame, words / frame, OMAP_DMA_SYNC_FRAME);
 600
 601         host->dma_ch = dma_ch;
 602         omap_start_dma(dma_ch);
 603
 604         return 0;
 605 }
 606
 607 static inline void
 608 set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req)
 609 {
 610         u16 reg;
 611
 612         reg = OMAP_MMC_READ(host->base, SDIO);
 613         reg &= ~(1 << 5);
 614         OMAP_MMC_WRITE(host->base, SDIO, reg);
 615         /* Set maximum timeout */
 616         OMAP_MMC_WRITE(host->base, CTO, 0xff);
 617 }
 618
 619 static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
 620 {
 621         int timeout;
 622         u16 reg;
 623
 624         /* Convert ns to clock cycles by assuming 20MHz frequency
 625          * 1 cycle at 20MHz = 500 ns
 626          */
 627         timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
 628
 629         /* Some cards require more time to do at least the first read operation */
 630         timeout = timeout << 4;
 631
 632         /* Check if we need to use timeout multiplier register */
 633         reg = OMAP_MMC_READ(host->base, SDIO);
 634         if (timeout > 0xffff) {
 635                 reg |= (1 << 5);
 636                 timeout /= 1024;
 637         } else
 638                 reg &= ~(1 << 5);
 639         OMAP_MMC_WRITE(host->base, SDIO, reg);
 640         OMAP_MMC_WRITE(host->base, DTO, timeout);
 641 }
 642
 643 static void mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
 644 {
 645         struct mmc_data *data = req->data;
 646         enum dma_data_direction dma_data_dir;
 647
 648         host->data = data;
 649         if (data == NULL) {
 650                 host->datadir = OMAP_MMC_DATADIR_NONE;
 651                 OMAP_MMC_WRITE(host->base, BLEN, 0);
 652                 OMAP_MMC_WRITE(host->base, NBLK, 0);
 653                 OMAP_MMC_WRITE(host->base, BUF, 0);
 654                 set_cmd_timeout(host, req);
 655                 return;
 656         }
 657
 658         DBG("MMC%d: Data xfer (%s %s), DTO %d cycles + %d ns, %d blocks of %d bytes\n",
 659             host->id, (data->flags & MMC_DATA_STREAM) ? "stream" : "block",
 660             (data->flags & MMC_DATA_WRITE) ? "write" : "read",
 661             data->timeout_clks, data->timeout_ns, data->blocks,
 662             1 << data->blksz_bits);
 663
 664         OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
 665         OMAP_MMC_WRITE(host->base, BLEN, (1 << data->blksz_bits) - 1);
 666         set_data_timeout(host, req);
 667
 668         if (data->flags & MMC_DATA_WRITE) {
 669                 host->datadir = OMAP_MMC_DATADIR_WRITE;
 670                 dma_data_dir = DMA_TO_DEVICE;
 671         } else {
 672                 host->datadir = OMAP_MMC_DATADIR_READ;
 673                 dma_data_dir = DMA_FROM_DEVICE;
 674         }
 675
 676         host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
 677                                    dma_data_dir);
 678
 679         /* No SG-DMA */
 680         if (unlikely(host->dma_len > 1))
 681                 BUG();
 682
 683         if (host->use_dma) {
 684                 if (mmc_omap_start_dma_transfer(host, req) == 0) {
 685                         host->buffer = NULL;
 686                         host->bytesleft = 0;
 687                 }
 688         } else {
 689                 /* Revert to CPU copy */
 690                 OMAP_MMC_WRITE(host->base, BUF, 0x1f1f);
 691                 host->buffer = page_address(data->sg->page) + data->sg->offset;
 692                 host->bytesleft = data->blocks * (1 << data->blksz_bits);
 693                 host->dma_ch = -1;
 694         }
 695 }
 696
 697 static inline int is_broken_card(struct mmc_card *card)
 698 {
 699         int i;
 700         struct mmc_cid *c = &card->cid;
 701         static const struct broken_card_cid {
 702                 unsigned int manfid;
 703                 char prod_name[8];
 704                 unsigned char hwrev;
 705                 unsigned char fwrev;
 706         } broken_cards[] = {
 707                 { 0x00150000, "\x30\x30\x30\x30\x30\x30\x15\x00", 0x06, 0x03 },
 708         };
 709
 710         for (i = 0; i < sizeof(broken_cards)/sizeof(broken_cards[0]); i++) {
 711                 const struct broken_card_cid *b = broken_cards + i;
 712
 713                 if (b->manfid != c->manfid)
 714                         continue;
 715                 if (memcmp(b->prod_name, c->prod_name, sizeof(b->prod_name)) != 0)
 716                         continue;
 717                 if (b->hwrev != c->hwrev || b->fwrev != c->fwrev)
 718                         continue;
 719                 return 1;
 720         }
 721         return 0;
 722 }
 723
 724 static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
 725 {
 726         struct mmc_omap_host *host = mmc_priv(mmc);
 727
 728         WARN_ON(host->mrq != NULL);
 729
 730         host->mrq = req;
 731
 732         /* Some cards (vendor left unnamed to protect the guilty) seem to
 733          * require this delay after power-up. Otherwise we'll get mysterious
 734          * data timeouts. */
 735         if (req->cmd->opcode == MMC_SEND_CSD) {
 736                 struct mmc_card *card;
 737                 int broken_present = 0;
 738
 739                 list_for_each_entry(card, &mmc->cards, node) {
 740                         if (is_broken_card(card)) {
 741                                 broken_present = 1;
 742                                 break;
 743                         }
 744                 }
 745                 if (broken_present) {
 746                         static int complained = 0;
 747
 748                         if (!complained) {
 749                                 printk(KERN_WARNING "MMC%d: Broken card workaround enabled\n",
 750                                        host->id);
 751                                 complained = 1;
 752                         }
 753                         if (in_interrupt()) {
 754                                 /* This is nasty */
 755                                  printk(KERN_ERR "Sleeping in IRQ handler, FIXME please!\n");
 756                                  dump_stack();
 757                                  mdelay(100);
 758                         } else {
 759                                 set_current_state(TASK_UNINTERRUPTIBLE);
 760                                 schedule_timeout(100 * HZ / 1000);
 761                         }
 762                 }
 763         }
 764
 765         mmc_omap_prepare_data(host, req);
 766         mmc_omap_start_command(host, req->cmd);
 767 }
 768
 769 static void innovator_fpga_socket_power(int on)
 770 {
 771 #if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP1510)
 772
 773         if (on) {
 774                 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
 775                      OMAP1510_FPGA_POWER);
 776         } else {
 777                 fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3),
 778                      OMAP1510_FPGA_POWER);
 779         }
 780 #endif
 781 }
 782
 783 /*
 784  * Turn the socket power on/off. Innovator uses FPGA, most boards
 785  * probably use GPIO.
 786  */
 787 static void mmc_omap_power(struct mmc_omap_host *host, int on)
 788 {
 789         if (on) {
 790                 if (machine_is_omap_innovator())
 791                         innovator_fpga_socket_power(1);
 792                 else if (machine_is_omap_h2())
 793                         tps65010_set_gpio_out_value(GPIO3, HIGH);
 794                 else if (machine_is_omap_h3())
 795                         /* GPIO 4 of TPS65010 sends SD_EN signal */
 796                         tps65010_set_gpio_out_value(GPIO4, HIGH);
 797                 else
 798                         if (host->power_pin >= 0)
 799                                 omap_set_gpio_dataout(host->power_pin, 1);
 800         } else {
 801                 if (machine_is_omap_innovator())
 802                         innovator_fpga_socket_power(0);
 803                 else if (machine_is_omap_h2())
 804                         tps65010_set_gpio_out_value(GPIO3, LOW);
 805                 else if (machine_is_omap_h3())
 806                         tps65010_set_gpio_out_value(GPIO4, LOW);
 807                 else
 808                         if (host->power_pin >= 0)
 809                                 omap_set_gpio_dataout(host->power_pin, 0);
 810         }
 811 }
 812
 813 static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 814 {
 815         struct mmc_omap_host *host = mmc_priv(mmc);
 816         int dsor;
 817         int realclock, i;
 818
 819         DBG("MMC%d: set_ios: clock %dHz busmode %d powermode %d Vdd %d.%02d\n",
 820             host->id, ios->clock, ios->bus_mode, ios->power_mode,
 821             ios->vdd / 100, ios->vdd % 100);
 822
 823         if (ios->power_mode == MMC_POWER_UP && ios->clock < 400000) {
 824                 /* Fix for broken stack */
 825                 realclock = 400000;
 826         } else {
 827                 realclock = ios->clock;
 828         }
 829
 830         if (ios->clock == 0) {
 831                 dsor = 0;
 832         } else {
 833                 dsor = 48000000 / realclock;
 834                 if (dsor < 1)
 835                         dsor = 1;
 836
 837                 if (48000000 / dsor > realclock)
 838                         dsor++;
 839
 840                 if (dsor > 250)
 841                         dsor = 250;
 842         }
 843
 844         switch (ios->power_mode) {
 845         case MMC_POWER_OFF:
 846                 mmc_omap_power(host, 0);
 847                 break;
 848         case MMC_POWER_UP:
 849         case MMC_POWER_ON:
 850                 mmc_omap_power(host, 1);
 851                 dsor |= 1<<11;
 852                 break;
 853         }
 854
 855         host->bus_mode = ios->bus_mode;
 856         clk_use(host->clk);
 857         /* On insanely high arm_per frequencies something sometimes
 858          * goes somehow out of sync, and the POW bit is not being set,
 859          * which results in the while loop below getting stuck.
 860          * Writing to the CON register twice seems to do the trick. */
 861         for (i = 0; i < 2; i++)
 862                 OMAP_MMC_WRITE(host->base, CON, dsor);
 863         if (ios->power_mode == MMC_POWER_UP) {
 864                 /* Send clock cycles, poll completion */
 865                 OMAP_MMC_WRITE(host->base, IE, 0);
 866                 OMAP_MMC_WRITE(host->base, STAT, 0xffff);
 867                 OMAP_MMC_WRITE(host->base, CMD, 1<<7);
 868                 while (0 == (OMAP_MMC_READ(host->base, STAT) & 1));
 869                 OMAP_MMC_WRITE(host->base, STAT, 1);
 870         }
 871         clk_unuse(host->clk);
 872 }
 873
 874 static struct mmc_host_ops mmc_omap_ops = {
 875         .request        = mmc_omap_request,
 876         .set_ios        = mmc_omap_set_ios,
 877 };
 878
 879 static int __init mmc_omap_probe(struct device *dev)
 880 {
 881         struct platform_device *pdev = to_platform_device(dev);
 882         struct mmc_host *mmc;
 883         struct mmc_omap_host *host = NULL;
 884         int ret = 0;
 885
 886         if (pdev->resource[0].flags != IORESOURCE_MEM
 887             || pdev->resource[1].flags != IORESOURCE_IRQ) {
 888                 printk(KERN_ERR "mmc_omap_probe: invalid resource type\n");
 889                 return -ENODEV;
 890         }
 891
 892         if (!request_mem_region(pdev->resource[0].start,
 893                                 pdev->resource[0].end - pdev->resource[0].start + 1,
 894                                 pdev->name)) {
 895                 dev_dbg(&pdev->dev, "request_mem_region failed\n");
 896                 return -EBUSY;
 897         }
 898
 899         mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), dev);
 900         if (!mmc) {
 901                 ret = -ENOMEM;
 902                 goto out;
 903         }
 904
 905         host = mmc_priv(mmc);
 906         host->mmc = mmc;
 907
 908         host->id = (pdev->resource[0].start == IO_ADDRESS(OMAP_MMC1_BASE)) ? 1 : 2;
 909
 910         host->clk = clk_get(dev, (host->id == 1) ? "mmc1_ck" : "mmc2_ck");
 911         if (IS_ERR(host->clk)) {
 912                 ret = PTR_ERR(host->clk);
 913                 goto out;
 914         }
 915
 916         if (host->id == 1) {
 917                 omap_cfg_reg(MMC_CMD);
 918                 omap_cfg_reg(MMC_CLK);
 919                 omap_cfg_reg(MMC_DAT0);
 920                 if (cpu_is_omap1710()) {
 921                       omap_cfg_reg(M15_1710_MMC_CLKI);
 922                       omap_cfg_reg(P19_1710_MMC_CMDDIR);
 923                       omap_cfg_reg(P20_1710_MMC_DATDIR0);
 924                 }
 925                 if (host->sd_support) {
 926                         omap_cfg_reg(MMC_DAT1);
 927                         omap_cfg_reg(MMC_DAT2);
 928                         omap_cfg_reg(MMC_DAT3);
 929                 }
 930                 host->power_pin = mmc1_power_pin;
 931                 host->switch_pin = mmc1_switch_pin;
 932         } else {
 933                 omap_cfg_reg(Y8_1610_MMC2_CMD);
 934                 omap_cfg_reg(Y10_1610_MMC2_CLK);
 935                 omap_cfg_reg(R18_1610_MMC2_CLKIN);
 936                 omap_cfg_reg(W8_1610_MMC2_DAT0);
 937                 if (host->sd_support) {
 938                         omap_cfg_reg(V8_1610_MMC2_DAT1);
 939                         omap_cfg_reg(W15_1610_MMC2_DAT2);
 940                         omap_cfg_reg(R10_1610_MMC2_DAT3);
 941                 }
 942
 943                 /* These are needed for the level shifter */
 944                 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
 945                 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
 946                 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
 947
 948                 host->power_pin = mmc2_power_pin;
 949                 host->switch_pin = mmc2_switch_pin;
 950
 951                 /* Feedback clock must be set on OMAP-1710 MMC2 */
 952                 if (cpu_is_omap1710())
 953                         omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
 954                                      MOD_CONF_CTRL_1);
 955         }
 956
 957         host->use_dma = 1;
 958         host->dma_ch = -1;
 959
 960         host->irq = pdev->resource[1].start;
 961         host->base = (void __iomem *)pdev->resource[0].start;
 962
 963         mmc->ops = &mmc_omap_ops;
 964         mmc->f_min = 400000;
 965         mmc->f_max = 24000000;
 966         mmc->ocr_avail = MMC_VDD_33_34;
 967
 968         /* No SG-DMA */
 969         mmc->max_phys_segs = 1;
 970         mmc->max_seg_size = PAGE_SIZE;
 971
 972         if (host->power_pin >= 0) {
 973                 if ((ret = omap_request_gpio(host->power_pin)) != 0) {
 974                         printk(KERN_ERR "MMC%d: Unable to get GPIO pin for MMC power\n",
 975                                host->id);
 976                         goto out;
 977                 }
 978                 omap_set_gpio_direction(host->power_pin, 0);
 979         }
 980
 981         ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
 982         if (ret)
 983                 goto out;
 984
 985         host->dev = dev;
 986         dev_set_drvdata(dev, host);
 987
 988         mmc_add_host(mmc);
 989
 990         if (host->switch_pin >= 0) {
 991                 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
 992                 init_timer(&host->switch_timer);
 993                 host->switch_timer.function = mmc_omap_switch_timer;
 994                 host->switch_timer.data = (unsigned long) host;
 995                 if (omap_request_gpio(host->switch_pin) != 0) {
 996                         printk(KERN_WARNING "MMC%d: Unable to get GPIO pin for MMC cover switch\n",
 997                                host->id);
 998                         host->switch_pin = -1;
 999                         goto no_switch;
1000                 }
1001
1002                 omap_set_gpio_direction(host->switch_pin, 1);
1003                 set_irq_type(OMAP_GPIO_IRQ(host->switch_pin), IRQT_RISING);
1004                 ret = request_irq(OMAP_GPIO_IRQ(host->switch_pin),
1005                                   mmc_omap_switch_irq, 0, DRIVER_NAME, host);
1006                 if (ret) {
1007                         printk(KERN_WARNING "MMC%d: Unable to get IRQ for MMC cover switch\n",
1008                                host->id);
1009                         omap_free_gpio(host->switch_pin);
1010                         host->switch_pin = -1;
1011                         goto no_switch;
1012                 }
1013                 ret = device_create_file(dev, &dev_attr_cover_switch);
1014                 if (ret == 0) {
1015                         ret = device_create_file(dev, &dev_attr_enable_poll);
1016                         if (ret != 0)
1017                                 device_remove_file(dev, &dev_attr_cover_switch);
1018                 }
1019                 if (ret) {
1020                         printk(KERN_WARNING "MMC%d: Unable to create sysfs attributes\n",
1021                                host->id);
1022                         free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1023                         omap_free_gpio(host->switch_pin);
1024                         host->switch_pin = -1;
1025                         goto no_switch;
1026                 }
1027                 if (mmc_omap_enable_poll && mmc_omap_cover_is_open(host))
1028                         schedule_work(&host->switch_work);
1029         }
1030 no_switch:
1031         return 0;
1032 out:
1033         /* FIXME: Free other resources too. */
1034         if (host) {
1035                 if (host->clk && !IS_ERR(host->clk))
1036                         clk_put(host->clk);
1037                 mmc_free_host(host->mmc);
1038         }
1039         return ret;
1040 }
1041
1042 static int __exit mmc_omap_remove(struct device *dev)
1043 {
1044         struct platform_device *pdev = to_platform_device(dev);
1045         struct mmc_omap_host *host = dev_get_drvdata(dev);
1046
1047         dev_set_drvdata(dev, NULL);
1048
1049         if (host) {
1050                 mmc_remove_host(host->mmc);
1051                 free_irq(host->irq, host);
1052                 mmc_omap_power(host, 0);
1053
1054                 if (host->power_pin >= 0)
1055                         omap_free_gpio(host->power_pin);
1056                 if (host->switch_pin >= 0) {
1057                         device_remove_file(dev, &dev_attr_enable_poll);
1058                         device_remove_file(dev, &dev_attr_cover_switch);
1059                         free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1060                         omap_free_gpio(host->switch_pin);
1061                         host->switch_pin = -1;
1062                         del_timer_sync(&host->switch_timer);
1063                         flush_scheduled_work();
1064                 }
1065                 if (host->clk && !IS_ERR(host->clk))
1066                         clk_put(host->clk);
1067                 mmc_free_host(host->mmc);
1068         }
1069
1070         release_mem_region(pdev->resource[0].start,
1071                            pdev->resource[0].end - pdev->resource[0].start + 1);
1072
1073         return 0;
1074 }
1075
1076 #ifdef CONFIG_PM
1077 static int mmc_omap_suspend(struct device *dev, pm_message_t mesg, u32 level)
1078 {
1079         int ret = 0;
1080         struct mmc_omap_host *host = dev_get_drvdata(dev);
1081
1082         if (host && host->suspended)
1083                 return 0;
1084
1085         if (!irqs_disabled())
1086                 return -EAGAIN;
1087
1088         if (host) {
1089                 ret = mmc_suspend_host(host->mmc, mesg);
1090                 if (ret == 0)
1091                         host->suspended = 1;
1092         }
1093         return ret;
1094 }
1095
1096 static int mmc_omap_resume(struct device *dev, u32 level)
1097 {
1098         int ret = 0;
1099         struct mmc_omap_host *host = dev_get_drvdata(dev);
1100
1101         if (host && !host->suspended)
1102                 return 0;
1103
1104         if (host) {
1105                 ret = mmc_resume_host(host->mmc);
1106                 if (ret == 0)
1107                         host->suspended = 0;
1108         }
1109
1110         return ret;
1111 }
1112 #else
1113 #define mmc_omap_suspend        NULL
1114 #define mmc_omap_resume         NULL
1115 #endif
1116
1117 static void mmc_release(struct device *dev)
1118 {
1119         /* Nothing to release? */
1120 }
1121
1122 static struct resource mmc1_resources[] = {
1123         {
1124                 .start          = IO_ADDRESS(OMAP_MMC1_BASE),
1125                 .end            = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f,
1126                 .flags          = IORESOURCE_MEM,
1127         },
1128         {
1129                 .start          = INT_MMC,
1130                 .flags          = IORESOURCE_IRQ,
1131         },
1132 };
1133
1134 static struct resource mmc2_resources[] = {
1135         {
1136                 .start          = IO_ADDRESS(OMAP_MMC2_BASE),
1137                 .end            = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f,
1138                 .flags          = IORESOURCE_MEM,
1139         },
1140         {
1141                 .start          = INT_1610_MMC2,
1142                 .flags          = IORESOURCE_IRQ,
1143         },
1144 };
1145
1146
1147 static u64 mmc_dmamask = 0xffffffff;
1148
1149 static struct platform_device mmc_omap_device1 = {
1150         .name           = "mmci-omap",
1151         .id             = 1,
1152         .dev = {
1153                 .release        = mmc_release,
1154                 .dma_mask       = &mmc_dmamask,
1155         },
1156         .num_resources  = ARRAY_SIZE(mmc1_resources),
1157         .resource       = mmc1_resources,
1158 };
1159
1160 static struct platform_device mmc_omap_device2 = {
1161         .name           = "mmci-omap",
1162         .id             = 2,
1163         .dev = {
1164                 .release        = mmc_release,
1165                 .dma_mask       = &mmc_dmamask,
1166         },
1167         .num_resources  = ARRAY_SIZE(mmc2_resources),
1168         .resource       = mmc2_resources,
1169 };
1170
1171 static struct device_driver mmc_omap_driver = {
1172         .name           = "mmci-omap",
1173         .bus            = &platform_bus_type,
1174         .probe          = mmc_omap_probe,
1175         .remove         = __exit_p(mmc_omap_remove),
1176         .suspend        = mmc_omap_suspend,
1177         .resume         = mmc_omap_resume,
1178 };
1179
1180 static int enable_blocks = 0;
1181
1182 static int __init mmc_omap_init(void)
1183 {
1184         int ret;
1185         const struct omap_mmc_config *minfo;
1186
1187         minfo = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
1188         if (minfo != NULL) {
1189                 enable_blocks = minfo->mmc_blocks;
1190                 if (enable_blocks & 1) {
1191                         mmc1_power_pin = minfo->mmc1_power_pin;
1192                         mmc1_switch_pin = minfo->mmc1_switch_pin;
1193                 }
1194                 if (enable_blocks & 2) {
1195                         mmc2_power_pin = minfo->mmc2_power_pin;
1196                         mmc2_switch_pin = minfo->mmc2_switch_pin;
1197                 }
1198         } else {
1199 #if defined(CONFIG_ARCH_OMAP1510) || defined(CONFIG_MMC_OMAP16XX_BLOCK1)
1200                 enable_blocks |= 1;
1201 #endif
1202 #if defined(CONFIG_MMC_OMAP16XX_BLOCK2)
1203                 enable_blocks |= 2;
1204 #endif
1205         }
1206         if (enable_blocks == 0) {
1207                 printk(KERN_INFO "OMAP MMC driver not loaded\n");
1208                 return -ENODEV;
1209         }
1210
1211         if (enable_blocks & 1) {
1212                 ret = platform_device_register(&mmc_omap_device1);
1213                 if (ret != 0)
1214                         return -ENODEV;
1215         }
1216
1217         if (enable_blocks & 2) {
1218                 ret = platform_device_register(&mmc_omap_device2);
1219                 if (ret != 0)
1220                         goto free1;
1221         }
1222
1223         ret = driver_register(&mmc_omap_driver);
1224         if (ret == 0)
1225                 return 0;
1226
1227         if (enable_blocks & 2)
1228                 platform_device_unregister(&mmc_omap_device2);
1229
1230 free1:
1231         if (enable_blocks & 1)
1232                 platform_device_unregister(&mmc_omap_device1);
1233
1234         return -ENODEV;
1235 }
1236
1237 static void __exit mmc_omap_exit(void)
1238 {
1239         driver_unregister(&mmc_omap_driver);
1240
1241         if (enable_blocks & 2)
1242                 platform_device_unregister(&mmc_omap_device2);
1243
1244         if (enable_blocks & 1)
1245                 platform_device_unregister(&mmc_omap_device1);
1246 }
1247
1248 module_init(mmc_omap_init);
1249 module_exit(mmc_omap_exit);
1250
1251 MODULE_DESCRIPTION("OMAP Multimedia Card driver");
1252 MODULE_LICENSE("GPL");
1253 MODULE_AUTHOR("Juha Yrjölä");