2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
4 * Author: Mike Lavender, mike@steroidmicros.com
6 * Copyright (c) 2005, Intec Automation Inc.
8 * Some parts are based on lart.c by Abraham Van Der Merwe
10 * Cleaned up and generalized based on mtd_dataflash.c
12 * This code is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/device.h>
21 #include <linux/interrupt.h>
22 #include <linux/mutex.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/flash.h>
31 #define FLASH_PAGESIZE 256
34 #define OPCODE_WREN 0x06 /* Write enable */
35 #define OPCODE_RDSR 0x05 /* Read status register */
36 #define OPCODE_WRSR 0x01 /* Write status register 1 byte */
37 #define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */
38 #define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */
39 #define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */
40 #define OPCODE_BE_4K 0x20 /* Erase 4KiB block */
41 #define OPCODE_BE_32K 0x52 /* Erase 32KiB block */
42 #define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */
43 #define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */
44 #define OPCODE_RDID 0x9f /* Read JEDEC ID */
46 /* Status Register bits. */
47 #define SR_WIP 1 /* Write in progress */
48 #define SR_WEL 2 /* Write enable latch */
49 /* meaning of other SR_* bits may differ between vendors */
50 #define SR_BP0 4 /* Block protect 0 */
51 #define SR_BP1 8 /* Block protect 1 */
52 #define SR_BP2 0x10 /* Block protect 2 */
53 #define SR_SRWD 0x80 /* SR write protect */
55 /* Define max times to check status register before we give up. */
56 #define MAX_READY_WAIT_COUNT 100000
59 #ifdef CONFIG_M25PXX_USE_FAST_READ
60 #define OPCODE_READ OPCODE_FAST_READ
61 #define FAST_READ_DUMMY_BYTE 1
63 #define OPCODE_READ OPCODE_NORM_READ
64 #define FAST_READ_DUMMY_BYTE 0
67 #ifdef CONFIG_MTD_PARTITIONS
68 #define mtd_has_partitions() (1)
70 #define mtd_has_partitions() (0)
73 /****************************************************************************/
76 struct spi_device *spi;
79 unsigned partitioned:1;
81 u8 command[CMD_SIZE + FAST_READ_DUMMY_BYTE];
84 static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
86 return container_of(mtd, struct m25p, mtd);
89 /****************************************************************************/
92 * Internal helper functions
96 * Read the status register, returning its value in the location
97 * Return the status register value.
98 * Returns negative if error occurred.
100 static int read_sr(struct m25p *flash)
103 u8 code = OPCODE_RDSR;
106 retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
109 dev_err(&flash->spi->dev, "error %d reading SR\n",
118 * Write status register 1 byte
119 * Returns negative if error occurred.
121 static int write_sr(struct m25p *flash, u8 val)
123 flash->command[0] = OPCODE_WRSR;
124 flash->command[1] = val;
126 return spi_write(flash->spi, flash->command, 2);
130 * Set write enable latch with Write Enable command.
131 * Returns negative if error occurred.
133 static inline int write_enable(struct m25p *flash)
135 u8 code = OPCODE_WREN;
137 return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
142 * Service routine to read status register until ready, or timeout occurs.
143 * Returns non-zero if error.
145 static int wait_till_ready(struct m25p *flash)
150 /* one chip guarantees max 5 msec wait here after page writes,
151 * but potentially three seconds (!) after page erase.
153 for (count = 0; count < MAX_READY_WAIT_COUNT; count++) {
154 if ((sr = read_sr(flash)) < 0)
156 else if (!(sr & SR_WIP))
159 /* REVISIT sometimes sleeping would be best */
166 * Erase the whole flash memory
168 * Returns 0 if successful, non-zero otherwise.
170 static int erase_chip(struct m25p *flash)
172 DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %dKiB\n",
173 flash->spi->dev.bus_id, __func__,
174 flash->mtd.size / 1024);
176 /* Wait until finished previous write command. */
177 if (wait_till_ready(flash))
180 /* Send write enable, then erase commands. */
183 /* Set up command buffer. */
184 flash->command[0] = OPCODE_CHIP_ERASE;
186 spi_write(flash->spi, flash->command, 1);
192 * Erase one sector of flash memory at offset ``offset'' which is any
193 * address within the sector which should be erased.
195 * Returns 0 if successful, non-zero otherwise.
197 static int erase_sector(struct m25p *flash, u32 offset)
199 DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %dKiB at 0x%08x\n",
200 flash->spi->dev.bus_id, __func__,
201 flash->mtd.erasesize / 1024, offset);
203 /* Wait until finished previous write command. */
204 if (wait_till_ready(flash))
207 /* Send write enable, then erase commands. */
210 /* Set up command buffer. */
211 flash->command[0] = flash->erase_opcode;
212 flash->command[1] = offset >> 16;
213 flash->command[2] = offset >> 8;
214 flash->command[3] = offset;
216 spi_write(flash->spi, flash->command, CMD_SIZE);
221 /****************************************************************************/
228 * Erase an address range on the flash chip. The address range may extend
229 * one or more erase sectors. Return an error is there is a problem erasing.
231 static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
233 struct m25p *flash = mtd_to_m25p(mtd);
236 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %d\n",
237 flash->spi->dev.bus_id, __func__, "at",
238 (u32)instr->addr, instr->len);
241 if (instr->addr + instr->len > flash->mtd.size)
243 if ((instr->addr % mtd->erasesize) != 0
244 || (instr->len % mtd->erasesize) != 0) {
251 mutex_lock(&flash->lock);
253 /* whole-chip erase? */
254 if (len == flash->mtd.size && erase_chip(flash)) {
255 instr->state = MTD_ERASE_FAILED;
256 mutex_unlock(&flash->lock);
259 /* REVISIT in some cases we could speed up erasing large regions
260 * by using OPCODE_SE instead of OPCODE_BE_4K. We may have set up
261 * to use "small sector erase", but that's not always optimal.
264 /* "sector"-at-a-time erase */
267 if (erase_sector(flash, addr)) {
268 instr->state = MTD_ERASE_FAILED;
269 mutex_unlock(&flash->lock);
273 addr += mtd->erasesize;
274 len -= mtd->erasesize;
278 mutex_unlock(&flash->lock);
280 instr->state = MTD_ERASE_DONE;
281 mtd_erase_callback(instr);
287 * Read an address range from the flash chip. The address range
288 * may be any size provided it is within the physical boundaries.
290 static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
291 size_t *retlen, u_char *buf)
293 struct m25p *flash = mtd_to_m25p(mtd);
294 struct spi_transfer t[2];
295 struct spi_message m;
297 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
298 flash->spi->dev.bus_id, __func__, "from",
305 if (from + len > flash->mtd.size)
308 spi_message_init(&m);
309 memset(t, 0, (sizeof t));
312 * OPCODE_FAST_READ (if available) is faster.
313 * Should add 1 byte DUMMY_BYTE.
315 t[0].tx_buf = flash->command;
316 t[0].len = CMD_SIZE + FAST_READ_DUMMY_BYTE;
317 spi_message_add_tail(&t[0], &m);
321 spi_message_add_tail(&t[1], &m);
323 /* Byte count starts at zero. */
327 mutex_lock(&flash->lock);
329 /* Wait till previous write/erase is done. */
330 if (wait_till_ready(flash)) {
331 /* REVISIT status return?? */
332 mutex_unlock(&flash->lock);
336 /* FIXME switch to OPCODE_FAST_READ. It's required for higher
337 * clocks; and at this writing, every chip this driver handles
338 * supports that opcode.
341 /* Set up the write data buffer. */
342 flash->command[0] = OPCODE_READ;
343 flash->command[1] = from >> 16;
344 flash->command[2] = from >> 8;
345 flash->command[3] = from;
347 spi_sync(flash->spi, &m);
349 *retlen = m.actual_length - CMD_SIZE - FAST_READ_DUMMY_BYTE;
351 mutex_unlock(&flash->lock);
357 * Write an address range to the flash chip. Data must be written in
358 * FLASH_PAGESIZE chunks. The address range may be any size provided
359 * it is within the physical boundaries.
361 static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
362 size_t *retlen, const u_char *buf)
364 struct m25p *flash = mtd_to_m25p(mtd);
365 u32 page_offset, page_size;
366 struct spi_transfer t[2];
367 struct spi_message m;
369 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
370 flash->spi->dev.bus_id, __func__, "to",
380 if (to + len > flash->mtd.size)
383 spi_message_init(&m);
384 memset(t, 0, (sizeof t));
386 t[0].tx_buf = flash->command;
388 spi_message_add_tail(&t[0], &m);
391 spi_message_add_tail(&t[1], &m);
393 mutex_lock(&flash->lock);
395 /* Wait until finished previous write command. */
396 if (wait_till_ready(flash)) {
397 mutex_unlock(&flash->lock);
403 /* Set up the opcode in the write buffer. */
404 flash->command[0] = OPCODE_PP;
405 flash->command[1] = to >> 16;
406 flash->command[2] = to >> 8;
407 flash->command[3] = to;
409 /* what page do we start with? */
410 page_offset = to % FLASH_PAGESIZE;
412 /* do all the bytes fit onto one page? */
413 if (page_offset + len <= FLASH_PAGESIZE) {
416 spi_sync(flash->spi, &m);
418 *retlen = m.actual_length - CMD_SIZE;
422 /* the size of data remaining on the first page */
423 page_size = FLASH_PAGESIZE - page_offset;
425 t[1].len = page_size;
426 spi_sync(flash->spi, &m);
428 *retlen = m.actual_length - CMD_SIZE;
430 /* write everything in PAGESIZE chunks */
431 for (i = page_size; i < len; i += page_size) {
433 if (page_size > FLASH_PAGESIZE)
434 page_size = FLASH_PAGESIZE;
436 /* write the next page to flash */
437 flash->command[1] = (to + i) >> 16;
438 flash->command[2] = (to + i) >> 8;
439 flash->command[3] = (to + i);
441 t[1].tx_buf = buf + i;
442 t[1].len = page_size;
444 wait_till_ready(flash);
448 spi_sync(flash->spi, &m);
451 *retlen += m.actual_length - CMD_SIZE;
455 mutex_unlock(&flash->lock);
461 /****************************************************************************/
464 * SPI device driver setup and teardown
470 /* JEDEC id zero means "no ID" (most older chips); otherwise it has
471 * a high byte of zero plus three data bytes: the manufacturer id,
472 * then a two byte device id.
477 /* The size listed here is what works with OPCODE_SE, which isn't
478 * necessarily called a "sector" by the vendor.
480 unsigned sector_size;
484 #define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
488 /* NOTE: double check command sets and memory organization when you add
489 * more flash chips. This current list focusses on newer chips, which
490 * have been converging on command sets which including JEDEC ID.
492 static struct flash_info __devinitdata m25p_data [] = {
494 /* Atmel -- some are (confusingly) marketed as "DataFlash" */
495 { "at25fs010", 0x1f6601, 0, 32 * 1024, 4, SECT_4K, },
496 { "at25fs040", 0x1f6604, 0, 64 * 1024, 8, SECT_4K, },
498 { "at25df041a", 0x1f4401, 0, 64 * 1024, 8, SECT_4K, },
499 { "at25df641", 0x1f4800, 0, 64 * 1024, 128, SECT_4K, },
501 { "at26f004", 0x1f0400, 0, 64 * 1024, 8, SECT_4K, },
502 { "at26df081a", 0x1f4501, 0, 64 * 1024, 16, SECT_4K, },
503 { "at26df161a", 0x1f4601, 0, 64 * 1024, 32, SECT_4K, },
504 { "at26df321", 0x1f4701, 0, 64 * 1024, 64, SECT_4K, },
506 /* Spansion -- single (large) sector size only, at least
507 * for the chips listed here (without boot sectors).
509 { "s25sl004a", 0x010212, 0, 64 * 1024, 8, },
510 { "s25sl008a", 0x010213, 0, 64 * 1024, 16, },
511 { "s25sl016a", 0x010214, 0, 64 * 1024, 32, },
512 { "s25sl032a", 0x010215, 0, 64 * 1024, 64, },
513 { "s25sl064a", 0x010216, 0, 64 * 1024, 128, },
514 { "s25sl12800", 0x012018, 0x0300, 256 * 1024, 64, },
515 { "s25sl12801", 0x012018, 0x0301, 64 * 1024, 256, },
517 /* SST -- large erase sizes are "overlays", "sectors" are 4K */
518 { "sst25vf040b", 0xbf258d, 0, 64 * 1024, 8, SECT_4K, },
519 { "sst25vf080b", 0xbf258e, 0, 64 * 1024, 16, SECT_4K, },
520 { "sst25vf016b", 0xbf2541, 0, 64 * 1024, 32, SECT_4K, },
521 { "sst25vf032b", 0xbf254a, 0, 64 * 1024, 64, SECT_4K, },
523 /* ST Microelectronics -- newer production may have feature updates */
524 { "m25p05", 0x202010, 0, 32 * 1024, 2, },
525 { "m25p10", 0x202011, 0, 32 * 1024, 4, },
526 { "m25p20", 0x202012, 0, 64 * 1024, 4, },
527 { "m25p40", 0x202013, 0, 64 * 1024, 8, },
528 { "m25p80", 0, 0, 64 * 1024, 16, },
529 { "m25p16", 0x202015, 0, 64 * 1024, 32, },
530 { "m25p32", 0x202016, 0, 64 * 1024, 64, },
531 { "m25p64", 0x202017, 0, 64 * 1024, 128, },
532 { "m25p128", 0x202018, 0, 256 * 1024, 64, },
534 { "m45pe80", 0x204014, 0, 64 * 1024, 16, },
535 { "m45pe16", 0x204015, 0, 64 * 1024, 32, },
537 { "m25pe80", 0x208014, 0, 64 * 1024, 16, },
538 { "m25pe16", 0x208015, 0, 64 * 1024, 32, SECT_4K, },
540 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
541 { "w25x10", 0xef3011, 0, 64 * 1024, 2, SECT_4K, },
542 { "w25x20", 0xef3012, 0, 64 * 1024, 4, SECT_4K, },
543 { "w25x40", 0xef3013, 0, 64 * 1024, 8, SECT_4K, },
544 { "w25x80", 0xef3014, 0, 64 * 1024, 16, SECT_4K, },
545 { "w25x16", 0xef3015, 0, 64 * 1024, 32, SECT_4K, },
546 { "w25x32", 0xef3016, 0, 64 * 1024, 64, SECT_4K, },
547 { "w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K, },
550 static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
553 u8 code = OPCODE_RDID;
557 struct flash_info *info;
559 /* JEDEC also defines an optional "extended device information"
560 * string for after vendor-specific data, after the three bytes
561 * we use here. Supporting some chips might require using it.
563 tmp = spi_write_then_read(spi, &code, 1, id, 5);
565 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
566 spi->dev.bus_id, tmp);
575 ext_jedec = id[3] << 8 | id[4];
577 for (tmp = 0, info = m25p_data;
578 tmp < ARRAY_SIZE(m25p_data);
580 if (info->jedec_id == jedec) {
581 if (info->ext_id != 0 && info->ext_id != ext_jedec)
586 dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec);
592 * board specific setup should have ensured the SPI clock used here
593 * matches what the READ command supports, at least until this driver
594 * understands FAST_READ (for clocks over 25 MHz).
596 static int __devinit m25p_probe(struct spi_device *spi)
598 struct flash_platform_data *data;
600 struct flash_info *info;
603 /* Platform data helps sort out which chip type we have, as
604 * well as how this board partitions it. If we don't have
605 * a chip ID, try the JEDEC id commands; they'll work for most
606 * newer chips, even if we don't recognize the particular chip.
608 data = spi->dev.platform_data;
609 if (data && data->type) {
610 for (i = 0, info = m25p_data;
611 i < ARRAY_SIZE(m25p_data);
613 if (strcmp(data->type, info->name) == 0)
617 /* unrecognized chip? */
618 if (i == ARRAY_SIZE(m25p_data)) {
619 DEBUG(MTD_DEBUG_LEVEL0, "%s: unrecognized id %s\n",
620 spi->dev.bus_id, data->type);
623 /* recognized; is that chip really what's there? */
624 } else if (info->jedec_id) {
625 struct flash_info *chip = jedec_probe(spi);
627 if (!chip || chip != info) {
628 dev_warn(&spi->dev, "found %s, expected %s\n",
629 chip ? chip->name : "UNKNOWN",
635 info = jedec_probe(spi);
640 flash = kzalloc(sizeof *flash, GFP_KERNEL);
645 mutex_init(&flash->lock);
646 dev_set_drvdata(&spi->dev, flash);
649 * Atmel serial flash tend to power up
650 * with the software protection bits set
653 if (info->jedec_id >> 16 == 0x1f) {
658 if (data && data->name)
659 flash->mtd.name = data->name;
661 flash->mtd.name = spi->dev.bus_id;
663 flash->mtd.type = MTD_NORFLASH;
664 flash->mtd.writesize = 1;
665 flash->mtd.flags = MTD_CAP_NORFLASH;
666 flash->mtd.size = info->sector_size * info->n_sectors;
667 flash->mtd.erase = m25p80_erase;
668 flash->mtd.read = m25p80_read;
669 flash->mtd.write = m25p80_write;
671 /* prefer "small sector" erase if possible */
672 if (info->flags & SECT_4K) {
673 flash->erase_opcode = OPCODE_BE_4K;
674 flash->mtd.erasesize = 4096;
676 flash->erase_opcode = OPCODE_SE;
677 flash->mtd.erasesize = info->sector_size;
680 dev_info(&spi->dev, "%s (%d Kbytes)\n", info->name,
681 flash->mtd.size / 1024);
683 DEBUG(MTD_DEBUG_LEVEL2,
684 "mtd .name = %s, .size = 0x%.8x (%uMiB) "
685 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
687 flash->mtd.size, flash->mtd.size / (1024*1024),
688 flash->mtd.erasesize, flash->mtd.erasesize / 1024,
689 flash->mtd.numeraseregions);
691 if (flash->mtd.numeraseregions)
692 for (i = 0; i < flash->mtd.numeraseregions; i++)
693 DEBUG(MTD_DEBUG_LEVEL2,
694 "mtd.eraseregions[%d] = { .offset = 0x%.8x, "
695 ".erasesize = 0x%.8x (%uKiB), "
696 ".numblocks = %d }\n",
697 i, flash->mtd.eraseregions[i].offset,
698 flash->mtd.eraseregions[i].erasesize,
699 flash->mtd.eraseregions[i].erasesize / 1024,
700 flash->mtd.eraseregions[i].numblocks);
703 /* partitions should match sector boundaries; and it may be good to
704 * use readonly partitions for writeprotected sectors (BP2..BP0).
706 if (mtd_has_partitions()) {
707 struct mtd_partition *parts = NULL;
710 #ifdef CONFIG_MTD_CMDLINE_PARTS
711 static const char *part_probes[] = { "cmdlinepart", NULL, };
713 nr_parts = parse_mtd_partitions(&flash->mtd,
714 part_probes, &parts, 0);
717 if (nr_parts <= 0 && data && data->parts) {
719 nr_parts = data->nr_parts;
723 for (i = 0; i < nr_parts; i++) {
724 DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
725 "{.name = %s, .offset = 0x%.8x, "
726 ".size = 0x%.8x (%uKiB) }\n",
730 parts[i].size / 1024);
732 flash->partitioned = 1;
733 return add_mtd_partitions(&flash->mtd, parts, nr_parts);
735 } else if (data->nr_parts)
736 dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
737 data->nr_parts, data->name);
739 return add_mtd_device(&flash->mtd) == 1 ? -ENODEV : 0;
743 static int __devexit m25p_remove(struct spi_device *spi)
745 struct m25p *flash = dev_get_drvdata(&spi->dev);
748 /* Clean up MTD stuff. */
749 if (mtd_has_partitions() && flash->partitioned)
750 status = del_mtd_partitions(&flash->mtd);
752 status = del_mtd_device(&flash->mtd);
759 static struct spi_driver m25p80_driver = {
762 .bus = &spi_bus_type,
763 .owner = THIS_MODULE,
766 .remove = __devexit_p(m25p_remove),
768 /* REVISIT: many of these chips have deep power-down modes, which
769 * should clearly be entered on suspend() to minimize power use.
770 * And also when they're otherwise idle...
775 static int m25p80_init(void)
777 return spi_register_driver(&m25p80_driver);
781 static void m25p80_exit(void)
783 spi_unregister_driver(&m25p80_driver);
787 module_init(m25p80_init);
788 module_exit(m25p80_exit);
790 MODULE_LICENSE("GPL");
791 MODULE_AUTHOR("Mike Lavender");
792 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");