2 * linux/drivers/mtd/onenand/onenand_sim.c
4 * The OneNAND simulator
6 * Copyright © 2005-2007 Samsung Electronics
7 * Kyungmin Park <kyungmin.park@samsung.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/vmalloc.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/mtd/onenand.h>
24 #ifndef CONFIG_ONENAND_SIM_MANUFACTURER
25 #define CONFIG_ONENAND_SIM_MANUFACTURER 0xec
27 #ifndef CONFIG_ONENAND_SIM_DEVICE_ID
28 #define CONFIG_ONENAND_SIM_DEVICE_ID 0x04
30 #ifndef CONFIG_ONENAND_SIM_VERSION_ID
31 #define CONFIG_ONENAND_SIM_VERSION_ID 0x1e
34 static int manuf_id = CONFIG_ONENAND_SIM_MANUFACTURER;
35 static int device_id = CONFIG_ONENAND_SIM_DEVICE_ID;
36 static int version_id = CONFIG_ONENAND_SIM_VERSION_ID;
38 struct onenand_flash {
43 #define ONENAND_CORE(flash) (flash->data)
44 #define ONENAND_CORE_SPARE(flash, this, offset) \
45 ((flash->data) + (this->chipsize) + (offset >> 5))
47 #define ONENAND_MAIN_AREA(this, offset) \
48 (this->base + ONENAND_DATARAM + offset)
50 #define ONENAND_SPARE_AREA(this, offset) \
51 (this->base + ONENAND_SPARERAM + offset)
53 #define ONENAND_GET_WP_STATUS(this) \
54 (readw(this->base + ONENAND_REG_WP_STATUS))
56 #define ONENAND_SET_WP_STATUS(v, this) \
57 (writew(v, this->base + ONENAND_REG_WP_STATUS))
59 /* It has all 0xff chars */
60 #define MAX_ONENAND_PAGESIZE (2048 + 64)
61 static unsigned char *ffchars;
63 static struct mtd_partition os_partitions[] = {
65 .name = "OneNAND simulator partition",
67 .size = MTDPART_SIZ_FULL,
72 * OneNAND simulator mtd
76 struct mtd_partition *parts;
77 struct onenand_chip onenand;
78 struct onenand_flash flash;
81 static struct onenand_info *info;
83 #define DPRINTK(format, args...) \
85 printk(KERN_DEBUG "%s[%d]: " format "\n", __func__, \
90 * onenand_lock_handle - Handle Lock scheme
91 * @param this OneNAND device structure
92 * @param cmd The command to be sent
94 * Send lock command to OneNAND device.
95 * The lock scheme is depends on chip type.
97 static void onenand_lock_handle(struct onenand_chip *this, int cmd)
99 int block_lock_scheme;
102 status = ONENAND_GET_WP_STATUS(this);
103 block_lock_scheme = !(this->options & ONENAND_HAS_CONT_LOCK);
106 case ONENAND_CMD_UNLOCK:
107 if (block_lock_scheme)
108 ONENAND_SET_WP_STATUS(ONENAND_WP_US, this);
110 ONENAND_SET_WP_STATUS(status | ONENAND_WP_US, this);
113 case ONENAND_CMD_LOCK:
114 if (block_lock_scheme)
115 ONENAND_SET_WP_STATUS(ONENAND_WP_LS, this);
117 ONENAND_SET_WP_STATUS(status | ONENAND_WP_LS, this);
120 case ONENAND_CMD_LOCK_TIGHT:
121 if (block_lock_scheme)
122 ONENAND_SET_WP_STATUS(ONENAND_WP_LTS, this);
124 ONENAND_SET_WP_STATUS(status | ONENAND_WP_LTS, this);
133 * onenand_bootram_handle - Handle BootRAM area
134 * @param this OneNAND device structure
135 * @param cmd The command to be sent
137 * Emulate BootRAM area. It is possible to do basic operation using BootRAM.
139 static void onenand_bootram_handle(struct onenand_chip *this, int cmd)
142 case ONENAND_CMD_READID:
143 writew(manuf_id, this->base);
144 writew(device_id, this->base + 2);
145 writew(version_id, this->base + 4);
149 /* REVIST: Handle other commands */
155 * onenand_update_interrupt - Set interrupt register
156 * @param this OneNAND device structure
157 * @param cmd The command to be sent
159 * Update interrupt register. The status is depends on command.
161 static void onenand_update_interrupt(struct onenand_chip *this, int cmd)
163 int interrupt = ONENAND_INT_MASTER;
166 case ONENAND_CMD_READ:
167 case ONENAND_CMD_READOOB:
168 interrupt |= ONENAND_INT_READ;
171 case ONENAND_CMD_PROG:
172 case ONENAND_CMD_PROGOOB:
173 interrupt |= ONENAND_INT_WRITE;
176 case ONENAND_CMD_ERASE:
177 interrupt |= ONENAND_INT_ERASE;
180 case ONENAND_CMD_RESET:
181 interrupt |= ONENAND_INT_RESET;
188 writew(interrupt, this->base + ONENAND_REG_INTERRUPT);
192 * onenand_check_overwrite - Check over-write if happend
193 * @param dest The destination pointer
194 * @param src The source pointer
195 * @param count The length to be check
196 * @return 0 on same, otherwise 1
198 * Compare the source with destination
200 static int onenand_check_overwrite(void *dest, void *src, size_t count)
202 unsigned int *s = (unsigned int *) src;
203 unsigned int *d = (unsigned int *) dest;
207 for (i = 0; i < count; i++)
208 if ((*s++ ^ *d++) != 0)
215 * onenand_data_handle - Handle OneNAND Core and DataRAM
216 * @param this OneNAND device structure
217 * @param cmd The command to be sent
218 * @param dataram Which dataram used
219 * @param offset The offset to OneNAND Core
221 * Copy data from OneNAND Core to DataRAM (read)
222 * Copy data from DataRAM to OneNAND Core (write)
223 * Erase the OneNAND Core (erase)
225 static void onenand_data_handle(struct onenand_chip *this, int cmd,
226 int dataram, unsigned int offset)
228 struct mtd_info *mtd = &info->mtd;
229 struct onenand_flash *flash = this->priv;
230 int main_offset, spare_offset;
236 main_offset = mtd->writesize;
237 spare_offset = mtd->oobsize;
244 case ONENAND_CMD_READ:
245 src = ONENAND_CORE(flash) + offset;
246 dest = ONENAND_MAIN_AREA(this, main_offset);
247 memcpy(dest, src, mtd->writesize);
250 case ONENAND_CMD_READOOB:
251 src = ONENAND_CORE_SPARE(flash, this, offset);
252 dest = ONENAND_SPARE_AREA(this, spare_offset);
253 memcpy(dest, src, mtd->oobsize);
256 case ONENAND_CMD_PROG:
257 src = ONENAND_MAIN_AREA(this, main_offset);
258 dest = ONENAND_CORE(flash) + offset;
259 /* To handle partial write */
260 for (i = 0; i < (1 << mtd->subpage_sft); i++) {
261 int off = i * this->subpagesize;
262 if (!memcmp(src + off, ffchars, this->subpagesize))
264 if (memcmp(dest + off, ffchars, this->subpagesize) &&
265 onenand_check_overwrite(dest + off, src + off, this->subpagesize))
266 printk(KERN_ERR "over-write happend at 0x%08x\n", offset);
267 memcpy(dest + off, src + off, this->subpagesize);
271 case ONENAND_CMD_PROGOOB:
272 src = ONENAND_SPARE_AREA(this, spare_offset);
273 /* Check all data is 0xff chars */
274 if (!memcmp(src, ffchars, mtd->oobsize))
277 dest = ONENAND_CORE_SPARE(flash, this, offset);
278 if (memcmp(dest, ffchars, mtd->oobsize) &&
279 onenand_check_overwrite(dest, src, mtd->oobsize))
280 printk(KERN_ERR "OOB: over-write happend at 0x%08x\n",
282 memcpy(dest, src, mtd->oobsize);
285 case ONENAND_CMD_ERASE:
286 memset(ONENAND_CORE(flash) + offset, 0xff, mtd->erasesize);
287 memset(ONENAND_CORE_SPARE(flash, this, offset), 0xff,
288 (mtd->erasesize >> 5));
297 * onenand_command_handle - Handle command
298 * @param this OneNAND device structure
299 * @param cmd The command to be sent
301 * Emulate OneNAND command.
303 static void onenand_command_handle(struct onenand_chip *this, int cmd)
305 unsigned long offset = 0;
306 int block = -1, page = -1, bufferram = -1;
310 case ONENAND_CMD_UNLOCK:
311 case ONENAND_CMD_LOCK:
312 case ONENAND_CMD_LOCK_TIGHT:
313 case ONENAND_CMD_UNLOCK_ALL:
314 onenand_lock_handle(this, cmd);
317 case ONENAND_CMD_BUFFERRAM:
322 block = (int) readw(this->base + ONENAND_REG_START_ADDRESS1);
323 if (block & (1 << ONENAND_DDP_SHIFT)) {
324 block &= ~(1 << ONENAND_DDP_SHIFT);
325 /* The half of chip block */
326 block += this->chipsize >> (this->erase_shift + 1);
328 if (cmd == ONENAND_CMD_ERASE)
331 page = (int) readw(this->base + ONENAND_REG_START_ADDRESS8);
332 page = (page >> ONENAND_FPA_SHIFT);
333 bufferram = (int) readw(this->base + ONENAND_REG_START_BUFFER);
334 bufferram >>= ONENAND_BSA_SHIFT;
335 bufferram &= ONENAND_BSA_DATARAM1;
336 dataram = (bufferram == ONENAND_BSA_DATARAM1) ? 1 : 0;
341 offset += block << this->erase_shift;
344 offset += page << this->page_shift;
346 onenand_data_handle(this, cmd, dataram, offset);
348 onenand_update_interrupt(this, cmd);
352 * onenand_writew - [OneNAND Interface] Emulate write operation
353 * @param value value to write
354 * @param addr address to write
356 * Write OneNAND register with value
358 static void onenand_writew(unsigned short value, void __iomem * addr)
360 struct onenand_chip *this = info->mtd.priv;
362 /* BootRAM handling */
363 if (addr < this->base + ONENAND_DATARAM) {
364 onenand_bootram_handle(this, value);
367 /* Command handling */
368 if (addr == this->base + ONENAND_REG_COMMAND)
369 onenand_command_handle(this, value);
375 * flash_init - Initialize OneNAND simulator
376 * @param flash OneNAND simulaotr data strucutres
378 * Initialize OneNAND simulator.
380 static int __init flash_init(struct onenand_flash *flash)
385 flash->base = kzalloc(131072, GFP_KERNEL);
387 printk(KERN_ERR "Unable to allocate base address.\n");
391 density = device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
392 size = ((16 << 20) << density);
394 ONENAND_CORE(flash) = vmalloc(size + (size >> 5));
395 if (!ONENAND_CORE(flash)) {
396 printk(KERN_ERR "Unable to allocate nand core address.\n");
401 memset(ONENAND_CORE(flash), 0xff, size + (size >> 5));
403 /* Setup registers */
404 writew(manuf_id, flash->base + ONENAND_REG_MANUFACTURER_ID);
405 writew(device_id, flash->base + ONENAND_REG_DEVICE_ID);
406 writew(version_id, flash->base + ONENAND_REG_VERSION_ID);
409 buffer_size = 0x0400; /* 1KiB page */
411 buffer_size = 0x0800; /* 2KiB page */
412 writew(buffer_size, flash->base + ONENAND_REG_DATA_BUFFER_SIZE);
418 * flash_exit - Clean up OneNAND simulator
419 * @param flash OneNAND simulaotr data strucutres
421 * Clean up OneNAND simulator.
423 static void flash_exit(struct onenand_flash *flash)
425 vfree(ONENAND_CORE(flash));
430 static int __init onenand_sim_init(void)
432 /* Allocate all 0xff chars pointer */
433 ffchars = kmalloc(MAX_ONENAND_PAGESIZE, GFP_KERNEL);
435 printk(KERN_ERR "Unable to allocate ff chars.\n");
438 memset(ffchars, 0xff, MAX_ONENAND_PAGESIZE);
440 /* Allocate OneNAND simulator mtd pointer */
441 info = kzalloc(sizeof(struct onenand_info), GFP_KERNEL);
443 printk(KERN_ERR "Unable to allocate core structures.\n");
448 /* Override write_word function */
449 info->onenand.write_word = onenand_writew;
451 if (flash_init(&info->flash)) {
452 printk(KERN_ERR "Unable to allocat flash.\n");
458 info->parts = os_partitions;
460 info->onenand.base = info->flash.base;
461 info->onenand.priv = &info->flash;
463 info->mtd.name = "OneNAND simulator";
464 info->mtd.priv = &info->onenand;
465 info->mtd.owner = THIS_MODULE;
467 if (onenand_scan(&info->mtd, 1)) {
468 flash_exit(&info->flash);
474 add_mtd_partitions(&info->mtd, info->parts, ARRAY_SIZE(os_partitions));
479 static void __exit onenand_sim_exit(void)
481 struct onenand_chip *this = info->mtd.priv;
482 struct onenand_flash *flash = this->priv;
484 onenand_release(&info->mtd);
490 module_init(onenand_sim_init);
491 module_exit(onenand_sim_exit);
493 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
494 MODULE_DESCRIPTION("The OneNAND flash simulator");
495 MODULE_LICENSE("GPL");