1 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */
3 Copyright (c) 2001, 2002 by D-Link Corporation
4 Written by Edward Peng.<edward_peng@dlink.com.tw>
5 Created 03-May-2001, base on Linux' sundance.c.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
13 #define DRV_NAME "DL2000/TC902x-based linux driver"
14 #define DRV_VERSION "v1.19"
15 #define DRV_RELDATE "2007/08/12"
17 #include <linux/dma-mapping.h>
19 static char version[] __devinitdata =
20 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";
22 static int mtu[MAX_UNITS];
23 static int vlan[MAX_UNITS];
24 static int jumbo[MAX_UNITS];
25 static char *media[MAX_UNITS];
26 static int tx_flow=-1;
27 static int rx_flow=-1;
28 static int copy_thresh;
29 static int rx_coalesce=10; /* Rx frame count each interrupt */
30 static int rx_timeout=200; /* Rx DMA wait time in 640ns increments */
31 static int tx_coalesce=16; /* HW xmit count each TxDMAComplete */
34 MODULE_AUTHOR ("Edward Peng");
35 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
36 MODULE_LICENSE("GPL");
37 module_param_array(mtu, int, NULL, 0);
38 module_param_array(media, charp, NULL, 0);
39 module_param_array(vlan, int, NULL, 0);
40 module_param_array(jumbo, int, NULL, 0);
41 module_param(tx_flow, int, 0);
42 module_param(rx_flow, int, 0);
43 module_param(copy_thresh, int, 0);
44 module_param(rx_coalesce, int, 0); /* Rx frame count each interrupt */
45 module_param(rx_timeout, int, 0); /* Rx DMA wait time in 64ns increments */
46 module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */
49 /* Enable the default interrupts */
50 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
51 UpdateStats | LinkEvent)
53 writew(DEFAULT_INTR, ioaddr + IntEnable)
55 static const int max_intrloop = 50;
56 static const int multicast_filter_limit = 0x40;
58 static int rio_open (struct net_device *dev);
59 static void rio_timer (unsigned long data);
60 static void rio_tx_timeout (struct net_device *dev);
61 static void alloc_list (struct net_device *dev);
62 static int start_xmit (struct sk_buff *skb, struct net_device *dev);
63 static irqreturn_t rio_interrupt (int irq, void *dev_instance);
64 static void rio_free_tx (struct net_device *dev, int irq);
65 static void tx_error (struct net_device *dev, int tx_status);
66 static int receive_packet (struct net_device *dev);
67 static void rio_error (struct net_device *dev, int int_status);
68 static int change_mtu (struct net_device *dev, int new_mtu);
69 static void set_multicast (struct net_device *dev);
70 static struct net_device_stats *get_stats (struct net_device *dev);
71 static int clear_stats (struct net_device *dev);
72 static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
73 static int rio_close (struct net_device *dev);
74 static int find_miiphy (struct net_device *dev);
75 static int parse_eeprom (struct net_device *dev);
76 static int read_eeprom (long ioaddr, int eep_addr);
77 static int mii_wait_link (struct net_device *dev, int wait);
78 static int mii_set_media (struct net_device *dev);
79 static int mii_get_media (struct net_device *dev);
80 static int mii_set_media_pcs (struct net_device *dev);
81 static int mii_get_media_pcs (struct net_device *dev);
82 static int mii_read (struct net_device *dev, int phy_addr, int reg_num);
83 static int mii_write (struct net_device *dev, int phy_addr, int reg_num,
86 static const struct ethtool_ops ethtool_ops;
89 rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
91 struct net_device *dev;
92 struct netdev_private *np;
94 int chip_idx = ent->driver_data;
97 static int version_printed;
101 if (!version_printed++)
102 printk ("%s", version);
104 err = pci_enable_device (pdev);
109 err = pci_request_regions (pdev, "dl2k");
111 goto err_out_disable;
113 pci_set_master (pdev);
114 dev = alloc_etherdev (sizeof (*np));
119 SET_MODULE_OWNER (dev);
120 SET_NETDEV_DEV(dev, &pdev->dev);
123 ioaddr = pci_resource_start (pdev, 1);
124 ioaddr = (long) ioremap (ioaddr, RIO_IO_SIZE);
130 ioaddr = pci_resource_start (pdev, 0);
132 dev->base_addr = ioaddr;
134 np = netdev_priv(dev);
135 np->chip_id = chip_idx;
137 spin_lock_init (&np->tx_lock);
138 spin_lock_init (&np->rx_lock);
140 /* Parse manual configuration */
143 if (card_idx < MAX_UNITS) {
144 if (media[card_idx] != NULL) {
146 if (strcmp (media[card_idx], "auto") == 0 ||
147 strcmp (media[card_idx], "autosense") == 0 ||
148 strcmp (media[card_idx], "0") == 0 ) {
150 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
151 strcmp (media[card_idx], "4") == 0) {
154 } else if (strcmp (media[card_idx], "100mbps_hd") == 0
155 || strcmp (media[card_idx], "3") == 0) {
158 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
159 strcmp (media[card_idx], "2") == 0) {
162 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
163 strcmp (media[card_idx], "1") == 0) {
166 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 ||
167 strcmp (media[card_idx], "6") == 0) {
170 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 ||
171 strcmp (media[card_idx], "5") == 0) {
178 if (jumbo[card_idx] != 0) {
180 dev->mtu = MAX_JUMBO;
183 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE)
184 dev->mtu = mtu[card_idx];
186 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ?
188 if (rx_coalesce > 0 && rx_timeout > 0) {
189 np->rx_coalesce = rx_coalesce;
190 np->rx_timeout = rx_timeout;
193 np->tx_flow = (tx_flow == 0) ? 0 : 1;
194 np->rx_flow = (rx_flow == 0) ? 0 : 1;
198 else if (tx_coalesce > TX_RING_SIZE-1)
199 tx_coalesce = TX_RING_SIZE - 1;
201 dev->open = &rio_open;
202 dev->hard_start_xmit = &start_xmit;
203 dev->stop = &rio_close;
204 dev->get_stats = &get_stats;
205 dev->set_multicast_list = &set_multicast;
206 dev->do_ioctl = &rio_ioctl;
207 dev->tx_timeout = &rio_tx_timeout;
208 dev->watchdog_timeo = TX_TIMEOUT;
209 dev->change_mtu = &change_mtu;
210 SET_ETHTOOL_OPS(dev, ðtool_ops);
212 dev->features = NETIF_F_IP_CSUM;
214 pci_set_drvdata (pdev, dev);
216 ring_space = pci_alloc_consistent (pdev, TX_TOTAL_SIZE, &ring_dma);
218 goto err_out_iounmap;
219 np->tx_ring = (struct netdev_desc *) ring_space;
220 np->tx_ring_dma = ring_dma;
222 ring_space = pci_alloc_consistent (pdev, RX_TOTAL_SIZE, &ring_dma);
224 goto err_out_unmap_tx;
225 np->rx_ring = (struct netdev_desc *) ring_space;
226 np->rx_ring_dma = ring_dma;
228 /* Parse eeprom data */
231 /* Find PHY address */
232 err = find_miiphy (dev);
234 goto err_out_unmap_rx;
237 np->phy_media = (readw(ioaddr + ASICCtrl) & PhyMedia) ? 1 : 0;
239 /* Set media and reset PHY */
241 /* default Auto-Negotiation for fiber deivices */
242 if (np->an_enable == 2) {
245 mii_set_media_pcs (dev);
247 /* Auto-Negotiation is mandatory for 1000BASE-T,
248 IEEE 802.3ab Annex 28D page 14 */
249 if (np->speed == 1000)
254 err = register_netdev (dev);
256 goto err_out_unmap_rx;
260 printk (KERN_INFO "%s: %s, %02x:%02x:%02x:%02x:%02x:%02x, IRQ %d\n",
262 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
263 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5], irq);
265 printk(KERN_INFO "tx_coalesce:\t%d packets\n",
268 printk(KERN_INFO "rx_coalesce:\t%d packets\n"
269 KERN_INFO "rx_timeout: \t%d ns\n",
270 np->rx_coalesce, np->rx_timeout*640);
272 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
276 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
278 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
281 iounmap ((void *) ioaddr);
288 pci_release_regions (pdev);
291 pci_disable_device (pdev);
296 find_miiphy (struct net_device *dev)
298 int i, phy_found = 0;
299 struct netdev_private *np;
301 np = netdev_priv(dev);
302 ioaddr = dev->base_addr;
305 for (i = 31; i >= 0; i--) {
306 int mii_status = mii_read (dev, i, 1);
307 if (mii_status != 0xffff && mii_status != 0x0000) {
313 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name);
320 parse_eeprom (struct net_device *dev)
323 long ioaddr = dev->base_addr;
327 PSROM_t psrom = (PSROM_t) sromdata;
328 struct netdev_private *np = netdev_priv(dev);
333 ioaddr = pci_resource_start (np->pdev, 0);
336 for (i = 0; i < 128; i++) {
337 ((u16 *) sromdata)[i] = le16_to_cpu (read_eeprom (ioaddr, i));
340 ioaddr = dev->base_addr;
342 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */
344 crc = ~ether_crc_le (256 - 4, sromdata);
345 if (psrom->crc != crc) {
346 printk (KERN_ERR "%s: EEPROM data CRC error.\n",
352 /* Set MAC address */
353 for (i = 0; i < 6; i++)
354 dev->dev_addr[i] = psrom->mac_addr[i];
356 if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) {
360 /* Parse Software Information Block */
362 psib = (u8 *) sromdata;
366 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) {
367 printk (KERN_ERR "Cell data error\n");
371 case 0: /* Format version */
373 case 1: /* End of cell */
375 case 2: /* Duplex Polarity */
376 np->duplex_polarity = psib[i];
377 writeb (readb (ioaddr + PhyCtrl) | psib[i],
380 case 3: /* Wake Polarity */
381 np->wake_polarity = psib[i];
383 case 9: /* Adapter description */
384 j = (next - i > 255) ? 255 : next - i;
385 memcpy (np->name, &(psib[i]), j);
391 case 8: /* Reversed */
393 default: /* Unknown cell */
403 rio_open (struct net_device *dev)
405 struct netdev_private *np = netdev_priv(dev);
406 long ioaddr = dev->base_addr;
410 i = request_irq (dev->irq, &rio_interrupt, IRQF_SHARED, dev->name, dev);
414 /* Reset all logic functions */
415 writew (GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset,
416 ioaddr + ASICCtrl + 2);
419 /* DebugCtrl bit 4, 5, 9 must set */
420 writel (readl (ioaddr + DebugCtrl) | 0x0230, ioaddr + DebugCtrl);
424 writew (MAX_JUMBO+14, ioaddr + MaxFrameSize);
428 /* Get station address */
429 for (i = 0; i < 6; i++)
430 writeb (dev->dev_addr[i], ioaddr + StationAddr0 + i);
434 writel (np->rx_coalesce | np->rx_timeout << 16,
435 ioaddr + RxDMAIntCtrl);
437 /* Set RIO to poll every N*320nsec. */
438 writeb (0x20, ioaddr + RxDMAPollPeriod);
439 writeb (0xff, ioaddr + TxDMAPollPeriod);
440 writeb (0x30, ioaddr + RxDMABurstThresh);
441 writeb (0x30, ioaddr + RxDMAUrgentThresh);
442 writel (0x0007ffff, ioaddr + RmonStatMask);
443 /* clear statistics */
448 /* priority field in RxDMAIntCtrl */
449 writel (readl(ioaddr + RxDMAIntCtrl) | 0x7 << 10,
450 ioaddr + RxDMAIntCtrl);
452 writew (np->vlan, ioaddr + VLANId);
453 /* Length/Type should be 0x8100 */
454 writel (0x8100 << 16 | np->vlan, ioaddr + VLANTag);
455 /* Enable AutoVLANuntagging, but disable AutoVLANtagging.
456 VLAN information tagged by TFC' VID, CFI fields. */
457 writel (readl (ioaddr + MACCtrl) | AutoVLANuntagging,
461 init_timer (&np->timer);
462 np->timer.expires = jiffies + 1*HZ;
463 np->timer.data = (unsigned long) dev;
464 np->timer.function = &rio_timer;
465 add_timer (&np->timer);
468 writel (readl (ioaddr + MACCtrl) | StatsEnable | RxEnable | TxEnable,
472 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
473 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
474 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
475 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
476 writew(macctrl, ioaddr + MACCtrl);
478 netif_start_queue (dev);
480 /* Enable default interrupts */
486 rio_timer (unsigned long data)
488 struct net_device *dev = (struct net_device *)data;
489 struct netdev_private *np = netdev_priv(dev);
491 int next_tick = 1*HZ;
494 spin_lock_irqsave(&np->rx_lock, flags);
495 /* Recover rx ring exhausted error */
496 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) {
497 printk(KERN_INFO "Try to recover rx ring exhausted...\n");
498 /* Re-allocate skbuffs to fill the descriptor ring */
499 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) {
501 entry = np->old_rx % RX_RING_SIZE;
502 /* Dropped packets don't need to re-allocate */
503 if (np->rx_skbuff[entry] == NULL) {
504 skb = dev_alloc_skb (np->rx_buf_sz);
506 np->rx_ring[entry].fraginfo = 0;
508 "%s: Still unable to re-allocate Rx skbuff.#%d\n",
512 np->rx_skbuff[entry] = skb;
513 /* 16 byte align the IP header */
514 skb_reserve (skb, 2);
515 np->rx_ring[entry].fraginfo =
516 cpu_to_le64 (pci_map_single
517 (np->pdev, skb->data, np->rx_buf_sz,
518 PCI_DMA_FROMDEVICE));
520 np->rx_ring[entry].fraginfo |=
521 cpu_to_le64 (np->rx_buf_sz) << 48;
522 np->rx_ring[entry].status = 0;
525 spin_unlock_irqrestore (&np->rx_lock, flags);
526 np->timer.expires = jiffies + next_tick;
527 add_timer(&np->timer);
531 rio_tx_timeout (struct net_device *dev)
533 long ioaddr = dev->base_addr;
535 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",
536 dev->name, readl (ioaddr + TxStatus));
539 dev->trans_start = jiffies;
542 /* allocate and initialize Tx and Rx descriptors */
544 alloc_list (struct net_device *dev)
546 struct netdev_private *np = netdev_priv(dev);
549 np->cur_rx = np->cur_tx = 0;
550 np->old_rx = np->old_tx = 0;
551 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32);
553 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */
554 for (i = 0; i < TX_RING_SIZE; i++) {
555 np->tx_skbuff[i] = NULL;
556 np->tx_ring[i].status = cpu_to_le64 (TFDDone);
557 np->tx_ring[i].next_desc = cpu_to_le64 (np->tx_ring_dma +
558 ((i+1)%TX_RING_SIZE) *
559 sizeof (struct netdev_desc));
562 /* Initialize Rx descriptors */
563 for (i = 0; i < RX_RING_SIZE; i++) {
564 np->rx_ring[i].next_desc = cpu_to_le64 (np->rx_ring_dma +
565 ((i + 1) % RX_RING_SIZE) *
566 sizeof (struct netdev_desc));
567 np->rx_ring[i].status = 0;
568 np->rx_ring[i].fraginfo = 0;
569 np->rx_skbuff[i] = NULL;
572 /* Allocate the rx buffers */
573 for (i = 0; i < RX_RING_SIZE; i++) {
574 /* Allocated fixed size of skbuff */
575 struct sk_buff *skb = dev_alloc_skb (np->rx_buf_sz);
576 np->rx_skbuff[i] = skb;
579 "%s: alloc_list: allocate Rx buffer error! ",
583 skb_reserve (skb, 2); /* 16 byte align the IP header. */
584 /* Rubicon now supports 40 bits of addressing space. */
585 np->rx_ring[i].fraginfo =
586 cpu_to_le64 ( pci_map_single (
587 np->pdev, skb->data, np->rx_buf_sz,
588 PCI_DMA_FROMDEVICE));
589 np->rx_ring[i].fraginfo |= cpu_to_le64 (np->rx_buf_sz) << 48;
593 writel (cpu_to_le32 (np->rx_ring_dma), dev->base_addr + RFDListPtr0);
594 writel (0, dev->base_addr + RFDListPtr1);
600 start_xmit (struct sk_buff *skb, struct net_device *dev)
602 struct netdev_private *np = netdev_priv(dev);
603 struct netdev_desc *txdesc;
606 u64 tfc_vlan_tag = 0;
608 if (np->link_status == 0) { /* Link Down */
612 ioaddr = dev->base_addr;
613 entry = np->cur_tx % TX_RING_SIZE;
614 np->tx_skbuff[entry] = skb;
615 txdesc = &np->tx_ring[entry];
618 if (skb->ip_summed == CHECKSUM_PARTIAL) {
620 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable |
626 cpu_to_le64 (VLANTagInsert) |
627 (cpu_to_le64 (np->vlan) << 32) |
628 (cpu_to_le64 (skb->priority) << 45);
630 txdesc->fraginfo = cpu_to_le64 (pci_map_single (np->pdev, skb->data,
633 txdesc->fraginfo |= cpu_to_le64 (skb->len) << 48;
635 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode
636 * Work around: Always use 1 descriptor in 10Mbps mode */
637 if (entry % np->tx_coalesce == 0 || np->speed == 10)
638 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
641 (1 << FragCountShift));
643 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
645 (1 << FragCountShift));
648 writel (readl (ioaddr + DMACtrl) | 0x00001000, ioaddr + DMACtrl);
650 writel(10000, ioaddr + CountDown);
651 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
652 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
653 < TX_QUEUE_LEN - 1 && np->speed != 10) {
655 } else if (!netif_queue_stopped(dev)) {
656 netif_stop_queue (dev);
659 /* The first TFDListPtr */
660 if (readl (dev->base_addr + TFDListPtr0) == 0) {
661 writel (np->tx_ring_dma + entry * sizeof (struct netdev_desc),
662 dev->base_addr + TFDListPtr0);
663 writel (0, dev->base_addr + TFDListPtr1);
666 /* NETDEV WATCHDOG timer */
667 dev->trans_start = jiffies;
672 rio_interrupt (int irq, void *dev_instance)
674 struct net_device *dev = dev_instance;
675 struct netdev_private *np;
678 int cnt = max_intrloop;
681 ioaddr = dev->base_addr;
682 np = netdev_priv(dev);
684 int_status = readw (ioaddr + IntStatus);
685 writew (int_status, ioaddr + IntStatus);
686 int_status &= DEFAULT_INTR;
687 if (int_status == 0 || --cnt < 0)
690 /* Processing received packets */
691 if (int_status & RxDMAComplete)
692 receive_packet (dev);
693 /* TxDMAComplete interrupt */
694 if ((int_status & (TxDMAComplete|IntRequested))) {
696 tx_status = readl (ioaddr + TxStatus);
697 if (tx_status & 0x01)
698 tx_error (dev, tx_status);
699 /* Free used tx skbuffs */
700 rio_free_tx (dev, 1);
703 /* Handle uncommon events */
705 (HostError | LinkEvent | UpdateStats))
706 rio_error (dev, int_status);
708 if (np->cur_tx != np->old_tx)
709 writel (100, ioaddr + CountDown);
710 return IRQ_RETVAL(handled);
714 rio_free_tx (struct net_device *dev, int irq)
716 struct netdev_private *np = netdev_priv(dev);
717 int entry = np->old_tx % TX_RING_SIZE;
719 unsigned long flag = 0;
722 spin_lock(&np->tx_lock);
724 spin_lock_irqsave(&np->tx_lock, flag);
726 /* Free used tx skbuffs */
727 while (entry != np->cur_tx) {
730 if (!(np->tx_ring[entry].status & TFDDone))
732 skb = np->tx_skbuff[entry];
733 pci_unmap_single (np->pdev,
734 np->tx_ring[entry].fraginfo & DMA_48BIT_MASK,
735 skb->len, PCI_DMA_TODEVICE);
737 dev_kfree_skb_irq (skb);
741 np->tx_skbuff[entry] = NULL;
742 entry = (entry + 1) % TX_RING_SIZE;
746 spin_unlock(&np->tx_lock);
748 spin_unlock_irqrestore(&np->tx_lock, flag);
751 /* If the ring is no longer full, clear tx_full and
752 call netif_wake_queue() */
754 if (netif_queue_stopped(dev) &&
755 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
756 < TX_QUEUE_LEN - 1 || np->speed == 10)) {
757 netif_wake_queue (dev);
762 tx_error (struct net_device *dev, int tx_status)
764 struct netdev_private *np;
765 long ioaddr = dev->base_addr;
769 np = netdev_priv(dev);
771 frame_id = (tx_status & 0xffff0000);
772 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
773 dev->name, tx_status, frame_id);
774 np->stats.tx_errors++;
775 /* Ttransmit Underrun */
776 if (tx_status & 0x10) {
777 np->stats.tx_fifo_errors++;
778 writew (readw (ioaddr + TxStartThresh) + 0x10,
779 ioaddr + TxStartThresh);
780 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
781 writew (TxReset | DMAReset | FIFOReset | NetworkReset,
782 ioaddr + ASICCtrl + 2);
783 /* Wait for ResetBusy bit clear */
784 for (i = 50; i > 0; i--) {
785 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
789 rio_free_tx (dev, 1);
790 /* Reset TFDListPtr */
791 writel (np->tx_ring_dma +
792 np->old_tx * sizeof (struct netdev_desc),
793 dev->base_addr + TFDListPtr0);
794 writel (0, dev->base_addr + TFDListPtr1);
796 /* Let TxStartThresh stay default value */
799 if (tx_status & 0x04) {
800 np->stats.tx_fifo_errors++;
801 /* TxReset and clear FIFO */
802 writew (TxReset | FIFOReset, ioaddr + ASICCtrl + 2);
803 /* Wait reset done */
804 for (i = 50; i > 0; i--) {
805 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
809 /* Let TxStartThresh stay default value */
811 /* Maximum Collisions */
813 if (tx_status & 0x08)
814 np->stats.collisions16++;
816 if (tx_status & 0x08)
817 np->stats.collisions++;
820 writel (readw (dev->base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl);
824 receive_packet (struct net_device *dev)
826 struct netdev_private *np = netdev_priv(dev);
827 int entry = np->cur_rx % RX_RING_SIZE;
830 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */
832 struct netdev_desc *desc = &np->rx_ring[entry];
836 if (!(desc->status & RFDDone) ||
837 !(desc->status & FrameStart) || !(desc->status & FrameEnd))
840 /* Chip omits the CRC. */
841 pkt_len = le64_to_cpu (desc->status & 0xffff);
842 frame_status = le64_to_cpu (desc->status);
845 /* Update rx error statistics, drop packet. */
846 if (frame_status & RFS_Errors) {
847 np->stats.rx_errors++;
848 if (frame_status & (RxRuntFrame | RxLengthError))
849 np->stats.rx_length_errors++;
850 if (frame_status & RxFCSError)
851 np->stats.rx_crc_errors++;
852 if (frame_status & RxAlignmentError && np->speed != 1000)
853 np->stats.rx_frame_errors++;
854 if (frame_status & RxFIFOOverrun)
855 np->stats.rx_fifo_errors++;
859 /* Small skbuffs for short packets */
860 if (pkt_len > copy_thresh) {
861 pci_unmap_single (np->pdev,
862 desc->fraginfo & DMA_48BIT_MASK,
865 skb_put (skb = np->rx_skbuff[entry], pkt_len);
866 np->rx_skbuff[entry] = NULL;
867 } else if ((skb = dev_alloc_skb (pkt_len + 2)) != NULL) {
868 pci_dma_sync_single_for_cpu(np->pdev,
873 /* 16 byte align the IP header */
874 skb_reserve (skb, 2);
875 skb_copy_to_linear_data (skb,
876 np->rx_skbuff[entry]->data,
878 skb_put (skb, pkt_len);
879 pci_dma_sync_single_for_device(np->pdev,
885 skb->protocol = eth_type_trans (skb, dev);
887 /* Checksum done by hw, but csum value unavailable. */
888 if (np->pdev->pci_rev_id >= 0x0c &&
889 !(frame_status & (TCPError | UDPError | IPError))) {
890 skb->ip_summed = CHECKSUM_UNNECESSARY;
894 dev->last_rx = jiffies;
896 entry = (entry + 1) % RX_RING_SIZE;
898 spin_lock(&np->rx_lock);
900 /* Re-allocate skbuffs to fill the descriptor ring */
902 while (entry != np->cur_rx) {
904 /* Dropped packets don't need to re-allocate */
905 if (np->rx_skbuff[entry] == NULL) {
906 skb = dev_alloc_skb (np->rx_buf_sz);
908 np->rx_ring[entry].fraginfo = 0;
910 "%s: receive_packet: "
911 "Unable to re-allocate Rx skbuff.#%d\n",
915 np->rx_skbuff[entry] = skb;
916 /* 16 byte align the IP header */
917 skb_reserve (skb, 2);
918 np->rx_ring[entry].fraginfo =
919 cpu_to_le64 (pci_map_single
920 (np->pdev, skb->data, np->rx_buf_sz,
921 PCI_DMA_FROMDEVICE));
923 np->rx_ring[entry].fraginfo |=
924 cpu_to_le64 (np->rx_buf_sz) << 48;
925 np->rx_ring[entry].status = 0;
926 entry = (entry + 1) % RX_RING_SIZE;
929 spin_unlock(&np->rx_lock);
934 rio_error (struct net_device *dev, int int_status)
936 long ioaddr = dev->base_addr;
937 struct netdev_private *np = netdev_priv(dev);
940 /* Link change event */
941 if (int_status & LinkEvent) {
942 if (mii_wait_link (dev, 10) == 0) {
943 printk (KERN_INFO "%s: Link up\n", dev->name);
945 mii_get_media_pcs (dev);
948 if (np->speed == 1000)
949 np->tx_coalesce = tx_coalesce;
953 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
954 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
955 macctrl |= (np->tx_flow) ?
956 TxFlowControlEnable : 0;
957 macctrl |= (np->rx_flow) ?
958 RxFlowControlEnable : 0;
959 writew(macctrl, ioaddr + MACCtrl);
961 netif_carrier_on(dev);
963 printk (KERN_INFO "%s: Link off\n", dev->name);
965 netif_carrier_off(dev);
969 /* UpdateStats statistics registers */
970 if (int_status & UpdateStats) {
974 /* PCI Error, a catastronphic error related to the bus interface
975 occurs, set GlobalReset and HostReset to reset. */
976 if (int_status & HostError) {
977 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
978 dev->name, int_status);
979 writew (GlobalReset | HostReset, ioaddr + ASICCtrl + 2);
984 static struct net_device_stats *
985 get_stats (struct net_device *dev)
987 long ioaddr = dev->base_addr;
988 struct netdev_private *np = netdev_priv(dev);
992 unsigned int stat_reg;
994 /* All statistics registers need to be acknowledged,
995 else statistic overflow could cause problems */
997 np->stats.rx_packets += readl (ioaddr + FramesRcvOk);
998 np->stats.tx_packets += readl (ioaddr + FramesXmtOk);
999 np->stats.rx_bytes += readl (ioaddr + OctetRcvOk);
1000 np->stats.tx_bytes += readl (ioaddr + OctetXmtOk);
1002 np->stats.multicast = readl (ioaddr + McstFramesRcvdOk);
1003 np->stats.collisions += readl (ioaddr + SingleColFrames)
1004 + readl (ioaddr + MultiColFrames);
1006 /* detailed tx errors */
1007 stat_reg = readw (ioaddr + FramesAbortXSColls);
1008 np->stats.tx_aborted_errors += stat_reg;
1009 np->stats.tx_errors += stat_reg;
1011 stat_reg = readw (ioaddr + CarrierSenseErrors);
1012 np->stats.tx_carrier_errors += stat_reg;
1013 np->stats.tx_errors += stat_reg;
1015 /* Clear all other statistic register. */
1016 readl (ioaddr + McstOctetXmtOk);
1017 readw (ioaddr + BcstFramesXmtdOk);
1018 readl (ioaddr + McstFramesXmtdOk);
1019 readw (ioaddr + BcstFramesRcvdOk);
1020 readw (ioaddr + MacControlFramesRcvd);
1021 readw (ioaddr + FrameTooLongErrors);
1022 readw (ioaddr + InRangeLengthErrors);
1023 readw (ioaddr + FramesCheckSeqErrors);
1024 readw (ioaddr + FramesLostRxErrors);
1025 readl (ioaddr + McstOctetXmtOk);
1026 readl (ioaddr + BcstOctetXmtOk);
1027 readl (ioaddr + McstFramesXmtdOk);
1028 readl (ioaddr + FramesWDeferredXmt);
1029 readl (ioaddr + LateCollisions);
1030 readw (ioaddr + BcstFramesXmtdOk);
1031 readw (ioaddr + MacControlFramesXmtd);
1032 readw (ioaddr + FramesWEXDeferal);
1035 for (i = 0x100; i <= 0x150; i += 4)
1038 readw (ioaddr + TxJumboFrames);
1039 readw (ioaddr + RxJumboFrames);
1040 readw (ioaddr + TCPCheckSumErrors);
1041 readw (ioaddr + UDPCheckSumErrors);
1042 readw (ioaddr + IPCheckSumErrors);
1047 clear_stats (struct net_device *dev)
1049 long ioaddr = dev->base_addr;
1054 /* All statistics registers need to be acknowledged,
1055 else statistic overflow could cause problems */
1056 readl (ioaddr + FramesRcvOk);
1057 readl (ioaddr + FramesXmtOk);
1058 readl (ioaddr + OctetRcvOk);
1059 readl (ioaddr + OctetXmtOk);
1061 readl (ioaddr + McstFramesRcvdOk);
1062 readl (ioaddr + SingleColFrames);
1063 readl (ioaddr + MultiColFrames);
1064 readl (ioaddr + LateCollisions);
1065 /* detailed rx errors */
1066 readw (ioaddr + FrameTooLongErrors);
1067 readw (ioaddr + InRangeLengthErrors);
1068 readw (ioaddr + FramesCheckSeqErrors);
1069 readw (ioaddr + FramesLostRxErrors);
1071 /* detailed tx errors */
1072 readw (ioaddr + FramesAbortXSColls);
1073 readw (ioaddr + CarrierSenseErrors);
1075 /* Clear all other statistic register. */
1076 readl (ioaddr + McstOctetXmtOk);
1077 readw (ioaddr + BcstFramesXmtdOk);
1078 readl (ioaddr + McstFramesXmtdOk);
1079 readw (ioaddr + BcstFramesRcvdOk);
1080 readw (ioaddr + MacControlFramesRcvd);
1081 readl (ioaddr + McstOctetXmtOk);
1082 readl (ioaddr + BcstOctetXmtOk);
1083 readl (ioaddr + McstFramesXmtdOk);
1084 readl (ioaddr + FramesWDeferredXmt);
1085 readw (ioaddr + BcstFramesXmtdOk);
1086 readw (ioaddr + MacControlFramesXmtd);
1087 readw (ioaddr + FramesWEXDeferal);
1089 for (i = 0x100; i <= 0x150; i += 4)
1092 readw (ioaddr + TxJumboFrames);
1093 readw (ioaddr + RxJumboFrames);
1094 readw (ioaddr + TCPCheckSumErrors);
1095 readw (ioaddr + UDPCheckSumErrors);
1096 readw (ioaddr + IPCheckSumErrors);
1102 change_mtu (struct net_device *dev, int new_mtu)
1104 struct netdev_private *np = netdev_priv(dev);
1105 int max = (np->jumbo) ? MAX_JUMBO : 1536;
1107 if ((new_mtu < 68) || (new_mtu > max)) {
1117 set_multicast (struct net_device *dev)
1119 long ioaddr = dev->base_addr;
1122 struct netdev_private *np = netdev_priv(dev);
1124 hash_table[0] = hash_table[1] = 0;
1125 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
1126 hash_table[1] |= cpu_to_le32(0x02000000);
1127 if (dev->flags & IFF_PROMISC) {
1128 /* Receive all frames promiscuously. */
1129 rx_mode = ReceiveAllFrames;
1130 } else if ((dev->flags & IFF_ALLMULTI) ||
1131 (dev->mc_count > multicast_filter_limit)) {
1132 /* Receive broadcast and multicast frames */
1133 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast;
1134 } else if (dev->mc_count > 0) {
1136 struct dev_mc_list *mclist;
1137 /* Receive broadcast frames and multicast frames filtering
1140 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast;
1141 for (i=0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1142 i++, mclist=mclist->next)
1145 int crc = ether_crc_le (ETH_ALEN, mclist->dmi_addr);
1146 /* The inverted high significant 6 bits of CRC are
1147 used as an index to hashtable */
1148 for (bit = 0; bit < 6; bit++)
1149 if (crc & (1 << (31 - bit)))
1150 index |= (1 << bit);
1151 hash_table[index / 32] |= (1 << (index % 32));
1154 rx_mode = ReceiveBroadcast | ReceiveUnicast;
1157 /* ReceiveVLANMatch field in ReceiveMode */
1158 rx_mode |= ReceiveVLANMatch;
1161 writel (hash_table[0], ioaddr + HashTable0);
1162 writel (hash_table[1], ioaddr + HashTable1);
1163 writew (rx_mode, ioaddr + ReceiveMode);
1166 static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1168 struct netdev_private *np = netdev_priv(dev);
1169 strcpy(info->driver, "dl2k");
1170 strcpy(info->version, DRV_VERSION);
1171 strcpy(info->bus_info, pci_name(np->pdev));
1174 static int rio_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1176 struct netdev_private *np = netdev_priv(dev);
1177 if (np->phy_media) {
1179 cmd->supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE;
1180 cmd->advertising= ADVERTISED_Autoneg | ADVERTISED_FIBRE;
1181 cmd->port = PORT_FIBRE;
1182 cmd->transceiver = XCVR_INTERNAL;
1185 cmd->supported = SUPPORTED_10baseT_Half |
1186 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half
1187 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full |
1188 SUPPORTED_Autoneg | SUPPORTED_MII;
1189 cmd->advertising = ADVERTISED_10baseT_Half |
1190 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half |
1191 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full|
1192 ADVERTISED_Autoneg | ADVERTISED_MII;
1193 cmd->port = PORT_MII;
1194 cmd->transceiver = XCVR_INTERNAL;
1196 if ( np->link_status ) {
1197 cmd->speed = np->speed;
1198 cmd->duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
1204 cmd->autoneg = AUTONEG_ENABLE;
1206 cmd->autoneg = AUTONEG_DISABLE;
1208 cmd->phy_address = np->phy_addr;
1212 static int rio_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1214 struct netdev_private *np = netdev_priv(dev);
1215 netif_carrier_off(dev);
1216 if (cmd->autoneg == AUTONEG_ENABLE) {
1226 if (np->speed == 1000) {
1227 cmd->speed = SPEED_100;
1228 cmd->duplex = DUPLEX_FULL;
1229 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n");
1231 switch(cmd->speed + cmd->duplex) {
1233 case SPEED_10 + DUPLEX_HALF:
1235 np->full_duplex = 0;
1238 case SPEED_10 + DUPLEX_FULL:
1240 np->full_duplex = 1;
1242 case SPEED_100 + DUPLEX_HALF:
1244 np->full_duplex = 0;
1246 case SPEED_100 + DUPLEX_FULL:
1248 np->full_duplex = 1;
1250 case SPEED_1000 + DUPLEX_HALF:/* not supported */
1251 case SPEED_1000 + DUPLEX_FULL:/* not supported */
1260 static u32 rio_get_link(struct net_device *dev)
1262 struct netdev_private *np = netdev_priv(dev);
1263 return np->link_status;
1266 static const struct ethtool_ops ethtool_ops = {
1267 .get_drvinfo = rio_get_drvinfo,
1268 .get_settings = rio_get_settings,
1269 .set_settings = rio_set_settings,
1270 .get_link = rio_get_link,
1274 rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1277 struct netdev_private *np = netdev_priv(dev);
1278 struct mii_data *miidata = (struct mii_data *) &rq->ifr_ifru;
1280 struct netdev_desc *desc;
1283 phy_addr = np->phy_addr;
1285 case SIOCDEVPRIVATE:
1288 case SIOCDEVPRIVATE + 1:
1289 miidata->out_value = mii_read (dev, phy_addr, miidata->reg_num);
1291 case SIOCDEVPRIVATE + 2:
1292 mii_write (dev, phy_addr, miidata->reg_num, miidata->in_value);
1294 case SIOCDEVPRIVATE + 3:
1296 case SIOCDEVPRIVATE + 4:
1298 case SIOCDEVPRIVATE + 5:
1299 netif_stop_queue (dev);
1301 case SIOCDEVPRIVATE + 6:
1302 netif_wake_queue (dev);
1304 case SIOCDEVPRIVATE + 7:
1306 ("tx_full=%x cur_tx=%lx old_tx=%lx cur_rx=%lx old_rx=%lx\n",
1307 netif_queue_stopped(dev), np->cur_tx, np->old_tx, np->cur_rx,
1310 case SIOCDEVPRIVATE + 8:
1311 printk("TX ring:\n");
1312 for (i = 0; i < TX_RING_SIZE; i++) {
1313 desc = &np->tx_ring[i];
1315 ("%02x:cur:%08x next:%08x status:%08x frag1:%08x frag0:%08x",
1317 (u32) (np->tx_ring_dma + i * sizeof (*desc)),
1318 (u32) desc->next_desc,
1319 (u32) desc->status, (u32) (desc->fraginfo >> 32),
1320 (u32) desc->fraginfo);
1332 #define EEP_READ 0x0200
1333 #define EEP_BUSY 0x8000
1334 /* Read the EEPROM word */
1335 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1337 read_eeprom (long ioaddr, int eep_addr)
1340 outw (EEP_READ | (eep_addr & 0xff), ioaddr + EepromCtrl);
1342 if (!(inw (ioaddr + EepromCtrl) & EEP_BUSY)) {
1343 return inw (ioaddr + EepromData);
1349 enum phy_ctrl_bits {
1350 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04,
1354 #define mii_delay() readb(ioaddr)
1356 mii_sendbit (struct net_device *dev, u32 data)
1358 long ioaddr = dev->base_addr + PhyCtrl;
1359 data = (data) ? MII_DATA1 : 0;
1361 data |= (readb (ioaddr) & 0xf8) | MII_WRITE;
1362 writeb (data, ioaddr);
1364 writeb (data | MII_CLK, ioaddr);
1369 mii_getbit (struct net_device *dev)
1371 long ioaddr = dev->base_addr + PhyCtrl;
1374 data = (readb (ioaddr) & 0xf8) | MII_READ;
1375 writeb (data, ioaddr);
1377 writeb (data | MII_CLK, ioaddr);
1379 return ((readb (ioaddr) >> 1) & 1);
1383 mii_send_bits (struct net_device *dev, u32 data, int len)
1386 for (i = len - 1; i >= 0; i--) {
1387 mii_sendbit (dev, data & (1 << i));
1392 mii_read (struct net_device *dev, int phy_addr, int reg_num)
1399 mii_send_bits (dev, 0xffffffff, 32);
1400 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1401 /* ST,OP = 0110'b for read operation */
1402 cmd = (0x06 << 10 | phy_addr << 5 | reg_num);
1403 mii_send_bits (dev, cmd, 14);
1405 if (mii_getbit (dev))
1408 for (i = 0; i < 16; i++) {
1409 retval |= mii_getbit (dev);
1414 return (retval >> 1) & 0xffff;
1420 mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data)
1425 mii_send_bits (dev, 0xffffffff, 32);
1426 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1427 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1428 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data;
1429 mii_send_bits (dev, cmd, 32);
1435 mii_wait_link (struct net_device *dev, int wait)
1439 struct netdev_private *np;
1441 np = netdev_priv(dev);
1442 phy_addr = np->phy_addr;
1445 bmsr.image = mii_read (dev, phy_addr, MII_BMSR);
1446 if (bmsr.bits.link_status)
1449 } while (--wait > 0);
1453 mii_get_media (struct net_device *dev)
1461 struct netdev_private *np;
1463 np = netdev_priv(dev);
1464 phy_addr = np->phy_addr;
1466 bmsr.image = mii_read (dev, phy_addr, MII_BMSR);
1467 if (np->an_enable) {
1468 if (!bmsr.bits.an_complete) {
1469 /* Auto-Negotiation not completed */
1472 negotiate.image = mii_read (dev, phy_addr, MII_ANAR) &
1473 mii_read (dev, phy_addr, MII_ANLPAR);
1474 mscr.image = mii_read (dev, phy_addr, MII_MSCR);
1475 mssr.image = mii_read (dev, phy_addr, MII_MSSR);
1476 if (mscr.bits.media_1000BT_FD & mssr.bits.lp_1000BT_FD) {
1478 np->full_duplex = 1;
1479 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1480 } else if (mscr.bits.media_1000BT_HD & mssr.bits.lp_1000BT_HD) {
1482 np->full_duplex = 0;
1483 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n");
1484 } else if (negotiate.bits.media_100BX_FD) {
1486 np->full_duplex = 1;
1487 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n");
1488 } else if (negotiate.bits.media_100BX_HD) {
1490 np->full_duplex = 0;
1491 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n");
1492 } else if (negotiate.bits.media_10BT_FD) {
1494 np->full_duplex = 1;
1495 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n");
1496 } else if (negotiate.bits.media_10BT_HD) {
1498 np->full_duplex = 0;
1499 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n");
1501 if (negotiate.bits.pause) {
1504 } else if (negotiate.bits.asymmetric) {
1508 /* else tx_flow, rx_flow = user select */
1510 bmcr.image = mii_read (dev, phy_addr, MII_BMCR);
1511 if (bmcr.bits.speed100 == 1 && bmcr.bits.speed1000 == 0) {
1512 printk (KERN_INFO "Operating at 100 Mbps, ");
1513 } else if (bmcr.bits.speed100 == 0 && bmcr.bits.speed1000 == 0) {
1514 printk (KERN_INFO "Operating at 10 Mbps, ");
1515 } else if (bmcr.bits.speed100 == 0 && bmcr.bits.speed1000 == 1) {
1516 printk (KERN_INFO "Operating at 1000 Mbps, ");
1518 if (bmcr.bits.duplex_mode) {
1519 printk ("Full duplex\n");
1521 printk ("Half duplex\n");
1525 printk(KERN_INFO "Enable Tx Flow Control\n");
1527 printk(KERN_INFO "Disable Tx Flow Control\n");
1529 printk(KERN_INFO "Enable Rx Flow Control\n");
1531 printk(KERN_INFO "Disable Rx Flow Control\n");
1537 mii_set_media (struct net_device *dev)
1544 struct netdev_private *np;
1545 np = netdev_priv(dev);
1546 phy_addr = np->phy_addr;
1548 /* Does user set speed? */
1549 if (np->an_enable) {
1550 /* Advertise capabilities */
1551 bmsr.image = mii_read (dev, phy_addr, MII_BMSR);
1552 anar.image = mii_read (dev, phy_addr, MII_ANAR);
1553 anar.bits.media_100BX_FD = bmsr.bits.media_100BX_FD;
1554 anar.bits.media_100BX_HD = bmsr.bits.media_100BX_HD;
1555 anar.bits.media_100BT4 = bmsr.bits.media_100BT4;
1556 anar.bits.media_10BT_FD = bmsr.bits.media_10BT_FD;
1557 anar.bits.media_10BT_HD = bmsr.bits.media_10BT_HD;
1558 anar.bits.pause = 1;
1559 anar.bits.asymmetric = 1;
1560 mii_write (dev, phy_addr, MII_ANAR, anar.image);
1562 /* Enable Auto crossover */
1563 pscr.image = mii_read (dev, phy_addr, MII_PHY_SCR);
1564 pscr.bits.mdi_crossover_mode = 3; /* 11'b */
1565 mii_write (dev, phy_addr, MII_PHY_SCR, pscr.image);
1567 /* Soft reset PHY */
1568 mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET);
1570 bmcr.bits.an_enable = 1;
1571 bmcr.bits.restart_an = 1;
1572 bmcr.bits.reset = 1;
1573 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1576 /* Force speed setting */
1577 /* 1) Disable Auto crossover */
1578 pscr.image = mii_read (dev, phy_addr, MII_PHY_SCR);
1579 pscr.bits.mdi_crossover_mode = 0;
1580 mii_write (dev, phy_addr, MII_PHY_SCR, pscr.image);
1583 bmcr.image = mii_read (dev, phy_addr, MII_BMCR);
1584 bmcr.bits.reset = 1;
1585 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1588 bmcr.image = 0x1940; /* must be 0x1940 */
1589 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1590 mdelay (100); /* wait a certain time */
1592 /* 4) Advertise nothing */
1593 mii_write (dev, phy_addr, MII_ANAR, 0);
1595 /* 5) Set media and Power Up */
1597 bmcr.bits.power_down = 1;
1598 if (np->speed == 100) {
1599 bmcr.bits.speed100 = 1;
1600 bmcr.bits.speed1000 = 0;
1601 printk (KERN_INFO "Manual 100 Mbps, ");
1602 } else if (np->speed == 10) {
1603 bmcr.bits.speed100 = 0;
1604 bmcr.bits.speed1000 = 0;
1605 printk (KERN_INFO "Manual 10 Mbps, ");
1607 if (np->full_duplex) {
1608 bmcr.bits.duplex_mode = 1;
1609 printk ("Full duplex\n");
1611 bmcr.bits.duplex_mode = 0;
1612 printk ("Half duplex\n");
1615 /* Set 1000BaseT Master/Slave setting */
1616 mscr.image = mii_read (dev, phy_addr, MII_MSCR);
1617 mscr.bits.cfg_enable = 1;
1618 mscr.bits.cfg_value = 0;
1620 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1627 mii_get_media_pcs (struct net_device *dev)
1629 ANAR_PCS_t negotiate;
1633 struct netdev_private *np;
1635 np = netdev_priv(dev);
1636 phy_addr = np->phy_addr;
1638 bmsr.image = mii_read (dev, phy_addr, PCS_BMSR);
1639 if (np->an_enable) {
1640 if (!bmsr.bits.an_complete) {
1641 /* Auto-Negotiation not completed */
1644 negotiate.image = mii_read (dev, phy_addr, PCS_ANAR) &
1645 mii_read (dev, phy_addr, PCS_ANLPAR);
1647 if (negotiate.bits.full_duplex) {
1648 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1649 np->full_duplex = 1;
1651 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n");
1652 np->full_duplex = 0;
1654 if (negotiate.bits.pause) {
1657 } else if (negotiate.bits.asymmetric) {
1661 /* else tx_flow, rx_flow = user select */
1663 bmcr.image = mii_read (dev, phy_addr, PCS_BMCR);
1664 printk (KERN_INFO "Operating at 1000 Mbps, ");
1665 if (bmcr.bits.duplex_mode) {
1666 printk ("Full duplex\n");
1668 printk ("Half duplex\n");
1672 printk(KERN_INFO "Enable Tx Flow Control\n");
1674 printk(KERN_INFO "Disable Tx Flow Control\n");
1676 printk(KERN_INFO "Enable Rx Flow Control\n");
1678 printk(KERN_INFO "Disable Rx Flow Control\n");
1684 mii_set_media_pcs (struct net_device *dev)
1690 struct netdev_private *np;
1691 np = netdev_priv(dev);
1692 phy_addr = np->phy_addr;
1694 /* Auto-Negotiation? */
1695 if (np->an_enable) {
1696 /* Advertise capabilities */
1697 esr.image = mii_read (dev, phy_addr, PCS_ESR);
1698 anar.image = mii_read (dev, phy_addr, MII_ANAR);
1699 anar.bits.half_duplex =
1700 esr.bits.media_1000BT_HD | esr.bits.media_1000BX_HD;
1701 anar.bits.full_duplex =
1702 esr.bits.media_1000BT_FD | esr.bits.media_1000BX_FD;
1703 anar.bits.pause = 1;
1704 anar.bits.asymmetric = 1;
1705 mii_write (dev, phy_addr, MII_ANAR, anar.image);
1707 /* Soft reset PHY */
1708 mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET);
1710 bmcr.bits.an_enable = 1;
1711 bmcr.bits.restart_an = 1;
1712 bmcr.bits.reset = 1;
1713 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1716 /* Force speed setting */
1719 bmcr.bits.reset = 1;
1720 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1723 bmcr.bits.an_enable = 0;
1724 if (np->full_duplex) {
1725 bmcr.bits.duplex_mode = 1;
1726 printk (KERN_INFO "Manual full duplex\n");
1728 bmcr.bits.duplex_mode = 0;
1729 printk (KERN_INFO "Manual half duplex\n");
1731 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1734 /* Advertise nothing */
1735 mii_write (dev, phy_addr, MII_ANAR, 0);
1742 rio_close (struct net_device *dev)
1744 long ioaddr = dev->base_addr;
1745 struct netdev_private *np = netdev_priv(dev);
1746 struct sk_buff *skb;
1749 netif_stop_queue (dev);
1751 /* Disable interrupts */
1752 writew (0, ioaddr + IntEnable);
1754 /* Stop Tx and Rx logics */
1755 writel (TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl);
1756 synchronize_irq (dev->irq);
1757 free_irq (dev->irq, dev);
1758 del_timer_sync (&np->timer);
1760 /* Free all the skbuffs in the queue. */
1761 for (i = 0; i < RX_RING_SIZE; i++) {
1762 np->rx_ring[i].status = 0;
1763 np->rx_ring[i].fraginfo = 0;
1764 skb = np->rx_skbuff[i];
1766 pci_unmap_single(np->pdev,
1767 np->rx_ring[i].fraginfo & DMA_48BIT_MASK,
1768 skb->len, PCI_DMA_FROMDEVICE);
1769 dev_kfree_skb (skb);
1770 np->rx_skbuff[i] = NULL;
1773 for (i = 0; i < TX_RING_SIZE; i++) {
1774 skb = np->tx_skbuff[i];
1776 pci_unmap_single(np->pdev,
1777 np->tx_ring[i].fraginfo & DMA_48BIT_MASK,
1778 skb->len, PCI_DMA_TODEVICE);
1779 dev_kfree_skb (skb);
1780 np->tx_skbuff[i] = NULL;
1787 static void __devexit
1788 rio_remove1 (struct pci_dev *pdev)
1790 struct net_device *dev = pci_get_drvdata (pdev);
1793 struct netdev_private *np = netdev_priv(dev);
1795 unregister_netdev (dev);
1796 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring,
1798 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1801 iounmap ((char *) (dev->base_addr));
1804 pci_release_regions (pdev);
1805 pci_disable_device (pdev);
1807 pci_set_drvdata (pdev, NULL);
1810 static struct pci_driver rio_driver = {
1812 .id_table = rio_pci_tbl,
1813 .probe = rio_probe1,
1814 .remove = __devexit_p(rio_remove1),
1820 return pci_register_driver(&rio_driver);
1826 pci_unregister_driver (&rio_driver);
1829 module_init (rio_init);
1830 module_exit (rio_exit);
1836 gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -c dl2k.c
1838 Read Documentation/networking/dl2k.txt for details.