1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/delay.h>
43 #include <linux/interrupt.h>
44 #include <linux/if_ether.h>
45 #include <linux/aer.h>
47 #include <linux/dca.h>
51 #define DRV_VERSION "1.2.45-k2"
52 char igb_driver_name[] = "igb";
53 char igb_driver_version[] = DRV_VERSION;
54 static const char igb_driver_string[] =
55 "Intel(R) Gigabit Ethernet Network Driver";
56 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
58 static const struct e1000_info *igb_info_tbl[] = {
59 [board_82575] = &e1000_82575_info,
62 static struct pci_device_id igb_pci_tbl[] = {
63 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
64 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
68 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
69 /* required last entry */
73 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
75 void igb_reset(struct igb_adapter *);
76 static int igb_setup_all_tx_resources(struct igb_adapter *);
77 static int igb_setup_all_rx_resources(struct igb_adapter *);
78 static void igb_free_all_tx_resources(struct igb_adapter *);
79 static void igb_free_all_rx_resources(struct igb_adapter *);
80 void igb_update_stats(struct igb_adapter *);
81 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
82 static void __devexit igb_remove(struct pci_dev *pdev);
83 static int igb_sw_init(struct igb_adapter *);
84 static int igb_open(struct net_device *);
85 static int igb_close(struct net_device *);
86 static void igb_configure_tx(struct igb_adapter *);
87 static void igb_configure_rx(struct igb_adapter *);
88 static void igb_setup_rctl(struct igb_adapter *);
89 static void igb_clean_all_tx_rings(struct igb_adapter *);
90 static void igb_clean_all_rx_rings(struct igb_adapter *);
91 static void igb_clean_tx_ring(struct igb_ring *);
92 static void igb_clean_rx_ring(struct igb_ring *);
93 static void igb_set_multi(struct net_device *);
94 static void igb_update_phy_info(unsigned long);
95 static void igb_watchdog(unsigned long);
96 static void igb_watchdog_task(struct work_struct *);
97 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
99 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
100 static struct net_device_stats *igb_get_stats(struct net_device *);
101 static int igb_change_mtu(struct net_device *, int);
102 static int igb_set_mac(struct net_device *, void *);
103 static irqreturn_t igb_intr(int irq, void *);
104 static irqreturn_t igb_intr_msi(int irq, void *);
105 static irqreturn_t igb_msix_other(int irq, void *);
106 static irqreturn_t igb_msix_rx(int irq, void *);
107 static irqreturn_t igb_msix_tx(int irq, void *);
108 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
109 #ifdef CONFIG_IGB_DCA
110 static void igb_update_rx_dca(struct igb_ring *);
111 static void igb_update_tx_dca(struct igb_ring *);
112 static void igb_setup_dca(struct igb_adapter *);
113 #endif /* CONFIG_IGB_DCA */
114 static bool igb_clean_tx_irq(struct igb_ring *);
115 static int igb_poll(struct napi_struct *, int);
116 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
117 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
118 #ifdef CONFIG_IGB_LRO
119 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
121 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
122 static void igb_tx_timeout(struct net_device *);
123 static void igb_reset_task(struct work_struct *);
124 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
125 static void igb_vlan_rx_add_vid(struct net_device *, u16);
126 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
127 static void igb_restore_vlan(struct igb_adapter *);
129 static int igb_suspend(struct pci_dev *, pm_message_t);
131 static int igb_resume(struct pci_dev *);
133 static void igb_shutdown(struct pci_dev *);
134 #ifdef CONFIG_IGB_DCA
135 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
136 static struct notifier_block dca_notifier = {
137 .notifier_call = igb_notify_dca,
143 #ifdef CONFIG_NET_POLL_CONTROLLER
144 /* for netdump / net console */
145 static void igb_netpoll(struct net_device *);
148 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
149 pci_channel_state_t);
150 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
151 static void igb_io_resume(struct pci_dev *);
153 static struct pci_error_handlers igb_err_handler = {
154 .error_detected = igb_io_error_detected,
155 .slot_reset = igb_io_slot_reset,
156 .resume = igb_io_resume,
160 static struct pci_driver igb_driver = {
161 .name = igb_driver_name,
162 .id_table = igb_pci_tbl,
164 .remove = __devexit_p(igb_remove),
166 /* Power Managment Hooks */
167 .suspend = igb_suspend,
168 .resume = igb_resume,
170 .shutdown = igb_shutdown,
171 .err_handler = &igb_err_handler
174 static int global_quad_port_a; /* global quad port a indication */
176 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
177 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
178 MODULE_LICENSE("GPL");
179 MODULE_VERSION(DRV_VERSION);
183 * igb_get_hw_dev_name - return device name string
184 * used by hardware layer to print debugging information
186 char *igb_get_hw_dev_name(struct e1000_hw *hw)
188 struct igb_adapter *adapter = hw->back;
189 return adapter->netdev->name;
194 * igb_init_module - Driver Registration Routine
196 * igb_init_module is the first routine called when the driver is
197 * loaded. All it does is register with the PCI subsystem.
199 static int __init igb_init_module(void)
202 printk(KERN_INFO "%s - version %s\n",
203 igb_driver_string, igb_driver_version);
205 printk(KERN_INFO "%s\n", igb_copyright);
207 global_quad_port_a = 0;
209 ret = pci_register_driver(&igb_driver);
210 #ifdef CONFIG_IGB_DCA
211 dca_register_notify(&dca_notifier);
216 module_init(igb_init_module);
219 * igb_exit_module - Driver Exit Cleanup Routine
221 * igb_exit_module is called just before the driver is removed
224 static void __exit igb_exit_module(void)
226 #ifdef CONFIG_IGB_DCA
227 dca_unregister_notify(&dca_notifier);
229 pci_unregister_driver(&igb_driver);
232 module_exit(igb_exit_module);
235 * igb_alloc_queues - Allocate memory for all rings
236 * @adapter: board private structure to initialize
238 * We allocate one ring per queue at run-time since we don't know the
239 * number of queues at compile-time.
241 static int igb_alloc_queues(struct igb_adapter *adapter)
245 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
246 sizeof(struct igb_ring), GFP_KERNEL);
247 if (!adapter->tx_ring)
250 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
251 sizeof(struct igb_ring), GFP_KERNEL);
252 if (!adapter->rx_ring) {
253 kfree(adapter->tx_ring);
257 adapter->rx_ring->buddy = adapter->tx_ring;
259 for (i = 0; i < adapter->num_tx_queues; i++) {
260 struct igb_ring *ring = &(adapter->tx_ring[i]);
261 ring->count = adapter->tx_ring_count;
262 ring->adapter = adapter;
263 ring->queue_index = i;
265 for (i = 0; i < adapter->num_rx_queues; i++) {
266 struct igb_ring *ring = &(adapter->rx_ring[i]);
267 ring->count = adapter->rx_ring_count;
268 ring->adapter = adapter;
269 ring->queue_index = i;
270 ring->itr_register = E1000_ITR;
272 /* set a default napi handler for each rx_ring */
273 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
278 static void igb_free_queues(struct igb_adapter *adapter)
282 for (i = 0; i < adapter->num_rx_queues; i++)
283 netif_napi_del(&adapter->rx_ring[i].napi);
285 kfree(adapter->tx_ring);
286 kfree(adapter->rx_ring);
289 #define IGB_N0_QUEUE -1
290 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
291 int tx_queue, int msix_vector)
294 struct e1000_hw *hw = &adapter->hw;
297 switch (hw->mac.type) {
299 /* The 82575 assigns vectors using a bitmask, which matches the
300 bitmask for the EICR/EIMS/EIMC registers. To assign one
301 or more queues to a vector, we write the appropriate bits
302 into the MSIXBM register for that vector. */
303 if (rx_queue > IGB_N0_QUEUE) {
304 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
305 adapter->rx_ring[rx_queue].eims_value = msixbm;
307 if (tx_queue > IGB_N0_QUEUE) {
308 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
309 adapter->tx_ring[tx_queue].eims_value =
310 E1000_EICR_TX_QUEUE0 << tx_queue;
312 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
315 /* The 82576 uses a table-based method for assigning vectors.
316 Each queue has a single entry in the table to which we write
317 a vector number along with a "valid" bit. Sadly, the layout
318 of the table is somewhat counterintuitive. */
319 if (rx_queue > IGB_N0_QUEUE) {
320 index = (rx_queue & 0x7);
321 ivar = array_rd32(E1000_IVAR0, index);
323 /* vector goes into low byte of register */
324 ivar = ivar & 0xFFFFFF00;
325 ivar |= msix_vector | E1000_IVAR_VALID;
327 /* vector goes into third byte of register */
328 ivar = ivar & 0xFF00FFFF;
329 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
331 adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
332 array_wr32(E1000_IVAR0, index, ivar);
334 if (tx_queue > IGB_N0_QUEUE) {
335 index = (tx_queue & 0x7);
336 ivar = array_rd32(E1000_IVAR0, index);
338 /* vector goes into second byte of register */
339 ivar = ivar & 0xFFFF00FF;
340 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
342 /* vector goes into high byte of register */
343 ivar = ivar & 0x00FFFFFF;
344 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
346 adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
347 array_wr32(E1000_IVAR0, index, ivar);
357 * igb_configure_msix - Configure MSI-X hardware
359 * igb_configure_msix sets up the hardware to properly
360 * generate MSI-X interrupts.
362 static void igb_configure_msix(struct igb_adapter *adapter)
366 struct e1000_hw *hw = &adapter->hw;
368 adapter->eims_enable_mask = 0;
369 if (hw->mac.type == e1000_82576)
370 /* Turn on MSI-X capability first, or our settings
371 * won't stick. And it will take days to debug. */
372 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
373 E1000_GPIE_PBA | E1000_GPIE_EIAME |
376 for (i = 0; i < adapter->num_tx_queues; i++) {
377 struct igb_ring *tx_ring = &adapter->tx_ring[i];
378 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
379 adapter->eims_enable_mask |= tx_ring->eims_value;
380 if (tx_ring->itr_val)
381 writel(tx_ring->itr_val,
382 hw->hw_addr + tx_ring->itr_register);
384 writel(1, hw->hw_addr + tx_ring->itr_register);
387 for (i = 0; i < adapter->num_rx_queues; i++) {
388 struct igb_ring *rx_ring = &adapter->rx_ring[i];
389 rx_ring->buddy = NULL;
390 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
391 adapter->eims_enable_mask |= rx_ring->eims_value;
392 if (rx_ring->itr_val)
393 writel(rx_ring->itr_val,
394 hw->hw_addr + rx_ring->itr_register);
396 writel(1, hw->hw_addr + rx_ring->itr_register);
400 /* set vector for other causes, i.e. link changes */
401 switch (hw->mac.type) {
403 array_wr32(E1000_MSIXBM(0), vector++,
406 tmp = rd32(E1000_CTRL_EXT);
407 /* enable MSI-X PBA support*/
408 tmp |= E1000_CTRL_EXT_PBA_CLR;
410 /* Auto-Mask interrupts upon ICR read. */
411 tmp |= E1000_CTRL_EXT_EIAME;
412 tmp |= E1000_CTRL_EXT_IRCA;
414 wr32(E1000_CTRL_EXT, tmp);
415 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
416 adapter->eims_other = E1000_EIMS_OTHER;
421 tmp = (vector++ | E1000_IVAR_VALID) << 8;
422 wr32(E1000_IVAR_MISC, tmp);
424 adapter->eims_enable_mask = (1 << (vector)) - 1;
425 adapter->eims_other = 1 << (vector - 1);
428 /* do nothing, since nothing else supports MSI-X */
430 } /* switch (hw->mac.type) */
435 * igb_request_msix - Initialize MSI-X interrupts
437 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
440 static int igb_request_msix(struct igb_adapter *adapter)
442 struct net_device *netdev = adapter->netdev;
443 int i, err = 0, vector = 0;
447 for (i = 0; i < adapter->num_tx_queues; i++) {
448 struct igb_ring *ring = &(adapter->tx_ring[i]);
449 sprintf(ring->name, "%s-tx-%d", netdev->name, i);
450 err = request_irq(adapter->msix_entries[vector].vector,
451 &igb_msix_tx, 0, ring->name,
452 &(adapter->tx_ring[i]));
455 ring->itr_register = E1000_EITR(0) + (vector << 2);
456 ring->itr_val = 976; /* ~4000 ints/sec */
459 for (i = 0; i < adapter->num_rx_queues; i++) {
460 struct igb_ring *ring = &(adapter->rx_ring[i]);
461 if (strlen(netdev->name) < (IFNAMSIZ - 5))
462 sprintf(ring->name, "%s-rx-%d", netdev->name, i);
464 memcpy(ring->name, netdev->name, IFNAMSIZ);
465 err = request_irq(adapter->msix_entries[vector].vector,
466 &igb_msix_rx, 0, ring->name,
467 &(adapter->rx_ring[i]));
470 ring->itr_register = E1000_EITR(0) + (vector << 2);
471 ring->itr_val = adapter->itr;
472 /* overwrite the poll routine for MSIX, we've already done
474 ring->napi.poll = &igb_clean_rx_ring_msix;
478 err = request_irq(adapter->msix_entries[vector].vector,
479 &igb_msix_other, 0, netdev->name, netdev);
483 igb_configure_msix(adapter);
489 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
491 if (adapter->msix_entries) {
492 pci_disable_msix(adapter->pdev);
493 kfree(adapter->msix_entries);
494 adapter->msix_entries = NULL;
495 } else if (adapter->flags & IGB_FLAG_HAS_MSI)
496 pci_disable_msi(adapter->pdev);
502 * igb_set_interrupt_capability - set MSI or MSI-X if supported
504 * Attempt to configure interrupts using the best available
505 * capabilities of the hardware and kernel.
507 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
512 numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
513 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
515 if (!adapter->msix_entries)
518 for (i = 0; i < numvecs; i++)
519 adapter->msix_entries[i].entry = i;
521 err = pci_enable_msix(adapter->pdev,
522 adapter->msix_entries,
527 igb_reset_interrupt_capability(adapter);
529 /* If we can't do MSI-X, try MSI */
531 adapter->num_rx_queues = 1;
532 adapter->num_tx_queues = 1;
533 if (!pci_enable_msi(adapter->pdev))
534 adapter->flags |= IGB_FLAG_HAS_MSI;
536 /* Notify the stack of the (possibly) reduced Tx Queue count. */
537 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
542 * igb_request_irq - initialize interrupts
544 * Attempts to configure interrupts using the best available
545 * capabilities of the hardware and kernel.
547 static int igb_request_irq(struct igb_adapter *adapter)
549 struct net_device *netdev = adapter->netdev;
550 struct e1000_hw *hw = &adapter->hw;
553 if (adapter->msix_entries) {
554 err = igb_request_msix(adapter);
557 /* fall back to MSI */
558 igb_reset_interrupt_capability(adapter);
559 if (!pci_enable_msi(adapter->pdev))
560 adapter->flags |= IGB_FLAG_HAS_MSI;
561 igb_free_all_tx_resources(adapter);
562 igb_free_all_rx_resources(adapter);
563 adapter->num_rx_queues = 1;
564 igb_alloc_queues(adapter);
566 switch (hw->mac.type) {
568 wr32(E1000_MSIXBM(0),
569 (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
572 wr32(E1000_IVAR0, E1000_IVAR_VALID);
579 if (adapter->flags & IGB_FLAG_HAS_MSI) {
580 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
581 netdev->name, netdev);
584 /* fall back to legacy interrupts */
585 igb_reset_interrupt_capability(adapter);
586 adapter->flags &= ~IGB_FLAG_HAS_MSI;
589 err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
590 netdev->name, netdev);
593 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
600 static void igb_free_irq(struct igb_adapter *adapter)
602 struct net_device *netdev = adapter->netdev;
604 if (adapter->msix_entries) {
607 for (i = 0; i < adapter->num_tx_queues; i++)
608 free_irq(adapter->msix_entries[vector++].vector,
609 &(adapter->tx_ring[i]));
610 for (i = 0; i < adapter->num_rx_queues; i++)
611 free_irq(adapter->msix_entries[vector++].vector,
612 &(adapter->rx_ring[i]));
614 free_irq(adapter->msix_entries[vector++].vector, netdev);
618 free_irq(adapter->pdev->irq, netdev);
622 * igb_irq_disable - Mask off interrupt generation on the NIC
623 * @adapter: board private structure
625 static void igb_irq_disable(struct igb_adapter *adapter)
627 struct e1000_hw *hw = &adapter->hw;
629 if (adapter->msix_entries) {
631 wr32(E1000_EIMC, ~0);
638 synchronize_irq(adapter->pdev->irq);
642 * igb_irq_enable - Enable default interrupt generation settings
643 * @adapter: board private structure
645 static void igb_irq_enable(struct igb_adapter *adapter)
647 struct e1000_hw *hw = &adapter->hw;
649 if (adapter->msix_entries) {
650 wr32(E1000_EIAC, adapter->eims_enable_mask);
651 wr32(E1000_EIAM, adapter->eims_enable_mask);
652 wr32(E1000_EIMS, adapter->eims_enable_mask);
653 wr32(E1000_IMS, E1000_IMS_LSC);
655 wr32(E1000_IMS, IMS_ENABLE_MASK);
656 wr32(E1000_IAM, IMS_ENABLE_MASK);
660 static void igb_update_mng_vlan(struct igb_adapter *adapter)
662 struct net_device *netdev = adapter->netdev;
663 u16 vid = adapter->hw.mng_cookie.vlan_id;
664 u16 old_vid = adapter->mng_vlan_id;
665 if (adapter->vlgrp) {
666 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
667 if (adapter->hw.mng_cookie.status &
668 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
669 igb_vlan_rx_add_vid(netdev, vid);
670 adapter->mng_vlan_id = vid;
672 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
674 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
676 !vlan_group_get_device(adapter->vlgrp, old_vid))
677 igb_vlan_rx_kill_vid(netdev, old_vid);
679 adapter->mng_vlan_id = vid;
684 * igb_release_hw_control - release control of the h/w to f/w
685 * @adapter: address of board private structure
687 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
688 * For ASF and Pass Through versions of f/w this means that the
689 * driver is no longer loaded.
692 static void igb_release_hw_control(struct igb_adapter *adapter)
694 struct e1000_hw *hw = &adapter->hw;
697 /* Let firmware take over control of h/w */
698 ctrl_ext = rd32(E1000_CTRL_EXT);
700 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
705 * igb_get_hw_control - get control of the h/w from f/w
706 * @adapter: address of board private structure
708 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
709 * For ASF and Pass Through versions of f/w this means that
710 * the driver is loaded.
713 static void igb_get_hw_control(struct igb_adapter *adapter)
715 struct e1000_hw *hw = &adapter->hw;
718 /* Let firmware know the driver has taken over */
719 ctrl_ext = rd32(E1000_CTRL_EXT);
721 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
725 * igb_configure - configure the hardware for RX and TX
726 * @adapter: private board structure
728 static void igb_configure(struct igb_adapter *adapter)
730 struct net_device *netdev = adapter->netdev;
733 igb_get_hw_control(adapter);
734 igb_set_multi(netdev);
736 igb_restore_vlan(adapter);
738 igb_configure_tx(adapter);
739 igb_setup_rctl(adapter);
740 igb_configure_rx(adapter);
742 igb_rx_fifo_flush_82575(&adapter->hw);
744 /* call IGB_DESC_UNUSED which always leaves
745 * at least 1 descriptor unused to make sure
746 * next_to_use != next_to_clean */
747 for (i = 0; i < adapter->num_rx_queues; i++) {
748 struct igb_ring *ring = &adapter->rx_ring[i];
749 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
753 adapter->tx_queue_len = netdev->tx_queue_len;
758 * igb_up - Open the interface and prepare it to handle traffic
759 * @adapter: board private structure
762 int igb_up(struct igb_adapter *adapter)
764 struct e1000_hw *hw = &adapter->hw;
767 /* hardware has been reset, we need to reload some things */
768 igb_configure(adapter);
770 clear_bit(__IGB_DOWN, &adapter->state);
772 for (i = 0; i < adapter->num_rx_queues; i++)
773 napi_enable(&adapter->rx_ring[i].napi);
774 if (adapter->msix_entries)
775 igb_configure_msix(adapter);
777 /* Clear any pending interrupts. */
779 igb_irq_enable(adapter);
781 /* Fire a link change interrupt to start the watchdog. */
782 wr32(E1000_ICS, E1000_ICS_LSC);
786 void igb_down(struct igb_adapter *adapter)
788 struct e1000_hw *hw = &adapter->hw;
789 struct net_device *netdev = adapter->netdev;
793 /* signal that we're down so the interrupt handler does not
794 * reschedule our watchdog timer */
795 set_bit(__IGB_DOWN, &adapter->state);
797 /* disable receives in the hardware */
798 rctl = rd32(E1000_RCTL);
799 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
800 /* flush and sleep below */
802 netif_tx_stop_all_queues(netdev);
804 /* disable transmits in the hardware */
805 tctl = rd32(E1000_TCTL);
806 tctl &= ~E1000_TCTL_EN;
807 wr32(E1000_TCTL, tctl);
808 /* flush both disables and wait for them to finish */
812 for (i = 0; i < adapter->num_rx_queues; i++)
813 napi_disable(&adapter->rx_ring[i].napi);
815 igb_irq_disable(adapter);
817 del_timer_sync(&adapter->watchdog_timer);
818 del_timer_sync(&adapter->phy_info_timer);
820 netdev->tx_queue_len = adapter->tx_queue_len;
821 netif_carrier_off(netdev);
822 adapter->link_speed = 0;
823 adapter->link_duplex = 0;
825 if (!pci_channel_offline(adapter->pdev))
827 igb_clean_all_tx_rings(adapter);
828 igb_clean_all_rx_rings(adapter);
831 void igb_reinit_locked(struct igb_adapter *adapter)
833 WARN_ON(in_interrupt());
834 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
838 clear_bit(__IGB_RESETTING, &adapter->state);
841 void igb_reset(struct igb_adapter *adapter)
843 struct e1000_hw *hw = &adapter->hw;
844 struct e1000_mac_info *mac = &hw->mac;
845 struct e1000_fc_info *fc = &hw->fc;
846 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
849 /* Repartition Pba for greater than 9k mtu
850 * To take effect CTRL.RST is required.
852 if (mac->type != e1000_82576) {
859 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
860 (mac->type < e1000_82576)) {
861 /* adjust PBA for jumbo frames */
862 wr32(E1000_PBA, pba);
864 /* To maintain wire speed transmits, the Tx FIFO should be
865 * large enough to accommodate two full transmit packets,
866 * rounded up to the next 1KB and expressed in KB. Likewise,
867 * the Rx FIFO should be large enough to accommodate at least
868 * one full receive packet and is similarly rounded up and
869 * expressed in KB. */
870 pba = rd32(E1000_PBA);
871 /* upper 16 bits has Tx packet buffer allocation size in KB */
872 tx_space = pba >> 16;
873 /* lower 16 bits has Rx packet buffer allocation size in KB */
875 /* the tx fifo also stores 16 bytes of information about the tx
876 * but don't include ethernet FCS because hardware appends it */
877 min_tx_space = (adapter->max_frame_size +
878 sizeof(struct e1000_tx_desc) -
880 min_tx_space = ALIGN(min_tx_space, 1024);
882 /* software strips receive CRC, so leave room for it */
883 min_rx_space = adapter->max_frame_size;
884 min_rx_space = ALIGN(min_rx_space, 1024);
887 /* If current Tx allocation is less than the min Tx FIFO size,
888 * and the min Tx FIFO size is less than the current Rx FIFO
889 * allocation, take space away from current Rx allocation */
890 if (tx_space < min_tx_space &&
891 ((min_tx_space - tx_space) < pba)) {
892 pba = pba - (min_tx_space - tx_space);
894 /* if short on rx space, rx wins and must trump tx
896 if (pba < min_rx_space)
899 wr32(E1000_PBA, pba);
902 /* flow control settings */
903 /* The high water mark must be low enough to fit one full frame
904 * (or the size used for early receive) above it in the Rx FIFO.
905 * Set it to the lower of:
906 * - 90% of the Rx FIFO size, or
907 * - the full Rx FIFO size minus one full frame */
908 hwm = min(((pba << 10) * 9 / 10),
909 ((pba << 10) - 2 * adapter->max_frame_size));
911 if (mac->type < e1000_82576) {
912 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
913 fc->low_water = fc->high_water - 8;
915 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
916 fc->low_water = fc->high_water - 16;
918 fc->pause_time = 0xFFFF;
920 fc->type = fc->original_type;
922 /* Allow time for pending master requests to run */
923 adapter->hw.mac.ops.reset_hw(&adapter->hw);
926 if (adapter->hw.mac.ops.init_hw(&adapter->hw))
927 dev_err(&adapter->pdev->dev, "Hardware Error\n");
929 igb_update_mng_vlan(adapter);
931 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
932 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
934 igb_reset_adaptive(&adapter->hw);
935 igb_get_phy_info(&adapter->hw);
939 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
940 * @pdev: PCI device information struct
942 * Returns true if an adapter needs ioport resources
944 static int igb_is_need_ioport(struct pci_dev *pdev)
946 switch (pdev->device) {
947 /* Currently there are no adapters that need ioport resources */
953 static const struct net_device_ops igb_netdev_ops = {
954 .ndo_open = igb_open,
955 .ndo_stop = igb_close,
956 .ndo_start_xmit = igb_xmit_frame_adv,
957 .ndo_get_stats = igb_get_stats,
958 .ndo_set_multicast_list = igb_set_multi,
959 .ndo_set_mac_address = igb_set_mac,
960 .ndo_change_mtu = igb_change_mtu,
961 .ndo_do_ioctl = igb_ioctl,
962 .ndo_tx_timeout = igb_tx_timeout,
963 .ndo_validate_addr = eth_validate_addr,
964 .ndo_vlan_rx_register = igb_vlan_rx_register,
965 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
966 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
967 #ifdef CONFIG_NET_POLL_CONTROLLER
968 .ndo_poll_controller = igb_netpoll,
973 * igb_probe - Device Initialization Routine
974 * @pdev: PCI device information struct
975 * @ent: entry in igb_pci_tbl
977 * Returns 0 on success, negative on failure
979 * igb_probe initializes an adapter identified by a pci_dev structure.
980 * The OS initialization, configuring of the adapter private structure,
981 * and a hardware reset occur.
983 static int __devinit igb_probe(struct pci_dev *pdev,
984 const struct pci_device_id *ent)
986 struct net_device *netdev;
987 struct igb_adapter *adapter;
989 struct pci_dev *us_dev;
990 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
991 unsigned long mmio_start, mmio_len;
992 int i, err, pci_using_dac, pos;
993 u16 eeprom_data = 0, state = 0;
994 u16 eeprom_apme_mask = IGB_EEPROM_APME;
996 int bars, need_ioport;
998 /* do not allocate ioport bars when not needed */
999 need_ioport = igb_is_need_ioport(pdev);
1001 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1002 err = pci_enable_device(pdev);
1004 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1005 err = pci_enable_device_mem(pdev);
1011 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1013 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1017 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1019 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1021 dev_err(&pdev->dev, "No usable DMA "
1022 "configuration, aborting\n");
1028 /* 82575 requires that the pci-e link partner disable the L0s state */
1029 switch (pdev->device) {
1030 case E1000_DEV_ID_82575EB_COPPER:
1031 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1032 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1033 us_dev = pdev->bus->self;
1034 pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
1036 pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1038 state &= ~PCIE_LINK_STATE_L0S;
1039 pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1041 dev_info(&pdev->dev,
1042 "Disabling ASPM L0s upstream switch port %s\n",
1049 err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1053 err = pci_enable_pcie_error_reporting(pdev);
1055 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
1057 /* non-fatal, continue */
1060 pci_set_master(pdev);
1061 pci_save_state(pdev);
1064 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1066 goto err_alloc_etherdev;
1068 SET_NETDEV_DEV(netdev, &pdev->dev);
1070 pci_set_drvdata(pdev, netdev);
1071 adapter = netdev_priv(netdev);
1072 adapter->netdev = netdev;
1073 adapter->pdev = pdev;
1076 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1077 adapter->bars = bars;
1078 adapter->need_ioport = need_ioport;
1080 mmio_start = pci_resource_start(pdev, 0);
1081 mmio_len = pci_resource_len(pdev, 0);
1084 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1085 if (!adapter->hw.hw_addr)
1088 netdev->netdev_ops = &igb_netdev_ops;
1089 igb_set_ethtool_ops(netdev);
1090 netdev->watchdog_timeo = 5 * HZ;
1092 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1094 netdev->mem_start = mmio_start;
1095 netdev->mem_end = mmio_start + mmio_len;
1097 /* PCI config space info */
1098 hw->vendor_id = pdev->vendor;
1099 hw->device_id = pdev->device;
1100 hw->revision_id = pdev->revision;
1101 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1102 hw->subsystem_device_id = pdev->subsystem_device;
1104 /* setup the private structure */
1106 /* Copy the default MAC, PHY and NVM function pointers */
1107 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1108 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1109 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1110 /* Initialize skew-specific constants */
1111 err = ei->get_invariants(hw);
1115 err = igb_sw_init(adapter);
1119 igb_get_bus_info_pcie(hw);
1122 switch (hw->mac.type) {
1125 adapter->flags |= IGB_FLAG_HAS_DCA;
1126 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1132 hw->phy.autoneg_wait_to_complete = false;
1133 hw->mac.adaptive_ifs = true;
1135 /* Copper options */
1136 if (hw->phy.media_type == e1000_media_type_copper) {
1137 hw->phy.mdix = AUTO_ALL_MODES;
1138 hw->phy.disable_polarity_correction = false;
1139 hw->phy.ms_type = e1000_ms_hw_default;
1142 if (igb_check_reset_block(hw))
1143 dev_info(&pdev->dev,
1144 "PHY reset is blocked due to SOL/IDER session.\n");
1146 netdev->features = NETIF_F_SG |
1148 NETIF_F_HW_VLAN_TX |
1149 NETIF_F_HW_VLAN_RX |
1150 NETIF_F_HW_VLAN_FILTER;
1152 netdev->features |= NETIF_F_TSO;
1153 netdev->features |= NETIF_F_TSO6;
1155 #ifdef CONFIG_IGB_LRO
1156 netdev->features |= NETIF_F_LRO;
1159 netdev->vlan_features |= NETIF_F_TSO;
1160 netdev->vlan_features |= NETIF_F_TSO6;
1161 netdev->vlan_features |= NETIF_F_HW_CSUM;
1162 netdev->vlan_features |= NETIF_F_SG;
1165 netdev->features |= NETIF_F_HIGHDMA;
1167 netdev->features |= NETIF_F_LLTX;
1168 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1170 /* before reading the NVM, reset the controller to put the device in a
1171 * known good starting state */
1172 hw->mac.ops.reset_hw(hw);
1174 /* make sure the NVM is good */
1175 if (igb_validate_nvm_checksum(hw) < 0) {
1176 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1181 /* copy the MAC address out of the NVM */
1182 if (hw->mac.ops.read_mac_addr(hw))
1183 dev_err(&pdev->dev, "NVM Read Error\n");
1185 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1186 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1188 if (!is_valid_ether_addr(netdev->perm_addr)) {
1189 dev_err(&pdev->dev, "Invalid MAC Address\n");
1194 init_timer(&adapter->watchdog_timer);
1195 adapter->watchdog_timer.function = &igb_watchdog;
1196 adapter->watchdog_timer.data = (unsigned long) adapter;
1198 init_timer(&adapter->phy_info_timer);
1199 adapter->phy_info_timer.function = &igb_update_phy_info;
1200 adapter->phy_info_timer.data = (unsigned long) adapter;
1202 INIT_WORK(&adapter->reset_task, igb_reset_task);
1203 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1205 /* Initialize link & ring properties that are user-changeable */
1206 adapter->tx_ring->count = 256;
1207 for (i = 0; i < adapter->num_tx_queues; i++)
1208 adapter->tx_ring[i].count = adapter->tx_ring->count;
1209 adapter->rx_ring->count = 256;
1210 for (i = 0; i < adapter->num_rx_queues; i++)
1211 adapter->rx_ring[i].count = adapter->rx_ring->count;
1213 adapter->fc_autoneg = true;
1214 hw->mac.autoneg = true;
1215 hw->phy.autoneg_advertised = 0x2f;
1217 hw->fc.original_type = e1000_fc_default;
1218 hw->fc.type = e1000_fc_default;
1220 adapter->itr_setting = 3;
1221 adapter->itr = IGB_START_ITR;
1223 igb_validate_mdi_setting(hw);
1225 adapter->rx_csum = 1;
1227 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1228 * enable the ACPI Magic Packet filter
1231 if (hw->bus.func == 0 ||
1232 hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1233 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1236 if (eeprom_data & eeprom_apme_mask)
1237 adapter->eeprom_wol |= E1000_WUFC_MAG;
1239 /* now that we have the eeprom settings, apply the special cases where
1240 * the eeprom may be wrong or the board simply won't support wake on
1241 * lan on a particular port */
1242 switch (pdev->device) {
1243 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1244 adapter->eeprom_wol = 0;
1246 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1247 case E1000_DEV_ID_82576_FIBER:
1248 case E1000_DEV_ID_82576_SERDES:
1249 /* Wake events only supported on port A for dual fiber
1250 * regardless of eeprom setting */
1251 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1252 adapter->eeprom_wol = 0;
1256 /* initialize the wol settings based on the eeprom settings */
1257 adapter->wol = adapter->eeprom_wol;
1258 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1260 /* reset the hardware with the new settings */
1263 /* let the f/w know that the h/w is now under the control of the
1265 igb_get_hw_control(adapter);
1267 /* tell the stack to leave us alone until igb_open() is called */
1268 netif_carrier_off(netdev);
1269 netif_tx_stop_all_queues(netdev);
1271 strcpy(netdev->name, "eth%d");
1272 err = register_netdev(netdev);
1276 #ifdef CONFIG_IGB_DCA
1277 if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1278 (dca_add_requester(&pdev->dev) == 0)) {
1279 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1280 dev_info(&pdev->dev, "DCA enabled\n");
1281 /* Always use CB2 mode, difference is masked
1282 * in the CB driver. */
1283 wr32(E1000_DCA_CTRL, 2);
1284 igb_setup_dca(adapter);
1288 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1289 /* print bus type/speed/width info */
1290 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
1292 ((hw->bus.speed == e1000_bus_speed_2500)
1293 ? "2.5Gb/s" : "unknown"),
1294 ((hw->bus.width == e1000_bus_width_pcie_x4)
1295 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1296 ? "Width x1" : "unknown"),
1299 igb_read_part_num(hw, &part_num);
1300 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1301 (part_num >> 8), (part_num & 0xff));
1303 dev_info(&pdev->dev,
1304 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1305 adapter->msix_entries ? "MSI-X" :
1306 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1307 adapter->num_rx_queues, adapter->num_tx_queues);
1312 igb_release_hw_control(adapter);
1314 if (!igb_check_reset_block(hw))
1317 if (hw->flash_address)
1318 iounmap(hw->flash_address);
1320 igb_remove_device(hw);
1321 igb_free_queues(adapter);
1324 iounmap(hw->hw_addr);
1326 free_netdev(netdev);
1328 pci_release_selected_regions(pdev, bars);
1331 pci_disable_device(pdev);
1336 * igb_remove - Device Removal Routine
1337 * @pdev: PCI device information struct
1339 * igb_remove is called by the PCI subsystem to alert the driver
1340 * that it should release a PCI device. The could be caused by a
1341 * Hot-Plug event, or because the driver is going to be removed from
1344 static void __devexit igb_remove(struct pci_dev *pdev)
1346 struct net_device *netdev = pci_get_drvdata(pdev);
1347 struct igb_adapter *adapter = netdev_priv(netdev);
1348 #ifdef CONFIG_IGB_DCA
1349 struct e1000_hw *hw = &adapter->hw;
1353 /* flush_scheduled work may reschedule our watchdog task, so
1354 * explicitly disable watchdog tasks from being rescheduled */
1355 set_bit(__IGB_DOWN, &adapter->state);
1356 del_timer_sync(&adapter->watchdog_timer);
1357 del_timer_sync(&adapter->phy_info_timer);
1359 flush_scheduled_work();
1361 #ifdef CONFIG_IGB_DCA
1362 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1363 dev_info(&pdev->dev, "DCA disabled\n");
1364 dca_remove_requester(&pdev->dev);
1365 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1366 wr32(E1000_DCA_CTRL, 1);
1370 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1371 * would have already happened in close and is redundant. */
1372 igb_release_hw_control(adapter);
1374 unregister_netdev(netdev);
1376 if (!igb_check_reset_block(&adapter->hw))
1377 igb_reset_phy(&adapter->hw);
1379 igb_remove_device(&adapter->hw);
1380 igb_reset_interrupt_capability(adapter);
1382 igb_free_queues(adapter);
1384 iounmap(adapter->hw.hw_addr);
1385 if (adapter->hw.flash_address)
1386 iounmap(adapter->hw.flash_address);
1387 pci_release_selected_regions(pdev, adapter->bars);
1389 free_netdev(netdev);
1391 err = pci_disable_pcie_error_reporting(pdev);
1394 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
1396 pci_disable_device(pdev);
1400 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1401 * @adapter: board private structure to initialize
1403 * igb_sw_init initializes the Adapter private data structure.
1404 * Fields are initialized based on PCI device information and
1405 * OS network device settings (MTU size).
1407 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1409 struct e1000_hw *hw = &adapter->hw;
1410 struct net_device *netdev = adapter->netdev;
1411 struct pci_dev *pdev = adapter->pdev;
1413 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1415 adapter->tx_ring_count = IGB_DEFAULT_TXD;
1416 adapter->rx_ring_count = IGB_DEFAULT_RXD;
1417 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1418 adapter->rx_ps_hdr_size = 0; /* disable packet split */
1419 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1420 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1422 /* Number of supported queues. */
1423 /* Having more queues than CPUs doesn't make sense. */
1424 adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1425 adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1427 /* This call may decrease the number of queues depending on
1428 * interrupt mode. */
1429 igb_set_interrupt_capability(adapter);
1431 if (igb_alloc_queues(adapter)) {
1432 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1436 /* Explicitly disable IRQ since the NIC can be in any state. */
1437 igb_irq_disable(adapter);
1439 set_bit(__IGB_DOWN, &adapter->state);
1444 * igb_open - Called when a network interface is made active
1445 * @netdev: network interface device structure
1447 * Returns 0 on success, negative value on failure
1449 * The open entry point is called when a network interface is made
1450 * active by the system (IFF_UP). At this point all resources needed
1451 * for transmit and receive operations are allocated, the interrupt
1452 * handler is registered with the OS, the watchdog timer is started,
1453 * and the stack is notified that the interface is ready.
1455 static int igb_open(struct net_device *netdev)
1457 struct igb_adapter *adapter = netdev_priv(netdev);
1458 struct e1000_hw *hw = &adapter->hw;
1462 /* disallow open during test */
1463 if (test_bit(__IGB_TESTING, &adapter->state))
1466 /* allocate transmit descriptors */
1467 err = igb_setup_all_tx_resources(adapter);
1471 /* allocate receive descriptors */
1472 err = igb_setup_all_rx_resources(adapter);
1476 /* e1000_power_up_phy(adapter); */
1478 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1479 if ((adapter->hw.mng_cookie.status &
1480 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1481 igb_update_mng_vlan(adapter);
1483 /* before we allocate an interrupt, we must be ready to handle it.
1484 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1485 * as soon as we call pci_request_irq, so we have to setup our
1486 * clean_rx handler before we do so. */
1487 igb_configure(adapter);
1489 err = igb_request_irq(adapter);
1493 /* From here on the code is the same as igb_up() */
1494 clear_bit(__IGB_DOWN, &adapter->state);
1496 for (i = 0; i < adapter->num_rx_queues; i++)
1497 napi_enable(&adapter->rx_ring[i].napi);
1499 /* Clear any pending interrupts. */
1502 igb_irq_enable(adapter);
1504 netif_tx_start_all_queues(netdev);
1506 /* Fire a link status change interrupt to start the watchdog. */
1507 wr32(E1000_ICS, E1000_ICS_LSC);
1512 igb_release_hw_control(adapter);
1513 /* e1000_power_down_phy(adapter); */
1514 igb_free_all_rx_resources(adapter);
1516 igb_free_all_tx_resources(adapter);
1524 * igb_close - Disables a network interface
1525 * @netdev: network interface device structure
1527 * Returns 0, this is not allowed to fail
1529 * The close entry point is called when an interface is de-activated
1530 * by the OS. The hardware is still under the driver's control, but
1531 * needs to be disabled. A global MAC reset is issued to stop the
1532 * hardware, and all transmit and receive resources are freed.
1534 static int igb_close(struct net_device *netdev)
1536 struct igb_adapter *adapter = netdev_priv(netdev);
1538 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1541 igb_free_irq(adapter);
1543 igb_free_all_tx_resources(adapter);
1544 igb_free_all_rx_resources(adapter);
1546 /* kill manageability vlan ID if supported, but not if a vlan with
1547 * the same ID is registered on the host OS (let 8021q kill it) */
1548 if ((adapter->hw.mng_cookie.status &
1549 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1551 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1552 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1558 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1559 * @adapter: board private structure
1560 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1562 * Return 0 on success, negative on failure
1565 int igb_setup_tx_resources(struct igb_adapter *adapter,
1566 struct igb_ring *tx_ring)
1568 struct pci_dev *pdev = adapter->pdev;
1571 size = sizeof(struct igb_buffer) * tx_ring->count;
1572 tx_ring->buffer_info = vmalloc(size);
1573 if (!tx_ring->buffer_info)
1575 memset(tx_ring->buffer_info, 0, size);
1577 /* round up to nearest 4K */
1578 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1579 tx_ring->size = ALIGN(tx_ring->size, 4096);
1581 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1587 tx_ring->adapter = adapter;
1588 tx_ring->next_to_use = 0;
1589 tx_ring->next_to_clean = 0;
1593 vfree(tx_ring->buffer_info);
1594 dev_err(&adapter->pdev->dev,
1595 "Unable to allocate memory for the transmit descriptor ring\n");
1600 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1601 * (Descriptors) for all queues
1602 * @adapter: board private structure
1604 * Return 0 on success, negative on failure
1606 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1611 for (i = 0; i < adapter->num_tx_queues; i++) {
1612 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1614 dev_err(&adapter->pdev->dev,
1615 "Allocation for Tx Queue %u failed\n", i);
1616 for (i--; i >= 0; i--)
1617 igb_free_tx_resources(&adapter->tx_ring[i]);
1622 for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1623 r_idx = i % adapter->num_tx_queues;
1624 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1630 * igb_configure_tx - Configure transmit Unit after Reset
1631 * @adapter: board private structure
1633 * Configure the Tx unit of the MAC after a reset.
1635 static void igb_configure_tx(struct igb_adapter *adapter)
1638 struct e1000_hw *hw = &adapter->hw;
1643 for (i = 0; i < adapter->num_tx_queues; i++) {
1644 struct igb_ring *ring = &(adapter->tx_ring[i]);
1646 wr32(E1000_TDLEN(i),
1647 ring->count * sizeof(struct e1000_tx_desc));
1649 wr32(E1000_TDBAL(i),
1650 tdba & 0x00000000ffffffffULL);
1651 wr32(E1000_TDBAH(i), tdba >> 32);
1653 ring->head = E1000_TDH(i);
1654 ring->tail = E1000_TDT(i);
1655 writel(0, hw->hw_addr + ring->tail);
1656 writel(0, hw->hw_addr + ring->head);
1657 txdctl = rd32(E1000_TXDCTL(i));
1658 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1659 wr32(E1000_TXDCTL(i), txdctl);
1661 /* Turn off Relaxed Ordering on head write-backs. The
1662 * writebacks MUST be delivered in order or it will
1663 * completely screw up our bookeeping.
1665 txctrl = rd32(E1000_DCA_TXCTRL(i));
1666 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1667 wr32(E1000_DCA_TXCTRL(i), txctrl);
1672 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1674 /* Program the Transmit Control Register */
1676 tctl = rd32(E1000_TCTL);
1677 tctl &= ~E1000_TCTL_CT;
1678 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1679 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1681 igb_config_collision_dist(hw);
1683 /* Setup Transmit Descriptor Settings for eop descriptor */
1684 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1686 /* Enable transmits */
1687 tctl |= E1000_TCTL_EN;
1689 wr32(E1000_TCTL, tctl);
1693 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1694 * @adapter: board private structure
1695 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1697 * Returns 0 on success, negative on failure
1700 int igb_setup_rx_resources(struct igb_adapter *adapter,
1701 struct igb_ring *rx_ring)
1703 struct pci_dev *pdev = adapter->pdev;
1706 #ifdef CONFIG_IGB_LRO
1707 size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1708 rx_ring->lro_mgr.lro_arr = vmalloc(size);
1709 if (!rx_ring->lro_mgr.lro_arr)
1711 memset(rx_ring->lro_mgr.lro_arr, 0, size);
1714 size = sizeof(struct igb_buffer) * rx_ring->count;
1715 rx_ring->buffer_info = vmalloc(size);
1716 if (!rx_ring->buffer_info)
1718 memset(rx_ring->buffer_info, 0, size);
1720 desc_len = sizeof(union e1000_adv_rx_desc);
1722 /* Round up to nearest 4K */
1723 rx_ring->size = rx_ring->count * desc_len;
1724 rx_ring->size = ALIGN(rx_ring->size, 4096);
1726 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1732 rx_ring->next_to_clean = 0;
1733 rx_ring->next_to_use = 0;
1735 rx_ring->adapter = adapter;
1740 #ifdef CONFIG_IGB_LRO
1741 vfree(rx_ring->lro_mgr.lro_arr);
1742 rx_ring->lro_mgr.lro_arr = NULL;
1744 vfree(rx_ring->buffer_info);
1745 dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1746 "the receive descriptor ring\n");
1751 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1752 * (Descriptors) for all queues
1753 * @adapter: board private structure
1755 * Return 0 on success, negative on failure
1757 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1761 for (i = 0; i < adapter->num_rx_queues; i++) {
1762 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1764 dev_err(&adapter->pdev->dev,
1765 "Allocation for Rx Queue %u failed\n", i);
1766 for (i--; i >= 0; i--)
1767 igb_free_rx_resources(&adapter->rx_ring[i]);
1776 * igb_setup_rctl - configure the receive control registers
1777 * @adapter: Board private structure
1779 static void igb_setup_rctl(struct igb_adapter *adapter)
1781 struct e1000_hw *hw = &adapter->hw;
1786 rctl = rd32(E1000_RCTL);
1788 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1789 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1791 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
1792 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1795 * enable stripping of CRC. It's unlikely this will break BMC
1796 * redirection as it did with e1000. Newer features require
1797 * that the HW strips the CRC.
1799 rctl |= E1000_RCTL_SECRC;
1802 * disable store bad packets, long packet enable, and clear size bits.
1804 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_LPE | E1000_RCTL_SZ_256);
1806 if (adapter->netdev->mtu > ETH_DATA_LEN)
1807 rctl |= E1000_RCTL_LPE;
1809 /* Setup buffer sizes */
1810 switch (adapter->rx_buffer_len) {
1811 case IGB_RXBUFFER_256:
1812 rctl |= E1000_RCTL_SZ_256;
1814 case IGB_RXBUFFER_512:
1815 rctl |= E1000_RCTL_SZ_512;
1818 srrctl = ALIGN(adapter->rx_buffer_len, 1024)
1819 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1823 /* 82575 and greater support packet-split where the protocol
1824 * header is placed in skb->data and the packet data is
1825 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1826 * In the case of a non-split, skb->data is linearly filled,
1827 * followed by the page buffers. Therefore, skb->data is
1828 * sized to hold the largest protocol header.
1830 /* allocations using alloc_page take too long for regular MTU
1831 * so only enable packet split for jumbo frames */
1832 if (rctl & E1000_RCTL_LPE) {
1833 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1834 srrctl |= adapter->rx_ps_hdr_size <<
1835 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1836 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1838 adapter->rx_ps_hdr_size = 0;
1839 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1842 for (i = 0; i < adapter->num_rx_queues; i++)
1843 wr32(E1000_SRRCTL(i), srrctl);
1845 wr32(E1000_RCTL, rctl);
1849 * igb_configure_rx - Configure receive Unit after Reset
1850 * @adapter: board private structure
1852 * Configure the Rx unit of the MAC after a reset.
1854 static void igb_configure_rx(struct igb_adapter *adapter)
1857 struct e1000_hw *hw = &adapter->hw;
1862 /* disable receives while setting up the descriptors */
1863 rctl = rd32(E1000_RCTL);
1864 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1868 if (adapter->itr_setting > 3)
1869 wr32(E1000_ITR, adapter->itr);
1871 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1872 * the Base and Length of the Rx Descriptor Ring */
1873 for (i = 0; i < adapter->num_rx_queues; i++) {
1874 struct igb_ring *ring = &(adapter->rx_ring[i]);
1876 wr32(E1000_RDBAL(i),
1877 rdba & 0x00000000ffffffffULL);
1878 wr32(E1000_RDBAH(i), rdba >> 32);
1879 wr32(E1000_RDLEN(i),
1880 ring->count * sizeof(union e1000_adv_rx_desc));
1882 ring->head = E1000_RDH(i);
1883 ring->tail = E1000_RDT(i);
1884 writel(0, hw->hw_addr + ring->tail);
1885 writel(0, hw->hw_addr + ring->head);
1887 rxdctl = rd32(E1000_RXDCTL(i));
1888 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1889 rxdctl &= 0xFFF00000;
1890 rxdctl |= IGB_RX_PTHRESH;
1891 rxdctl |= IGB_RX_HTHRESH << 8;
1892 rxdctl |= IGB_RX_WTHRESH << 16;
1893 wr32(E1000_RXDCTL(i), rxdctl);
1894 #ifdef CONFIG_IGB_LRO
1895 /* Intitial LRO Settings */
1896 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1897 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1898 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1899 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1900 ring->lro_mgr.dev = adapter->netdev;
1901 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1902 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1906 if (adapter->num_rx_queues > 1) {
1915 get_random_bytes(&random[0], 40);
1917 if (hw->mac.type >= e1000_82576)
1921 for (j = 0; j < (32 * 4); j++) {
1923 (j % adapter->num_rx_queues) << shift;
1926 hw->hw_addr + E1000_RETA(0) + (j & ~3));
1928 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1930 /* Fill out hash function seeds */
1931 for (j = 0; j < 10; j++)
1932 array_wr32(E1000_RSSRK(0), j, random[j]);
1934 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1935 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1936 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1937 E1000_MRQC_RSS_FIELD_IPV6_TCP);
1938 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1939 E1000_MRQC_RSS_FIELD_IPV6_UDP);
1940 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1941 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1944 wr32(E1000_MRQC, mrqc);
1946 /* Multiqueue and raw packet checksumming are mutually
1947 * exclusive. Note that this not the same as TCP/IP
1948 * checksumming, which works fine. */
1949 rxcsum = rd32(E1000_RXCSUM);
1950 rxcsum |= E1000_RXCSUM_PCSD;
1951 wr32(E1000_RXCSUM, rxcsum);
1953 /* Enable Receive Checksum Offload for TCP and UDP */
1954 rxcsum = rd32(E1000_RXCSUM);
1955 if (adapter->rx_csum) {
1956 rxcsum |= E1000_RXCSUM_TUOFL;
1958 /* Enable IPv4 payload checksum for UDP fragments
1959 * Must be used in conjunction with packet-split. */
1960 if (adapter->rx_ps_hdr_size)
1961 rxcsum |= E1000_RXCSUM_IPPCSE;
1963 rxcsum &= ~E1000_RXCSUM_TUOFL;
1964 /* don't need to clear IPPCSE as it defaults to 0 */
1966 wr32(E1000_RXCSUM, rxcsum);
1971 adapter->max_frame_size + VLAN_TAG_SIZE);
1973 wr32(E1000_RLPML, adapter->max_frame_size);
1975 /* Enable Receives */
1976 wr32(E1000_RCTL, rctl);
1980 * igb_free_tx_resources - Free Tx Resources per Queue
1981 * @tx_ring: Tx descriptor ring for a specific queue
1983 * Free all transmit software resources
1985 void igb_free_tx_resources(struct igb_ring *tx_ring)
1987 struct pci_dev *pdev = tx_ring->adapter->pdev;
1989 igb_clean_tx_ring(tx_ring);
1991 vfree(tx_ring->buffer_info);
1992 tx_ring->buffer_info = NULL;
1994 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1996 tx_ring->desc = NULL;
2000 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2001 * @adapter: board private structure
2003 * Free all transmit software resources
2005 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2009 for (i = 0; i < adapter->num_tx_queues; i++)
2010 igb_free_tx_resources(&adapter->tx_ring[i]);
2013 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2014 struct igb_buffer *buffer_info)
2016 if (buffer_info->dma) {
2017 pci_unmap_page(adapter->pdev,
2019 buffer_info->length,
2021 buffer_info->dma = 0;
2023 if (buffer_info->skb) {
2024 dev_kfree_skb_any(buffer_info->skb);
2025 buffer_info->skb = NULL;
2027 buffer_info->time_stamp = 0;
2028 /* buffer_info must be completely set up in the transmit path */
2032 * igb_clean_tx_ring - Free Tx Buffers
2033 * @tx_ring: ring to be cleaned
2035 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2037 struct igb_adapter *adapter = tx_ring->adapter;
2038 struct igb_buffer *buffer_info;
2042 if (!tx_ring->buffer_info)
2044 /* Free all the Tx ring sk_buffs */
2046 for (i = 0; i < tx_ring->count; i++) {
2047 buffer_info = &tx_ring->buffer_info[i];
2048 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2051 size = sizeof(struct igb_buffer) * tx_ring->count;
2052 memset(tx_ring->buffer_info, 0, size);
2054 /* Zero out the descriptor ring */
2056 memset(tx_ring->desc, 0, tx_ring->size);
2058 tx_ring->next_to_use = 0;
2059 tx_ring->next_to_clean = 0;
2061 writel(0, adapter->hw.hw_addr + tx_ring->head);
2062 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2066 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2067 * @adapter: board private structure
2069 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2073 for (i = 0; i < adapter->num_tx_queues; i++)
2074 igb_clean_tx_ring(&adapter->tx_ring[i]);
2078 * igb_free_rx_resources - Free Rx Resources
2079 * @rx_ring: ring to clean the resources from
2081 * Free all receive software resources
2083 void igb_free_rx_resources(struct igb_ring *rx_ring)
2085 struct pci_dev *pdev = rx_ring->adapter->pdev;
2087 igb_clean_rx_ring(rx_ring);
2089 vfree(rx_ring->buffer_info);
2090 rx_ring->buffer_info = NULL;
2092 #ifdef CONFIG_IGB_LRO
2093 vfree(rx_ring->lro_mgr.lro_arr);
2094 rx_ring->lro_mgr.lro_arr = NULL;
2097 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2099 rx_ring->desc = NULL;
2103 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2104 * @adapter: board private structure
2106 * Free all receive software resources
2108 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2112 for (i = 0; i < adapter->num_rx_queues; i++)
2113 igb_free_rx_resources(&adapter->rx_ring[i]);
2117 * igb_clean_rx_ring - Free Rx Buffers per Queue
2118 * @rx_ring: ring to free buffers from
2120 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2122 struct igb_adapter *adapter = rx_ring->adapter;
2123 struct igb_buffer *buffer_info;
2124 struct pci_dev *pdev = adapter->pdev;
2128 if (!rx_ring->buffer_info)
2130 /* Free all the Rx ring sk_buffs */
2131 for (i = 0; i < rx_ring->count; i++) {
2132 buffer_info = &rx_ring->buffer_info[i];
2133 if (buffer_info->dma) {
2134 if (adapter->rx_ps_hdr_size)
2135 pci_unmap_single(pdev, buffer_info->dma,
2136 adapter->rx_ps_hdr_size,
2137 PCI_DMA_FROMDEVICE);
2139 pci_unmap_single(pdev, buffer_info->dma,
2140 adapter->rx_buffer_len,
2141 PCI_DMA_FROMDEVICE);
2142 buffer_info->dma = 0;
2145 if (buffer_info->skb) {
2146 dev_kfree_skb(buffer_info->skb);
2147 buffer_info->skb = NULL;
2149 if (buffer_info->page) {
2150 if (buffer_info->page_dma)
2151 pci_unmap_page(pdev, buffer_info->page_dma,
2153 PCI_DMA_FROMDEVICE);
2154 put_page(buffer_info->page);
2155 buffer_info->page = NULL;
2156 buffer_info->page_dma = 0;
2157 buffer_info->page_offset = 0;
2161 size = sizeof(struct igb_buffer) * rx_ring->count;
2162 memset(rx_ring->buffer_info, 0, size);
2164 /* Zero out the descriptor ring */
2165 memset(rx_ring->desc, 0, rx_ring->size);
2167 rx_ring->next_to_clean = 0;
2168 rx_ring->next_to_use = 0;
2170 writel(0, adapter->hw.hw_addr + rx_ring->head);
2171 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2175 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2176 * @adapter: board private structure
2178 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2182 for (i = 0; i < adapter->num_rx_queues; i++)
2183 igb_clean_rx_ring(&adapter->rx_ring[i]);
2187 * igb_set_mac - Change the Ethernet Address of the NIC
2188 * @netdev: network interface device structure
2189 * @p: pointer to an address structure
2191 * Returns 0 on success, negative on failure
2193 static int igb_set_mac(struct net_device *netdev, void *p)
2195 struct igb_adapter *adapter = netdev_priv(netdev);
2196 struct sockaddr *addr = p;
2198 if (!is_valid_ether_addr(addr->sa_data))
2199 return -EADDRNOTAVAIL;
2201 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2202 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2204 adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2210 * igb_set_multi - Multicast and Promiscuous mode set
2211 * @netdev: network interface device structure
2213 * The set_multi entry point is called whenever the multicast address
2214 * list or the network interface flags are updated. This routine is
2215 * responsible for configuring the hardware for proper multicast,
2216 * promiscuous mode, and all-multi behavior.
2218 static void igb_set_multi(struct net_device *netdev)
2220 struct igb_adapter *adapter = netdev_priv(netdev);
2221 struct e1000_hw *hw = &adapter->hw;
2222 struct e1000_mac_info *mac = &hw->mac;
2223 struct dev_mc_list *mc_ptr;
2228 /* Check for Promiscuous and All Multicast modes */
2230 rctl = rd32(E1000_RCTL);
2232 if (netdev->flags & IFF_PROMISC) {
2233 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2234 rctl &= ~E1000_RCTL_VFE;
2236 if (netdev->flags & IFF_ALLMULTI) {
2237 rctl |= E1000_RCTL_MPE;
2238 rctl &= ~E1000_RCTL_UPE;
2240 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2241 rctl |= E1000_RCTL_VFE;
2243 wr32(E1000_RCTL, rctl);
2245 if (!netdev->mc_count) {
2246 /* nothing to program, so clear mc list */
2247 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2248 mac->rar_entry_count);
2252 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2256 /* The shared function expects a packed array of only addresses. */
2257 mc_ptr = netdev->mc_list;
2259 for (i = 0; i < netdev->mc_count; i++) {
2262 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2263 mc_ptr = mc_ptr->next;
2265 igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2266 mac->rar_entry_count);
2270 /* Need to wait a few seconds after link up to get diagnostic information from
2272 static void igb_update_phy_info(unsigned long data)
2274 struct igb_adapter *adapter = (struct igb_adapter *) data;
2275 igb_get_phy_info(&adapter->hw);
2279 * igb_watchdog - Timer Call-back
2280 * @data: pointer to adapter cast into an unsigned long
2282 static void igb_watchdog(unsigned long data)
2284 struct igb_adapter *adapter = (struct igb_adapter *)data;
2285 /* Do the rest outside of interrupt context */
2286 schedule_work(&adapter->watchdog_task);
2289 static void igb_watchdog_task(struct work_struct *work)
2291 struct igb_adapter *adapter = container_of(work,
2292 struct igb_adapter, watchdog_task);
2293 struct e1000_hw *hw = &adapter->hw;
2295 struct net_device *netdev = adapter->netdev;
2296 struct igb_ring *tx_ring = adapter->tx_ring;
2297 struct e1000_mac_info *mac = &adapter->hw.mac;
2303 if ((netif_carrier_ok(netdev)) &&
2304 (rd32(E1000_STATUS) & E1000_STATUS_LU))
2307 ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2308 if ((ret_val == E1000_ERR_PHY) &&
2309 (hw->phy.type == e1000_phy_igp_3) &&
2311 E1000_PHY_CTRL_GBE_DISABLE))
2312 dev_info(&adapter->pdev->dev,
2313 "Gigabit has been disabled, downgrading speed\n");
2315 if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2316 !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2317 link = mac->serdes_has_link;
2319 link = rd32(E1000_STATUS) &
2323 if (!netif_carrier_ok(netdev)) {
2325 hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2326 &adapter->link_speed,
2327 &adapter->link_duplex);
2329 ctrl = rd32(E1000_CTRL);
2330 /* Links status message must follow this format */
2331 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
2332 "Flow Control: %s\n",
2334 adapter->link_speed,
2335 adapter->link_duplex == FULL_DUPLEX ?
2336 "Full Duplex" : "Half Duplex",
2337 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2338 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2339 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2340 E1000_CTRL_TFCE) ? "TX" : "None")));
2342 /* tweak tx_queue_len according to speed/duplex and
2343 * adjust the timeout factor */
2344 netdev->tx_queue_len = adapter->tx_queue_len;
2345 adapter->tx_timeout_factor = 1;
2346 switch (adapter->link_speed) {
2348 netdev->tx_queue_len = 10;
2349 adapter->tx_timeout_factor = 14;
2352 netdev->tx_queue_len = 100;
2353 /* maybe add some timeout factor ? */
2357 netif_carrier_on(netdev);
2358 netif_tx_wake_all_queues(netdev);
2360 if (!test_bit(__IGB_DOWN, &adapter->state))
2361 mod_timer(&adapter->phy_info_timer,
2362 round_jiffies(jiffies + 2 * HZ));
2365 if (netif_carrier_ok(netdev)) {
2366 adapter->link_speed = 0;
2367 adapter->link_duplex = 0;
2368 /* Links status message must follow this format */
2369 printk(KERN_INFO "igb: %s NIC Link is Down\n",
2371 netif_carrier_off(netdev);
2372 netif_tx_stop_all_queues(netdev);
2373 if (!test_bit(__IGB_DOWN, &adapter->state))
2374 mod_timer(&adapter->phy_info_timer,
2375 round_jiffies(jiffies + 2 * HZ));
2380 igb_update_stats(adapter);
2382 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2383 adapter->tpt_old = adapter->stats.tpt;
2384 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2385 adapter->colc_old = adapter->stats.colc;
2387 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2388 adapter->gorc_old = adapter->stats.gorc;
2389 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2390 adapter->gotc_old = adapter->stats.gotc;
2392 igb_update_adaptive(&adapter->hw);
2394 if (!netif_carrier_ok(netdev)) {
2395 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2396 /* We've lost link, so the controller stops DMA,
2397 * but we've got queued Tx work that's never going
2398 * to get done, so reset controller to flush Tx.
2399 * (Do the reset outside of interrupt context). */
2400 adapter->tx_timeout_count++;
2401 schedule_work(&adapter->reset_task);
2405 /* Cause software interrupt to ensure rx ring is cleaned */
2406 if (adapter->msix_entries) {
2407 for (i = 0; i < adapter->num_rx_queues; i++)
2408 eics |= adapter->rx_ring[i].eims_value;
2409 wr32(E1000_EICS, eics);
2411 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2414 /* Force detection of hung controller every watchdog period */
2415 tx_ring->detect_tx_hung = true;
2417 /* Reset the timer */
2418 if (!test_bit(__IGB_DOWN, &adapter->state))
2419 mod_timer(&adapter->watchdog_timer,
2420 round_jiffies(jiffies + 2 * HZ));
2423 enum latency_range {
2427 latency_invalid = 255
2432 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2434 * Stores a new ITR value based on strictly on packet size. This
2435 * algorithm is less sophisticated than that used in igb_update_itr,
2436 * due to the difficulty of synchronizing statistics across multiple
2437 * receive rings. The divisors and thresholds used by this fuction
2438 * were determined based on theoretical maximum wire speed and testing
2439 * data, in order to minimize response time while increasing bulk
2441 * This functionality is controlled by the InterruptThrottleRate module
2442 * parameter (see igb_param.c)
2443 * NOTE: This function is called only when operating in a multiqueue
2444 * receive environment.
2445 * @rx_ring: pointer to ring
2447 static void igb_update_ring_itr(struct igb_ring *rx_ring)
2449 int new_val = rx_ring->itr_val;
2450 int avg_wire_size = 0;
2451 struct igb_adapter *adapter = rx_ring->adapter;
2453 if (!rx_ring->total_packets)
2454 goto clear_counts; /* no packets, so don't do anything */
2456 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2457 * ints/sec - ITR timer value of 120 ticks.
2459 if (adapter->link_speed != SPEED_1000) {
2463 avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2465 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2466 avg_wire_size += 24;
2468 /* Don't starve jumbo frames */
2469 avg_wire_size = min(avg_wire_size, 3000);
2471 /* Give a little boost to mid-size frames */
2472 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2473 new_val = avg_wire_size / 3;
2475 new_val = avg_wire_size / 2;
2478 if (new_val != rx_ring->itr_val) {
2479 rx_ring->itr_val = new_val;
2480 rx_ring->set_itr = 1;
2483 rx_ring->total_bytes = 0;
2484 rx_ring->total_packets = 0;
2488 * igb_update_itr - update the dynamic ITR value based on statistics
2489 * Stores a new ITR value based on packets and byte
2490 * counts during the last interrupt. The advantage of per interrupt
2491 * computation is faster updates and more accurate ITR for the current
2492 * traffic pattern. Constants in this function were computed
2493 * based on theoretical maximum wire speed and thresholds were set based
2494 * on testing data as well as attempting to minimize response time
2495 * while increasing bulk throughput.
2496 * this functionality is controlled by the InterruptThrottleRate module
2497 * parameter (see igb_param.c)
2498 * NOTE: These calculations are only valid when operating in a single-
2499 * queue environment.
2500 * @adapter: pointer to adapter
2501 * @itr_setting: current adapter->itr
2502 * @packets: the number of packets during this measurement interval
2503 * @bytes: the number of bytes during this measurement interval
2505 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2506 int packets, int bytes)
2508 unsigned int retval = itr_setting;
2511 goto update_itr_done;
2513 switch (itr_setting) {
2514 case lowest_latency:
2515 /* handle TSO and jumbo frames */
2516 if (bytes/packets > 8000)
2517 retval = bulk_latency;
2518 else if ((packets < 5) && (bytes > 512))
2519 retval = low_latency;
2521 case low_latency: /* 50 usec aka 20000 ints/s */
2522 if (bytes > 10000) {
2523 /* this if handles the TSO accounting */
2524 if (bytes/packets > 8000) {
2525 retval = bulk_latency;
2526 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2527 retval = bulk_latency;
2528 } else if ((packets > 35)) {
2529 retval = lowest_latency;
2531 } else if (bytes/packets > 2000) {
2532 retval = bulk_latency;
2533 } else if (packets <= 2 && bytes < 512) {
2534 retval = lowest_latency;
2537 case bulk_latency: /* 250 usec aka 4000 ints/s */
2538 if (bytes > 25000) {
2540 retval = low_latency;
2541 } else if (bytes < 6000) {
2542 retval = low_latency;
2551 static void igb_set_itr(struct igb_adapter *adapter)
2554 u32 new_itr = adapter->itr;
2556 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2557 if (adapter->link_speed != SPEED_1000) {
2563 adapter->rx_itr = igb_update_itr(adapter,
2565 adapter->rx_ring->total_packets,
2566 adapter->rx_ring->total_bytes);
2568 if (adapter->rx_ring->buddy) {
2569 adapter->tx_itr = igb_update_itr(adapter,
2571 adapter->tx_ring->total_packets,
2572 adapter->tx_ring->total_bytes);
2574 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2576 current_itr = adapter->rx_itr;
2579 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2580 if (adapter->itr_setting == 3 &&
2581 current_itr == lowest_latency)
2582 current_itr = low_latency;
2584 switch (current_itr) {
2585 /* counts and packets in update_itr are dependent on these numbers */
2586 case lowest_latency:
2590 new_itr = 20000; /* aka hwitr = ~200 */
2600 adapter->rx_ring->total_bytes = 0;
2601 adapter->rx_ring->total_packets = 0;
2602 if (adapter->rx_ring->buddy) {
2603 adapter->rx_ring->buddy->total_bytes = 0;
2604 adapter->rx_ring->buddy->total_packets = 0;
2607 if (new_itr != adapter->itr) {
2608 /* this attempts to bias the interrupt rate towards Bulk
2609 * by adding intermediate steps when interrupt rate is
2611 new_itr = new_itr > adapter->itr ?
2612 min(adapter->itr + (new_itr >> 2), new_itr) :
2614 /* Don't write the value here; it resets the adapter's
2615 * internal timer, and causes us to delay far longer than
2616 * we should between interrupts. Instead, we write the ITR
2617 * value at the beginning of the next interrupt so the timing
2618 * ends up being correct.
2620 adapter->itr = new_itr;
2621 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2622 adapter->rx_ring->set_itr = 1;
2629 #define IGB_TX_FLAGS_CSUM 0x00000001
2630 #define IGB_TX_FLAGS_VLAN 0x00000002
2631 #define IGB_TX_FLAGS_TSO 0x00000004
2632 #define IGB_TX_FLAGS_IPV4 0x00000008
2633 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2634 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2636 static inline int igb_tso_adv(struct igb_adapter *adapter,
2637 struct igb_ring *tx_ring,
2638 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2640 struct e1000_adv_tx_context_desc *context_desc;
2643 struct igb_buffer *buffer_info;
2644 u32 info = 0, tu_cmd = 0;
2645 u32 mss_l4len_idx, l4len;
2648 if (skb_header_cloned(skb)) {
2649 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2654 l4len = tcp_hdrlen(skb);
2657 if (skb->protocol == htons(ETH_P_IP)) {
2658 struct iphdr *iph = ip_hdr(skb);
2661 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2665 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2666 ipv6_hdr(skb)->payload_len = 0;
2667 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2668 &ipv6_hdr(skb)->daddr,
2672 i = tx_ring->next_to_use;
2674 buffer_info = &tx_ring->buffer_info[i];
2675 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2676 /* VLAN MACLEN IPLEN */
2677 if (tx_flags & IGB_TX_FLAGS_VLAN)
2678 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2679 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2680 *hdr_len += skb_network_offset(skb);
2681 info |= skb_network_header_len(skb);
2682 *hdr_len += skb_network_header_len(skb);
2683 context_desc->vlan_macip_lens = cpu_to_le32(info);
2685 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2686 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2688 if (skb->protocol == htons(ETH_P_IP))
2689 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2690 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2692 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2695 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2696 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2698 /* Context index must be unique per ring. */
2699 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2700 mss_l4len_idx |= tx_ring->queue_index << 4;
2702 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2703 context_desc->seqnum_seed = 0;
2705 buffer_info->time_stamp = jiffies;
2706 buffer_info->next_to_watch = i;
2707 buffer_info->dma = 0;
2709 if (i == tx_ring->count)
2712 tx_ring->next_to_use = i;
2717 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2718 struct igb_ring *tx_ring,
2719 struct sk_buff *skb, u32 tx_flags)
2721 struct e1000_adv_tx_context_desc *context_desc;
2723 struct igb_buffer *buffer_info;
2724 u32 info = 0, tu_cmd = 0;
2726 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2727 (tx_flags & IGB_TX_FLAGS_VLAN)) {
2728 i = tx_ring->next_to_use;
2729 buffer_info = &tx_ring->buffer_info[i];
2730 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2732 if (tx_flags & IGB_TX_FLAGS_VLAN)
2733 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2734 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2735 if (skb->ip_summed == CHECKSUM_PARTIAL)
2736 info |= skb_network_header_len(skb);
2738 context_desc->vlan_macip_lens = cpu_to_le32(info);
2740 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2742 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2743 switch (skb->protocol) {
2744 case __constant_htons(ETH_P_IP):
2745 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2746 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2747 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2749 case __constant_htons(ETH_P_IPV6):
2750 /* XXX what about other V6 headers?? */
2751 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2752 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2755 if (unlikely(net_ratelimit()))
2756 dev_warn(&adapter->pdev->dev,
2757 "partial checksum but proto=%x!\n",
2763 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2764 context_desc->seqnum_seed = 0;
2765 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2766 context_desc->mss_l4len_idx =
2767 cpu_to_le32(tx_ring->queue_index << 4);
2769 buffer_info->time_stamp = jiffies;
2770 buffer_info->next_to_watch = i;
2771 buffer_info->dma = 0;
2774 if (i == tx_ring->count)
2776 tx_ring->next_to_use = i;
2785 #define IGB_MAX_TXD_PWR 16
2786 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2788 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2789 struct igb_ring *tx_ring, struct sk_buff *skb,
2792 struct igb_buffer *buffer_info;
2793 unsigned int len = skb_headlen(skb);
2794 unsigned int count = 0, i;
2797 i = tx_ring->next_to_use;
2799 buffer_info = &tx_ring->buffer_info[i];
2800 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2801 buffer_info->length = len;
2802 /* set time_stamp *before* dma to help avoid a possible race */
2803 buffer_info->time_stamp = jiffies;
2804 buffer_info->next_to_watch = i;
2805 buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2809 if (i == tx_ring->count)
2812 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2813 struct skb_frag_struct *frag;
2815 frag = &skb_shinfo(skb)->frags[f];
2818 buffer_info = &tx_ring->buffer_info[i];
2819 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2820 buffer_info->length = len;
2821 buffer_info->time_stamp = jiffies;
2822 buffer_info->next_to_watch = i;
2823 buffer_info->dma = pci_map_page(adapter->pdev,
2831 if (i == tx_ring->count)
2835 i = ((i == 0) ? tx_ring->count - 1 : i - 1);
2836 tx_ring->buffer_info[i].skb = skb;
2837 tx_ring->buffer_info[first].next_to_watch = i;
2842 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2843 struct igb_ring *tx_ring,
2844 int tx_flags, int count, u32 paylen,
2847 union e1000_adv_tx_desc *tx_desc = NULL;
2848 struct igb_buffer *buffer_info;
2849 u32 olinfo_status = 0, cmd_type_len;
2852 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2853 E1000_ADVTXD_DCMD_DEXT);
2855 if (tx_flags & IGB_TX_FLAGS_VLAN)
2856 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2858 if (tx_flags & IGB_TX_FLAGS_TSO) {
2859 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2861 /* insert tcp checksum */
2862 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2864 /* insert ip checksum */
2865 if (tx_flags & IGB_TX_FLAGS_IPV4)
2866 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2868 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2869 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2872 if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2873 (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2874 IGB_TX_FLAGS_VLAN)))
2875 olinfo_status |= tx_ring->queue_index << 4;
2877 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2879 i = tx_ring->next_to_use;
2881 buffer_info = &tx_ring->buffer_info[i];
2882 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2883 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2884 tx_desc->read.cmd_type_len =
2885 cpu_to_le32(cmd_type_len | buffer_info->length);
2886 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2888 if (i == tx_ring->count)
2892 tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2893 /* Force memory writes to complete before letting h/w
2894 * know there are new descriptors to fetch. (Only
2895 * applicable for weak-ordered memory model archs,
2896 * such as IA-64). */
2899 tx_ring->next_to_use = i;
2900 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2901 /* we need this if more than one processor can write to our tail
2902 * at a time, it syncronizes IO on IA64/Altix systems */
2906 static int __igb_maybe_stop_tx(struct net_device *netdev,
2907 struct igb_ring *tx_ring, int size)
2909 struct igb_adapter *adapter = netdev_priv(netdev);
2911 netif_stop_subqueue(netdev, tx_ring->queue_index);
2913 /* Herbert's original patch had:
2914 * smp_mb__after_netif_stop_queue();
2915 * but since that doesn't exist yet, just open code it. */
2918 /* We need to check again in a case another CPU has just
2919 * made room available. */
2920 if (IGB_DESC_UNUSED(tx_ring) < size)
2924 netif_wake_subqueue(netdev, tx_ring->queue_index);
2925 ++adapter->restart_queue;
2929 static int igb_maybe_stop_tx(struct net_device *netdev,
2930 struct igb_ring *tx_ring, int size)
2932 if (IGB_DESC_UNUSED(tx_ring) >= size)
2934 return __igb_maybe_stop_tx(netdev, tx_ring, size);
2937 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2939 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2940 struct net_device *netdev,
2941 struct igb_ring *tx_ring)
2943 struct igb_adapter *adapter = netdev_priv(netdev);
2945 unsigned int tx_flags = 0;
2950 len = skb_headlen(skb);
2952 if (test_bit(__IGB_DOWN, &adapter->state)) {
2953 dev_kfree_skb_any(skb);
2954 return NETDEV_TX_OK;
2957 if (skb->len <= 0) {
2958 dev_kfree_skb_any(skb);
2959 return NETDEV_TX_OK;
2962 /* need: 1 descriptor per page,
2963 * + 2 desc gap to keep tail from touching head,
2964 * + 1 desc for skb->data,
2965 * + 1 desc for context descriptor,
2966 * otherwise try next time */
2967 if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2968 /* this is a hard error */
2969 return NETDEV_TX_BUSY;
2973 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2974 tx_flags |= IGB_TX_FLAGS_VLAN;
2975 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2978 if (skb->protocol == htons(ETH_P_IP))
2979 tx_flags |= IGB_TX_FLAGS_IPV4;
2981 first = tx_ring->next_to_use;
2983 tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2987 dev_kfree_skb_any(skb);
2988 return NETDEV_TX_OK;
2992 tx_flags |= IGB_TX_FLAGS_TSO;
2993 else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2994 if (skb->ip_summed == CHECKSUM_PARTIAL)
2995 tx_flags |= IGB_TX_FLAGS_CSUM;
2997 igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2998 igb_tx_map_adv(adapter, tx_ring, skb, first),
3001 netdev->trans_start = jiffies;
3003 /* Make sure there is space in the ring for the next send. */
3004 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3006 return NETDEV_TX_OK;
3009 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3011 struct igb_adapter *adapter = netdev_priv(netdev);
3012 struct igb_ring *tx_ring;
3015 r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3016 tx_ring = adapter->multi_tx_table[r_idx];
3018 /* This goes back to the question of how to logically map a tx queue
3019 * to a flow. Right now, performance is impacted slightly negatively
3020 * if using multiple tx queues. If the stack breaks away from a
3021 * single qdisc implementation, we can look at this again. */
3022 return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3026 * igb_tx_timeout - Respond to a Tx Hang
3027 * @netdev: network interface device structure
3029 static void igb_tx_timeout(struct net_device *netdev)
3031 struct igb_adapter *adapter = netdev_priv(netdev);
3032 struct e1000_hw *hw = &adapter->hw;
3034 /* Do the reset outside of interrupt context */
3035 adapter->tx_timeout_count++;
3036 schedule_work(&adapter->reset_task);
3037 wr32(E1000_EICS, adapter->eims_enable_mask &
3038 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3041 static void igb_reset_task(struct work_struct *work)
3043 struct igb_adapter *adapter;
3044 adapter = container_of(work, struct igb_adapter, reset_task);
3046 igb_reinit_locked(adapter);
3050 * igb_get_stats - Get System Network Statistics
3051 * @netdev: network interface device structure
3053 * Returns the address of the device statistics structure.
3054 * The statistics are actually updated from the timer callback.
3056 static struct net_device_stats *
3057 igb_get_stats(struct net_device *netdev)
3059 struct igb_adapter *adapter = netdev_priv(netdev);
3061 /* only return the current stats */
3062 return &adapter->net_stats;
3066 * igb_change_mtu - Change the Maximum Transfer Unit
3067 * @netdev: network interface device structure
3068 * @new_mtu: new value for maximum frame size
3070 * Returns 0 on success, negative on failure
3072 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3074 struct igb_adapter *adapter = netdev_priv(netdev);
3075 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3077 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3078 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3079 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3083 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3084 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3085 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3089 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3091 /* igb_down has a dependency on max_frame_size */
3092 adapter->max_frame_size = max_frame;
3093 if (netif_running(netdev))
3096 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3097 * means we reserve 2 more, this pushes us to allocate from the next
3099 * i.e. RXBUFFER_2048 --> size-4096 slab
3102 if (max_frame <= IGB_RXBUFFER_256)
3103 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3104 else if (max_frame <= IGB_RXBUFFER_512)
3105 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3106 else if (max_frame <= IGB_RXBUFFER_1024)
3107 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3108 else if (max_frame <= IGB_RXBUFFER_2048)
3109 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3111 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3112 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3114 adapter->rx_buffer_len = PAGE_SIZE / 2;
3116 /* adjust allocation if LPE protects us, and we aren't using SBP */
3117 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3118 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3119 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3121 dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3122 netdev->mtu, new_mtu);
3123 netdev->mtu = new_mtu;
3125 if (netif_running(netdev))
3130 clear_bit(__IGB_RESETTING, &adapter->state);
3136 * igb_update_stats - Update the board statistics counters
3137 * @adapter: board private structure
3140 void igb_update_stats(struct igb_adapter *adapter)
3142 struct e1000_hw *hw = &adapter->hw;
3143 struct pci_dev *pdev = adapter->pdev;
3146 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3149 * Prevent stats update while adapter is being reset, or if the pci
3150 * connection is down.
3152 if (adapter->link_speed == 0)
3154 if (pci_channel_offline(pdev))
3157 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3158 adapter->stats.gprc += rd32(E1000_GPRC);
3159 adapter->stats.gorc += rd32(E1000_GORCL);
3160 rd32(E1000_GORCH); /* clear GORCL */
3161 adapter->stats.bprc += rd32(E1000_BPRC);
3162 adapter->stats.mprc += rd32(E1000_MPRC);
3163 adapter->stats.roc += rd32(E1000_ROC);
3165 adapter->stats.prc64 += rd32(E1000_PRC64);
3166 adapter->stats.prc127 += rd32(E1000_PRC127);
3167 adapter->stats.prc255 += rd32(E1000_PRC255);
3168 adapter->stats.prc511 += rd32(E1000_PRC511);
3169 adapter->stats.prc1023 += rd32(E1000_PRC1023);
3170 adapter->stats.prc1522 += rd32(E1000_PRC1522);
3171 adapter->stats.symerrs += rd32(E1000_SYMERRS);
3172 adapter->stats.sec += rd32(E1000_SEC);
3174 adapter->stats.mpc += rd32(E1000_MPC);
3175 adapter->stats.scc += rd32(E1000_SCC);
3176 adapter->stats.ecol += rd32(E1000_ECOL);
3177 adapter->stats.mcc += rd32(E1000_MCC);
3178 adapter->stats.latecol += rd32(E1000_LATECOL);
3179 adapter->stats.dc += rd32(E1000_DC);
3180 adapter->stats.rlec += rd32(E1000_RLEC);
3181 adapter->stats.xonrxc += rd32(E1000_XONRXC);
3182 adapter->stats.xontxc += rd32(E1000_XONTXC);
3183 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3184 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3185 adapter->stats.fcruc += rd32(E1000_FCRUC);
3186 adapter->stats.gptc += rd32(E1000_GPTC);
3187 adapter->stats.gotc += rd32(E1000_GOTCL);
3188 rd32(E1000_GOTCH); /* clear GOTCL */
3189 adapter->stats.rnbc += rd32(E1000_RNBC);
3190 adapter->stats.ruc += rd32(E1000_RUC);
3191 adapter->stats.rfc += rd32(E1000_RFC);
3192 adapter->stats.rjc += rd32(E1000_RJC);
3193 adapter->stats.tor += rd32(E1000_TORH);
3194 adapter->stats.tot += rd32(E1000_TOTH);
3195 adapter->stats.tpr += rd32(E1000_TPR);
3197 adapter->stats.ptc64 += rd32(E1000_PTC64);
3198 adapter->stats.ptc127 += rd32(E1000_PTC127);
3199 adapter->stats.ptc255 += rd32(E1000_PTC255);
3200 adapter->stats.ptc511 += rd32(E1000_PTC511);
3201 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3202 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3204 adapter->stats.mptc += rd32(E1000_MPTC);
3205 adapter->stats.bptc += rd32(E1000_BPTC);
3207 /* used for adaptive IFS */
3209 hw->mac.tx_packet_delta = rd32(E1000_TPT);
3210 adapter->stats.tpt += hw->mac.tx_packet_delta;
3211 hw->mac.collision_delta = rd32(E1000_COLC);
3212 adapter->stats.colc += hw->mac.collision_delta;
3214 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3215 adapter->stats.rxerrc += rd32(E1000_RXERRC);
3216 adapter->stats.tncrs += rd32(E1000_TNCRS);
3217 adapter->stats.tsctc += rd32(E1000_TSCTC);
3218 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3220 adapter->stats.iac += rd32(E1000_IAC);
3221 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3222 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3223 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3224 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3225 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3226 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3227 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3228 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3230 /* Fill out the OS statistics structure */
3231 adapter->net_stats.multicast = adapter->stats.mprc;
3232 adapter->net_stats.collisions = adapter->stats.colc;
3236 /* RLEC on some newer hardware can be incorrect so build
3237 * our own version based on RUC and ROC */
3238 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3239 adapter->stats.crcerrs + adapter->stats.algnerrc +
3240 adapter->stats.ruc + adapter->stats.roc +
3241 adapter->stats.cexterr;
3242 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3244 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3245 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3246 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3249 adapter->net_stats.tx_errors = adapter->stats.ecol +
3250 adapter->stats.latecol;
3251 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3252 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3253 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3255 /* Tx Dropped needs to be maintained elsewhere */
3258 if (hw->phy.media_type == e1000_media_type_copper) {
3259 if ((adapter->link_speed == SPEED_1000) &&
3260 (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
3262 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3263 adapter->phy_stats.idle_errors += phy_tmp;
3267 /* Management Stats */
3268 adapter->stats.mgptc += rd32(E1000_MGTPTC);
3269 adapter->stats.mgprc += rd32(E1000_MGTPRC);
3270 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3274 static irqreturn_t igb_msix_other(int irq, void *data)
3276 struct net_device *netdev = data;
3277 struct igb_adapter *adapter = netdev_priv(netdev);
3278 struct e1000_hw *hw = &adapter->hw;
3279 u32 icr = rd32(E1000_ICR);
3281 /* reading ICR causes bit 31 of EICR to be cleared */
3282 if (!(icr & E1000_ICR_LSC))
3283 goto no_link_interrupt;
3284 hw->mac.get_link_status = 1;
3285 /* guard against interrupt when we're going down */
3286 if (!test_bit(__IGB_DOWN, &adapter->state))
3287 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3290 wr32(E1000_IMS, E1000_IMS_LSC);
3291 wr32(E1000_EIMS, adapter->eims_other);
3296 static irqreturn_t igb_msix_tx(int irq, void *data)
3298 struct igb_ring *tx_ring = data;
3299 struct igb_adapter *adapter = tx_ring->adapter;
3300 struct e1000_hw *hw = &adapter->hw;
3302 #ifdef CONFIG_IGB_DCA
3303 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3304 igb_update_tx_dca(tx_ring);
3306 tx_ring->total_bytes = 0;
3307 tx_ring->total_packets = 0;
3309 /* auto mask will automatically reenable the interrupt when we write
3311 if (!igb_clean_tx_irq(tx_ring))
3312 /* Ring was not completely cleaned, so fire another interrupt */
3313 wr32(E1000_EICS, tx_ring->eims_value);
3315 wr32(E1000_EIMS, tx_ring->eims_value);
3320 static void igb_write_itr(struct igb_ring *ring)
3322 struct e1000_hw *hw = &ring->adapter->hw;
3323 if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3324 switch (hw->mac.type) {
3326 wr32(ring->itr_register,
3331 wr32(ring->itr_register,
3333 (ring->itr_val << 16));
3340 static irqreturn_t igb_msix_rx(int irq, void *data)
3342 struct igb_ring *rx_ring = data;
3343 struct igb_adapter *adapter = rx_ring->adapter;
3345 /* Write the ITR value calculated at the end of the
3346 * previous interrupt.
3349 igb_write_itr(rx_ring);
3351 if (netif_rx_schedule_prep(&rx_ring->napi))
3352 __netif_rx_schedule(&rx_ring->napi);
3354 #ifdef CONFIG_IGB_DCA
3355 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3356 igb_update_rx_dca(rx_ring);
3361 #ifdef CONFIG_IGB_DCA
3362 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3365 struct igb_adapter *adapter = rx_ring->adapter;
3366 struct e1000_hw *hw = &adapter->hw;
3367 int cpu = get_cpu();
3368 int q = rx_ring - adapter->rx_ring;
3370 if (rx_ring->cpu != cpu) {
3371 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3372 if (hw->mac.type == e1000_82576) {
3373 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3374 dca_rxctrl |= dca_get_tag(cpu) <<
3375 E1000_DCA_RXCTRL_CPUID_SHIFT;
3377 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3378 dca_rxctrl |= dca_get_tag(cpu);
3380 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3381 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3382 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3383 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3389 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3392 struct igb_adapter *adapter = tx_ring->adapter;
3393 struct e1000_hw *hw = &adapter->hw;
3394 int cpu = get_cpu();
3395 int q = tx_ring - adapter->tx_ring;
3397 if (tx_ring->cpu != cpu) {
3398 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3399 if (hw->mac.type == e1000_82576) {
3400 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3401 dca_txctrl |= dca_get_tag(cpu) <<
3402 E1000_DCA_TXCTRL_CPUID_SHIFT;
3404 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3405 dca_txctrl |= dca_get_tag(cpu);
3407 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3408 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3414 static void igb_setup_dca(struct igb_adapter *adapter)
3418 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3421 for (i = 0; i < adapter->num_tx_queues; i++) {
3422 adapter->tx_ring[i].cpu = -1;
3423 igb_update_tx_dca(&adapter->tx_ring[i]);
3425 for (i = 0; i < adapter->num_rx_queues; i++) {
3426 adapter->rx_ring[i].cpu = -1;
3427 igb_update_rx_dca(&adapter->rx_ring[i]);
3431 static int __igb_notify_dca(struct device *dev, void *data)
3433 struct net_device *netdev = dev_get_drvdata(dev);
3434 struct igb_adapter *adapter = netdev_priv(netdev);
3435 struct e1000_hw *hw = &adapter->hw;
3436 unsigned long event = *(unsigned long *)data;
3438 if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3442 case DCA_PROVIDER_ADD:
3443 /* if already enabled, don't do it again */
3444 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3446 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3447 /* Always use CB2 mode, difference is masked
3448 * in the CB driver. */
3449 wr32(E1000_DCA_CTRL, 2);
3450 if (dca_add_requester(dev) == 0) {
3451 dev_info(&adapter->pdev->dev, "DCA enabled\n");
3452 igb_setup_dca(adapter);
3455 /* Fall Through since DCA is disabled. */
3456 case DCA_PROVIDER_REMOVE:
3457 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3458 /* without this a class_device is left
3459 * hanging around in the sysfs model */
3460 dca_remove_requester(dev);
3461 dev_info(&adapter->pdev->dev, "DCA disabled\n");
3462 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3463 wr32(E1000_DCA_CTRL, 1);
3471 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3476 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3479 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3481 #endif /* CONFIG_IGB_DCA */
3484 * igb_intr_msi - Interrupt Handler
3485 * @irq: interrupt number
3486 * @data: pointer to a network interface device structure
3488 static irqreturn_t igb_intr_msi(int irq, void *data)
3490 struct net_device *netdev = data;
3491 struct igb_adapter *adapter = netdev_priv(netdev);
3492 struct e1000_hw *hw = &adapter->hw;
3493 /* read ICR disables interrupts using IAM */
3494 u32 icr = rd32(E1000_ICR);
3496 igb_write_itr(adapter->rx_ring);
3498 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3499 hw->mac.get_link_status = 1;
3500 if (!test_bit(__IGB_DOWN, &adapter->state))
3501 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3504 netif_rx_schedule(&adapter->rx_ring[0].napi);
3510 * igb_intr - Interrupt Handler
3511 * @irq: interrupt number
3512 * @data: pointer to a network interface device structure
3514 static irqreturn_t igb_intr(int irq, void *data)
3516 struct net_device *netdev = data;
3517 struct igb_adapter *adapter = netdev_priv(netdev);
3518 struct e1000_hw *hw = &adapter->hw;
3519 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3520 * need for the IMC write */
3521 u32 icr = rd32(E1000_ICR);
3524 return IRQ_NONE; /* Not our interrupt */
3526 igb_write_itr(adapter->rx_ring);
3528 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3529 * not set, then the adapter didn't send an interrupt */
3530 if (!(icr & E1000_ICR_INT_ASSERTED))
3533 eicr = rd32(E1000_EICR);
3535 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3536 hw->mac.get_link_status = 1;
3537 /* guard against interrupt when we're going down */
3538 if (!test_bit(__IGB_DOWN, &adapter->state))
3539 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3542 netif_rx_schedule(&adapter->rx_ring[0].napi);
3548 * igb_poll - NAPI Rx polling callback
3549 * @napi: napi polling structure
3550 * @budget: count of how many packets we should handle
3552 static int igb_poll(struct napi_struct *napi, int budget)
3554 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3555 struct igb_adapter *adapter = rx_ring->adapter;
3556 struct net_device *netdev = adapter->netdev;
3557 int tx_clean_complete, work_done = 0;
3559 /* this poll routine only supports one tx and one rx queue */
3560 #ifdef CONFIG_IGB_DCA
3561 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3562 igb_update_tx_dca(&adapter->tx_ring[0]);
3564 tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3566 #ifdef CONFIG_IGB_DCA
3567 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3568 igb_update_rx_dca(&adapter->rx_ring[0]);
3570 igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3572 /* If no Tx and not enough Rx work done, exit the polling mode */
3573 if ((tx_clean_complete && (work_done < budget)) ||
3574 !netif_running(netdev)) {
3575 if (adapter->itr_setting & 3)
3576 igb_set_itr(adapter);
3577 netif_rx_complete(napi);
3578 if (!test_bit(__IGB_DOWN, &adapter->state))
3579 igb_irq_enable(adapter);
3586 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3588 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3589 struct igb_adapter *adapter = rx_ring->adapter;
3590 struct e1000_hw *hw = &adapter->hw;
3591 struct net_device *netdev = adapter->netdev;
3594 #ifdef CONFIG_IGB_DCA
3595 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3596 igb_update_rx_dca(rx_ring);
3598 igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3601 /* If not enough Rx work done, exit the polling mode */
3602 if ((work_done == 0) || !netif_running(netdev)) {
3603 netif_rx_complete(napi);
3605 if (adapter->itr_setting & 3) {
3606 if (adapter->num_rx_queues == 1)
3607 igb_set_itr(adapter);
3609 igb_update_ring_itr(rx_ring);
3612 if (!test_bit(__IGB_DOWN, &adapter->state))
3613 wr32(E1000_EIMS, rx_ring->eims_value);
3622 * igb_clean_tx_irq - Reclaim resources after transmit completes
3623 * @adapter: board private structure
3624 * returns true if ring is completely cleaned
3626 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3628 struct igb_adapter *adapter = tx_ring->adapter;
3629 struct net_device *netdev = adapter->netdev;
3630 struct e1000_hw *hw = &adapter->hw;
3631 struct igb_buffer *buffer_info;
3632 struct sk_buff *skb;
3633 union e1000_adv_tx_desc *tx_desc, *eop_desc;
3634 unsigned int total_bytes = 0, total_packets = 0;
3635 unsigned int i, eop, count = 0;
3636 bool cleaned = false;
3638 i = tx_ring->next_to_clean;
3639 eop = tx_ring->buffer_info[i].next_to_watch;
3640 eop_desc = E1000_TX_DESC_ADV(*tx_ring, eop);
3642 while ((eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3643 (count < tx_ring->count)) {
3644 for (cleaned = false; !cleaned; count++) {
3645 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
3646 buffer_info = &tx_ring->buffer_info[i];
3647 cleaned = (i == eop);
3648 skb = buffer_info->skb;
3651 unsigned int segs, bytecount;
3652 /* gso_segs is currently only valid for tcp */
3653 segs = skb_shinfo(skb)->gso_segs ?: 1;
3654 /* multiply data chunks by size of headers */
3655 bytecount = ((segs - 1) * skb_headlen(skb)) +
3657 total_packets += segs;
3658 total_bytes += bytecount;
3661 igb_unmap_and_free_tx_resource(adapter, buffer_info);
3662 tx_desc->wb.status = 0;
3665 if (i == tx_ring->count)
3669 eop = tx_ring->buffer_info[i].next_to_watch;
3670 eop_desc = E1000_TX_DESC_ADV(*tx_ring, eop);
3673 tx_ring->next_to_clean = i;
3675 if (unlikely(count &&
3676 netif_carrier_ok(netdev) &&
3677 IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3678 /* Make sure that anybody stopping the queue after this
3679 * sees the new next_to_clean.
3682 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3683 !(test_bit(__IGB_DOWN, &adapter->state))) {
3684 netif_wake_subqueue(netdev, tx_ring->queue_index);
3685 ++adapter->restart_queue;
3689 if (tx_ring->detect_tx_hung) {
3690 /* Detect a transmit hang in hardware, this serializes the
3691 * check with the clearing of time_stamp and movement of i */
3692 tx_ring->detect_tx_hung = false;
3693 if (tx_ring->buffer_info[i].time_stamp &&
3694 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3695 (adapter->tx_timeout_factor * HZ))
3696 && !(rd32(E1000_STATUS) &
3697 E1000_STATUS_TXOFF)) {
3699 /* detected Tx unit hang */
3700 dev_err(&adapter->pdev->dev,
3701 "Detected Tx Unit Hang\n"
3705 " next_to_use <%x>\n"
3706 " next_to_clean <%x>\n"
3707 "buffer_info[next_to_clean]\n"
3708 " time_stamp <%lx>\n"
3709 " next_to_watch <%x>\n"
3711 " desc.status <%x>\n",
3712 tx_ring->queue_index,
3713 readl(adapter->hw.hw_addr + tx_ring->head),
3714 readl(adapter->hw.hw_addr + tx_ring->tail),
3715 tx_ring->next_to_use,
3716 tx_ring->next_to_clean,
3717 tx_ring->buffer_info[i].time_stamp,
3720 eop_desc->wb.status);
3721 netif_stop_subqueue(netdev, tx_ring->queue_index);
3724 tx_ring->total_bytes += total_bytes;
3725 tx_ring->total_packets += total_packets;
3726 tx_ring->tx_stats.bytes += total_bytes;
3727 tx_ring->tx_stats.packets += total_packets;
3728 adapter->net_stats.tx_bytes += total_bytes;
3729 adapter->net_stats.tx_packets += total_packets;
3730 return (count < tx_ring->count);
3733 #ifdef CONFIG_IGB_LRO
3735 * igb_get_skb_hdr - helper function for LRO header processing
3736 * @skb: pointer to sk_buff to be added to LRO packet
3737 * @iphdr: pointer to ip header structure
3738 * @tcph: pointer to tcp header structure
3739 * @hdr_flags: pointer to header flags
3740 * @priv: pointer to the receive descriptor for the current sk_buff
3742 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3743 u64 *hdr_flags, void *priv)
3745 union e1000_adv_rx_desc *rx_desc = priv;
3746 u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3747 (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3749 /* Verify that this is a valid IPv4 TCP packet */
3750 if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3751 E1000_RXDADV_PKTTYPE_TCP))
3754 /* Set network headers */
3755 skb_reset_network_header(skb);
3756 skb_set_transport_header(skb, ip_hdrlen(skb));
3757 *iphdr = ip_hdr(skb);
3758 *tcph = tcp_hdr(skb);
3759 *hdr_flags = LRO_IPV4 | LRO_TCP;
3764 #endif /* CONFIG_IGB_LRO */
3767 * igb_receive_skb - helper function to handle rx indications
3768 * @ring: pointer to receive ring receving this packet
3769 * @status: descriptor status field as written by hardware
3770 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3771 * @skb: pointer to sk_buff to be indicated to stack
3773 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3774 union e1000_adv_rx_desc * rx_desc,
3775 struct sk_buff *skb)
3777 struct igb_adapter * adapter = ring->adapter;
3778 bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3780 #ifdef CONFIG_IGB_LRO
3781 if (adapter->netdev->features & NETIF_F_LRO &&
3782 skb->ip_summed == CHECKSUM_UNNECESSARY) {
3784 lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3786 le16_to_cpu(rx_desc->wb.upper.vlan),
3789 lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3794 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3795 le16_to_cpu(rx_desc->wb.upper.vlan));
3798 netif_receive_skb(skb);
3799 #ifdef CONFIG_IGB_LRO
3805 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3806 u32 status_err, struct sk_buff *skb)
3808 skb->ip_summed = CHECKSUM_NONE;
3810 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3811 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3813 /* TCP/UDP checksum error bit is set */
3815 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3816 /* let the stack verify checksum errors */
3817 adapter->hw_csum_err++;
3820 /* It must be a TCP or UDP packet with a valid checksum */
3821 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3822 skb->ip_summed = CHECKSUM_UNNECESSARY;
3824 adapter->hw_csum_good++;
3827 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3828 int *work_done, int budget)
3830 struct igb_adapter *adapter = rx_ring->adapter;
3831 struct net_device *netdev = adapter->netdev;
3832 struct pci_dev *pdev = adapter->pdev;
3833 union e1000_adv_rx_desc *rx_desc , *next_rxd;
3834 struct igb_buffer *buffer_info , *next_buffer;
3835 struct sk_buff *skb;
3837 u32 length, hlen, staterr;
3838 bool cleaned = false;
3839 int cleaned_count = 0;
3840 unsigned int total_bytes = 0, total_packets = 0;
3842 i = rx_ring->next_to_clean;
3843 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3844 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3846 while (staterr & E1000_RXD_STAT_DD) {
3847 if (*work_done >= budget)
3850 buffer_info = &rx_ring->buffer_info[i];
3852 /* HW will not DMA in data larger than the given buffer, even
3853 * if it parses the (NFS, of course) header to be larger. In
3854 * that case, it fills the header buffer and spills the rest
3857 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3858 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3859 if (hlen > adapter->rx_ps_hdr_size)
3860 hlen = adapter->rx_ps_hdr_size;
3862 length = le16_to_cpu(rx_desc->wb.upper.length);
3866 skb = buffer_info->skb;
3867 prefetch(skb->data - NET_IP_ALIGN);
3868 buffer_info->skb = NULL;
3869 if (!adapter->rx_ps_hdr_size) {
3870 pci_unmap_single(pdev, buffer_info->dma,
3871 adapter->rx_buffer_len +
3873 PCI_DMA_FROMDEVICE);
3874 skb_put(skb, length);
3878 if (!skb_shinfo(skb)->nr_frags) {
3879 pci_unmap_single(pdev, buffer_info->dma,
3880 adapter->rx_ps_hdr_size +
3882 PCI_DMA_FROMDEVICE);
3887 pci_unmap_page(pdev, buffer_info->page_dma,
3888 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3889 buffer_info->page_dma = 0;
3891 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3893 buffer_info->page_offset,
3896 if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3897 (page_count(buffer_info->page) != 1))
3898 buffer_info->page = NULL;
3900 get_page(buffer_info->page);
3903 skb->data_len += length;
3905 skb->truesize += length;
3909 if (i == rx_ring->count)
3911 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3913 next_buffer = &rx_ring->buffer_info[i];
3915 if (!(staterr & E1000_RXD_STAT_EOP)) {
3916 buffer_info->skb = next_buffer->skb;
3917 buffer_info->dma = next_buffer->dma;
3918 next_buffer->skb = skb;
3919 next_buffer->dma = 0;
3923 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3924 dev_kfree_skb_irq(skb);
3928 total_bytes += skb->len;
3931 igb_rx_checksum_adv(adapter, staterr, skb);
3933 skb->protocol = eth_type_trans(skb, netdev);
3935 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
3938 rx_desc->wb.upper.status_error = 0;
3940 /* return some buffers to hardware, one at a time is too slow */
3941 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3942 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3946 /* use prefetched values */
3948 buffer_info = next_buffer;
3950 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3953 rx_ring->next_to_clean = i;
3954 cleaned_count = IGB_DESC_UNUSED(rx_ring);
3956 #ifdef CONFIG_IGB_LRO
3957 if (rx_ring->lro_used) {
3958 lro_flush_all(&rx_ring->lro_mgr);
3959 rx_ring->lro_used = 0;
3964 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3966 rx_ring->total_packets += total_packets;
3967 rx_ring->total_bytes += total_bytes;
3968 rx_ring->rx_stats.packets += total_packets;
3969 rx_ring->rx_stats.bytes += total_bytes;
3970 adapter->net_stats.rx_bytes += total_bytes;
3971 adapter->net_stats.rx_packets += total_packets;
3977 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3978 * @adapter: address of board private structure
3980 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3983 struct igb_adapter *adapter = rx_ring->adapter;
3984 struct net_device *netdev = adapter->netdev;
3985 struct pci_dev *pdev = adapter->pdev;
3986 union e1000_adv_rx_desc *rx_desc;
3987 struct igb_buffer *buffer_info;
3988 struct sk_buff *skb;
3991 i = rx_ring->next_to_use;
3992 buffer_info = &rx_ring->buffer_info[i];
3994 while (cleaned_count--) {
3995 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3997 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
3998 if (!buffer_info->page) {
3999 buffer_info->page = alloc_page(GFP_ATOMIC);
4000 if (!buffer_info->page) {
4001 adapter->alloc_rx_buff_failed++;
4004 buffer_info->page_offset = 0;
4006 buffer_info->page_offset ^= PAGE_SIZE / 2;
4008 buffer_info->page_dma =
4011 buffer_info->page_offset,
4013 PCI_DMA_FROMDEVICE);
4016 if (!buffer_info->skb) {
4019 if (adapter->rx_ps_hdr_size)
4020 bufsz = adapter->rx_ps_hdr_size;
4022 bufsz = adapter->rx_buffer_len;
4023 bufsz += NET_IP_ALIGN;
4024 skb = netdev_alloc_skb(netdev, bufsz);
4027 adapter->alloc_rx_buff_failed++;
4031 /* Make buffer alignment 2 beyond a 16 byte boundary
4032 * this will result in a 16 byte aligned IP header after
4033 * the 14 byte MAC header is removed
4035 skb_reserve(skb, NET_IP_ALIGN);
4037 buffer_info->skb = skb;
4038 buffer_info->dma = pci_map_single(pdev, skb->data,
4040 PCI_DMA_FROMDEVICE);
4043 /* Refresh the desc even if buffer_addrs didn't change because
4044 * each write-back erases this info. */
4045 if (adapter->rx_ps_hdr_size) {
4046 rx_desc->read.pkt_addr =
4047 cpu_to_le64(buffer_info->page_dma);
4048 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4050 rx_desc->read.pkt_addr =
4051 cpu_to_le64(buffer_info->dma);
4052 rx_desc->read.hdr_addr = 0;
4056 if (i == rx_ring->count)
4058 buffer_info = &rx_ring->buffer_info[i];
4062 if (rx_ring->next_to_use != i) {
4063 rx_ring->next_to_use = i;
4065 i = (rx_ring->count - 1);
4069 /* Force memory writes to complete before letting h/w
4070 * know there are new descriptors to fetch. (Only
4071 * applicable for weak-ordered memory model archs,
4072 * such as IA-64). */
4074 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4084 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4086 struct igb_adapter *adapter = netdev_priv(netdev);
4087 struct mii_ioctl_data *data = if_mii(ifr);
4089 if (adapter->hw.phy.media_type != e1000_media_type_copper)
4094 data->phy_id = adapter->hw.phy.addr;
4097 if (!capable(CAP_NET_ADMIN))
4099 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4116 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4122 return igb_mii_ioctl(netdev, ifr, cmd);
4128 static void igb_vlan_rx_register(struct net_device *netdev,
4129 struct vlan_group *grp)
4131 struct igb_adapter *adapter = netdev_priv(netdev);
4132 struct e1000_hw *hw = &adapter->hw;
4135 igb_irq_disable(adapter);
4136 adapter->vlgrp = grp;
4139 /* enable VLAN tag insert/strip */
4140 ctrl = rd32(E1000_CTRL);
4141 ctrl |= E1000_CTRL_VME;
4142 wr32(E1000_CTRL, ctrl);
4144 /* enable VLAN receive filtering */
4145 rctl = rd32(E1000_RCTL);
4146 rctl &= ~E1000_RCTL_CFIEN;
4147 wr32(E1000_RCTL, rctl);
4148 igb_update_mng_vlan(adapter);
4150 adapter->max_frame_size + VLAN_TAG_SIZE);
4152 /* disable VLAN tag insert/strip */
4153 ctrl = rd32(E1000_CTRL);
4154 ctrl &= ~E1000_CTRL_VME;
4155 wr32(E1000_CTRL, ctrl);
4157 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4158 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4159 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4162 adapter->max_frame_size);
4165 if (!test_bit(__IGB_DOWN, &adapter->state))
4166 igb_irq_enable(adapter);
4169 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4171 struct igb_adapter *adapter = netdev_priv(netdev);
4172 struct e1000_hw *hw = &adapter->hw;
4175 if ((adapter->hw.mng_cookie.status &
4176 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4177 (vid == adapter->mng_vlan_id))
4179 /* add VID to filter table */
4180 index = (vid >> 5) & 0x7F;
4181 vfta = array_rd32(E1000_VFTA, index);
4182 vfta |= (1 << (vid & 0x1F));
4183 igb_write_vfta(&adapter->hw, index, vfta);
4186 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4188 struct igb_adapter *adapter = netdev_priv(netdev);
4189 struct e1000_hw *hw = &adapter->hw;
4192 igb_irq_disable(adapter);
4193 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4195 if (!test_bit(__IGB_DOWN, &adapter->state))
4196 igb_irq_enable(adapter);
4198 if ((adapter->hw.mng_cookie.status &
4199 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4200 (vid == adapter->mng_vlan_id)) {
4201 /* release control to f/w */
4202 igb_release_hw_control(adapter);
4206 /* remove VID from filter table */
4207 index = (vid >> 5) & 0x7F;
4208 vfta = array_rd32(E1000_VFTA, index);
4209 vfta &= ~(1 << (vid & 0x1F));
4210 igb_write_vfta(&adapter->hw, index, vfta);
4213 static void igb_restore_vlan(struct igb_adapter *adapter)
4215 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4217 if (adapter->vlgrp) {
4219 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4220 if (!vlan_group_get_device(adapter->vlgrp, vid))
4222 igb_vlan_rx_add_vid(adapter->netdev, vid);
4227 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4229 struct e1000_mac_info *mac = &adapter->hw.mac;
4233 /* Fiber NICs only allow 1000 gbps Full duplex */
4234 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4235 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4236 dev_err(&adapter->pdev->dev,
4237 "Unsupported Speed/Duplex configuration\n");
4242 case SPEED_10 + DUPLEX_HALF:
4243 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4245 case SPEED_10 + DUPLEX_FULL:
4246 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4248 case SPEED_100 + DUPLEX_HALF:
4249 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4251 case SPEED_100 + DUPLEX_FULL:
4252 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4254 case SPEED_1000 + DUPLEX_FULL:
4256 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4258 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4260 dev_err(&adapter->pdev->dev,
4261 "Unsupported Speed/Duplex configuration\n");
4268 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4270 struct net_device *netdev = pci_get_drvdata(pdev);
4271 struct igb_adapter *adapter = netdev_priv(netdev);
4272 struct e1000_hw *hw = &adapter->hw;
4273 u32 ctrl, rctl, status;
4274 u32 wufc = adapter->wol;
4279 netif_device_detach(netdev);
4281 if (netif_running(netdev))
4284 igb_reset_interrupt_capability(adapter);
4286 igb_free_queues(adapter);
4289 retval = pci_save_state(pdev);
4294 status = rd32(E1000_STATUS);
4295 if (status & E1000_STATUS_LU)
4296 wufc &= ~E1000_WUFC_LNKC;
4299 igb_setup_rctl(adapter);
4300 igb_set_multi(netdev);
4302 /* turn on all-multi mode if wake on multicast is enabled */
4303 if (wufc & E1000_WUFC_MC) {
4304 rctl = rd32(E1000_RCTL);
4305 rctl |= E1000_RCTL_MPE;
4306 wr32(E1000_RCTL, rctl);
4309 ctrl = rd32(E1000_CTRL);
4310 /* advertise wake from D3Cold */
4311 #define E1000_CTRL_ADVD3WUC 0x00100000
4312 /* phy power management enable */
4313 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4314 ctrl |= E1000_CTRL_ADVD3WUC;
4315 wr32(E1000_CTRL, ctrl);
4317 /* Allow time for pending master requests to run */
4318 igb_disable_pcie_master(&adapter->hw);
4320 wr32(E1000_WUC, E1000_WUC_PME_EN);
4321 wr32(E1000_WUFC, wufc);
4324 wr32(E1000_WUFC, 0);
4327 /* make sure adapter isn't asleep if manageability/wol is enabled */
4328 if (wufc || adapter->en_mng_pt) {
4329 pci_enable_wake(pdev, PCI_D3hot, 1);
4330 pci_enable_wake(pdev, PCI_D3cold, 1);
4332 igb_shutdown_fiber_serdes_link_82575(hw);
4333 pci_enable_wake(pdev, PCI_D3hot, 0);
4334 pci_enable_wake(pdev, PCI_D3cold, 0);
4337 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4338 * would have already happened in close and is redundant. */
4339 igb_release_hw_control(adapter);
4341 pci_disable_device(pdev);
4343 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4349 static int igb_resume(struct pci_dev *pdev)
4351 struct net_device *netdev = pci_get_drvdata(pdev);
4352 struct igb_adapter *adapter = netdev_priv(netdev);
4353 struct e1000_hw *hw = &adapter->hw;
4356 pci_set_power_state(pdev, PCI_D0);
4357 pci_restore_state(pdev);
4359 if (adapter->need_ioport)
4360 err = pci_enable_device(pdev);
4362 err = pci_enable_device_mem(pdev);
4365 "igb: Cannot enable PCI device from suspend\n");
4368 pci_set_master(pdev);
4370 pci_enable_wake(pdev, PCI_D3hot, 0);
4371 pci_enable_wake(pdev, PCI_D3cold, 0);
4373 igb_set_interrupt_capability(adapter);
4375 if (igb_alloc_queues(adapter)) {
4376 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4380 /* e1000_power_up_phy(adapter); */
4383 wr32(E1000_WUS, ~0);
4385 if (netif_running(netdev)) {
4386 err = igb_open(netdev);
4391 netif_device_attach(netdev);
4393 /* let the f/w know that the h/w is now under the control of the
4395 igb_get_hw_control(adapter);
4401 static void igb_shutdown(struct pci_dev *pdev)
4403 igb_suspend(pdev, PMSG_SUSPEND);
4406 #ifdef CONFIG_NET_POLL_CONTROLLER
4408 * Polling 'interrupt' - used by things like netconsole to send skbs
4409 * without having to re-enable interrupts. It's not called while
4410 * the interrupt routine is executing.
4412 static void igb_netpoll(struct net_device *netdev)
4414 struct igb_adapter *adapter = netdev_priv(netdev);
4418 igb_irq_disable(adapter);
4419 adapter->flags |= IGB_FLAG_IN_NETPOLL;
4421 for (i = 0; i < adapter->num_tx_queues; i++)
4422 igb_clean_tx_irq(&adapter->tx_ring[i]);
4424 for (i = 0; i < adapter->num_rx_queues; i++)
4425 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4427 adapter->rx_ring[i].napi.weight);
4429 adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4430 igb_irq_enable(adapter);
4432 #endif /* CONFIG_NET_POLL_CONTROLLER */
4435 * igb_io_error_detected - called when PCI error is detected
4436 * @pdev: Pointer to PCI device
4437 * @state: The current pci connection state
4439 * This function is called after a PCI bus error affecting
4440 * this device has been detected.
4442 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4443 pci_channel_state_t state)
4445 struct net_device *netdev = pci_get_drvdata(pdev);
4446 struct igb_adapter *adapter = netdev_priv(netdev);
4448 netif_device_detach(netdev);
4450 if (netif_running(netdev))
4452 pci_disable_device(pdev);
4454 /* Request a slot slot reset. */
4455 return PCI_ERS_RESULT_NEED_RESET;
4459 * igb_io_slot_reset - called after the pci bus has been reset.
4460 * @pdev: Pointer to PCI device
4462 * Restart the card from scratch, as if from a cold-boot. Implementation
4463 * resembles the first-half of the igb_resume routine.
4465 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4467 struct net_device *netdev = pci_get_drvdata(pdev);
4468 struct igb_adapter *adapter = netdev_priv(netdev);
4469 struct e1000_hw *hw = &adapter->hw;
4470 pci_ers_result_t result;
4473 if (adapter->need_ioport)
4474 err = pci_enable_device(pdev);
4476 err = pci_enable_device_mem(pdev);
4480 "Cannot re-enable PCI device after reset.\n");
4481 result = PCI_ERS_RESULT_DISCONNECT;
4483 pci_set_master(pdev);
4484 pci_restore_state(pdev);
4486 pci_enable_wake(pdev, PCI_D3hot, 0);
4487 pci_enable_wake(pdev, PCI_D3cold, 0);
4490 wr32(E1000_WUS, ~0);
4491 result = PCI_ERS_RESULT_RECOVERED;
4494 err = pci_cleanup_aer_uncorrect_error_status(pdev);
4496 dev_err(&pdev->dev, "pci_cleanup_aer_uncorrect_error_status "
4497 "failed 0x%0x\n", err);
4498 /* non-fatal, continue */
4505 * igb_io_resume - called when traffic can start flowing again.
4506 * @pdev: Pointer to PCI device
4508 * This callback is called when the error recovery driver tells us that
4509 * its OK to resume normal operation. Implementation resembles the
4510 * second-half of the igb_resume routine.
4512 static void igb_io_resume(struct pci_dev *pdev)
4514 struct net_device *netdev = pci_get_drvdata(pdev);
4515 struct igb_adapter *adapter = netdev_priv(netdev);
4517 if (netif_running(netdev)) {
4518 if (igb_up(adapter)) {
4519 dev_err(&pdev->dev, "igb_up failed after reset\n");
4524 netif_device_attach(netdev);
4526 /* let the f/w know that the h/w is now under the control of the
4528 igb_get_hw_control(adapter);