1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2007 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.3.0-1.233"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 #define MYRI10GE_ALLOC_ORDER 0
96 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
97 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
99 struct myri10ge_rx_buffer_state {
102 DECLARE_PCI_UNMAP_ADDR(bus)
103 DECLARE_PCI_UNMAP_LEN(len)
106 struct myri10ge_tx_buffer_state {
109 DECLARE_PCI_UNMAP_ADDR(bus)
110 DECLARE_PCI_UNMAP_LEN(len)
113 struct myri10ge_cmd {
119 struct myri10ge_rx_buf {
120 struct mcp_kreq_ether_recv __iomem *lanai; /* lanai ptr for recv ring */
121 u8 __iomem *wc_fifo; /* w/c rx dma addr fifo address */
122 struct mcp_kreq_ether_recv *shadow; /* host shadow of recv ring */
123 struct myri10ge_rx_buffer_state *info;
130 int mask; /* number of rx slots -1 */
134 struct myri10ge_tx_buf {
135 struct mcp_kreq_ether_send __iomem *lanai; /* lanai ptr for sendq */
136 u8 __iomem *wc_fifo; /* w/c send fifo address */
137 struct mcp_kreq_ether_send *req_list; /* host shadow of sendq */
139 struct myri10ge_tx_buffer_state *info;
140 int mask; /* number of transmit slots -1 */
141 int boundary; /* boundary transmits cannot cross */
142 int req ____cacheline_aligned; /* transmit slots submitted */
143 int pkt_start; /* packets started */
144 int done ____cacheline_aligned; /* transmit slots completed */
145 int pkt_done; /* packets completed */
148 struct myri10ge_rx_done {
149 struct mcp_slot *entry;
155 struct myri10ge_priv {
156 int running; /* running? */
157 int csum_flag; /* rx_csums? */
158 struct myri10ge_tx_buf tx; /* transmit ring */
159 struct myri10ge_rx_buf rx_small;
160 struct myri10ge_rx_buf rx_big;
161 struct myri10ge_rx_done rx_done;
164 struct net_device *dev;
165 struct net_device_stats stats;
168 unsigned long board_span;
169 unsigned long iomem_base;
170 __be32 __iomem *irq_claim;
171 __be32 __iomem *irq_deassert;
172 char *mac_addr_string;
173 struct mcp_cmd_response *cmd;
175 struct mcp_irq_data *fw_stats;
176 dma_addr_t fw_stats_bus;
177 struct pci_dev *pdev;
180 unsigned int rdma_tags_available;
182 __be32 __iomem *intr_coal_delay_ptr;
188 wait_queue_head_t down_wq;
189 struct work_struct watchdog_work;
190 struct timer_list watchdog_timer;
191 int watchdog_tx_done;
197 char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
198 char fw_version[128];
202 int adopted_rx_filter_bug;
203 u8 mac_addr[6]; /* eeprom mac address */
204 unsigned long serial_number;
205 int vendor_specific_offset;
206 int fw_multicast_support;
214 static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
215 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
217 static char *myri10ge_fw_name = NULL;
218 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
219 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name\n");
221 static int myri10ge_ecrc_enable = 1;
222 module_param(myri10ge_ecrc_enable, int, S_IRUGO);
223 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E\n");
225 static int myri10ge_max_intr_slots = 1024;
226 module_param(myri10ge_max_intr_slots, int, S_IRUGO);
227 MODULE_PARM_DESC(myri10ge_max_intr_slots, "Interrupt queue slots\n");
229 static int myri10ge_small_bytes = -1; /* -1 == auto */
230 module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR);
231 MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets\n");
233 static int myri10ge_msi = 1; /* enable msi by default */
234 module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
235 MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n");
237 static int myri10ge_intr_coal_delay = 75;
238 module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
239 MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n");
241 static int myri10ge_flow_control = 1;
242 module_param(myri10ge_flow_control, int, S_IRUGO);
243 MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter\n");
245 static int myri10ge_deassert_wait = 1;
246 module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR);
247 MODULE_PARM_DESC(myri10ge_deassert_wait,
248 "Wait when deasserting legacy interrupts\n");
250 static int myri10ge_force_firmware = 0;
251 module_param(myri10ge_force_firmware, int, S_IRUGO);
252 MODULE_PARM_DESC(myri10ge_force_firmware,
253 "Force firmware to assume aligned completions\n");
255 static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
256 module_param(myri10ge_initial_mtu, int, S_IRUGO);
257 MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU\n");
259 static int myri10ge_napi_weight = 64;
260 module_param(myri10ge_napi_weight, int, S_IRUGO);
261 MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight\n");
263 static int myri10ge_watchdog_timeout = 1;
264 module_param(myri10ge_watchdog_timeout, int, S_IRUGO);
265 MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout\n");
267 static int myri10ge_max_irq_loops = 1048576;
268 module_param(myri10ge_max_irq_loops, int, S_IRUGO);
269 MODULE_PARM_DESC(myri10ge_max_irq_loops,
270 "Set stuck legacy IRQ detection threshold\n");
272 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
274 static int myri10ge_debug = -1; /* defaults above */
275 module_param(myri10ge_debug, int, 0);
276 MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
278 static int myri10ge_fill_thresh = 256;
279 module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
280 MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n");
282 static int myri10ge_wcfifo = 0;
283 module_param(myri10ge_wcfifo, int, S_IRUGO);
284 MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n");
286 #define MYRI10GE_FW_OFFSET 1024*1024
287 #define MYRI10GE_HIGHPART_TO_U32(X) \
288 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
289 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
291 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
293 static void myri10ge_set_multicast_list(struct net_device *dev);
295 static inline void put_be32(__be32 val, __be32 __iomem * p)
297 __raw_writel((__force __u32) val, (__force void __iomem *)p);
301 myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
302 struct myri10ge_cmd *data, int atomic)
305 char buf_bytes[sizeof(*buf) + 8];
306 struct mcp_cmd_response *response = mgp->cmd;
307 char __iomem *cmd_addr = mgp->sram + MXGEFW_ETH_CMD;
308 u32 dma_low, dma_high, result, value;
311 /* ensure buf is aligned to 8 bytes */
312 buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8);
314 buf->data0 = htonl(data->data0);
315 buf->data1 = htonl(data->data1);
316 buf->data2 = htonl(data->data2);
317 buf->cmd = htonl(cmd);
318 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
319 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
321 buf->response_addr.low = htonl(dma_low);
322 buf->response_addr.high = htonl(dma_high);
323 response->result = htonl(MYRI10GE_NO_RESPONSE_RESULT);
325 myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf));
327 /* wait up to 15ms. Longest command is the DMA benchmark,
328 * which is capped at 5ms, but runs from a timeout handler
329 * that runs every 7.8ms. So a 15ms timeout leaves us with
333 /* if atomic is set, do not sleep,
334 * and try to get the completion quickly
335 * (1ms will be enough for those commands) */
336 for (sleep_total = 0;
338 && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
342 /* use msleep for most command */
343 for (sleep_total = 0;
345 && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
350 result = ntohl(response->result);
351 value = ntohl(response->data);
352 if (result != MYRI10GE_NO_RESPONSE_RESULT) {
356 } else if (result == MXGEFW_CMD_UNKNOWN) {
359 dev_err(&mgp->pdev->dev,
360 "command %d failed, result = %d\n",
366 dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n",
372 * The eeprom strings on the lanaiX have the format
375 * PT:ddd mmm xx xx:xx:xx xx\0
376 * PV:ddd mmm xx xx:xx:xx xx\0
378 static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
383 ptr = mgp->eeprom_strings;
384 limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
386 while (*ptr != '\0' && ptr < limit) {
387 if (memcmp(ptr, "MAC=", 4) == 0) {
389 mgp->mac_addr_string = ptr;
390 for (i = 0; i < 6; i++) {
391 if ((ptr + 2) > limit)
394 simple_strtoul(ptr, &ptr, 16);
398 if (memcmp((const void *)ptr, "SN=", 3) == 0) {
400 mgp->serial_number = simple_strtoul(ptr, &ptr, 10);
402 while (ptr < limit && *ptr++) ;
408 dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n");
413 * Enable or disable periodic RDMAs from the host to make certain
414 * chipsets resend dropped PCIe messages
417 static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
419 char __iomem *submit;
421 u32 dma_low, dma_high;
424 /* clear confirmation addr */
428 /* send a rdma command to the PCIe engine, and wait for the
429 * response in the confirmation address. The firmware should
430 * write a -1 there to indicate it is alive and well
432 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
433 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
435 buf[0] = htonl(dma_high); /* confirm addr MSW */
436 buf[1] = htonl(dma_low); /* confirm addr LSW */
437 buf[2] = MYRI10GE_NO_CONFIRM_DATA; /* confirm data */
438 buf[3] = htonl(dma_high); /* dummy addr MSW */
439 buf[4] = htonl(dma_low); /* dummy addr LSW */
440 buf[5] = htonl(enable); /* enable? */
442 submit = mgp->sram + MXGEFW_BOOT_DUMMY_RDMA;
444 myri10ge_pio_copy(submit, &buf, sizeof(buf));
445 for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++)
447 if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA)
448 dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n",
449 (enable ? "enable" : "disable"));
453 myri10ge_validate_firmware(struct myri10ge_priv *mgp,
454 struct mcp_gen_header *hdr)
456 struct device *dev = &mgp->pdev->dev;
458 /* check firmware type */
459 if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) {
460 dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type));
464 /* save firmware version for ethtool */
465 strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version));
467 sscanf(mgp->fw_version, "%d.%d.%d", &mgp->fw_ver_major,
468 &mgp->fw_ver_minor, &mgp->fw_ver_tiny);
470 if (!(mgp->fw_ver_major == MXGEFW_VERSION_MAJOR
471 && mgp->fw_ver_minor == MXGEFW_VERSION_MINOR)) {
472 dev_err(dev, "Found firmware version %s\n", mgp->fw_version);
473 dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR,
474 MXGEFW_VERSION_MINOR);
480 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size)
482 unsigned crc, reread_crc;
483 const struct firmware *fw;
484 struct device *dev = &mgp->pdev->dev;
485 struct mcp_gen_header *hdr;
490 if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) {
491 dev_err(dev, "Unable to load %s firmware image via hotplug\n",
494 goto abort_with_nothing;
499 if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET ||
500 fw->size < MCP_HEADER_PTR_OFFSET + 4) {
501 dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size);
507 hdr_offset = ntohl(*(__be32 *) (fw->data + MCP_HEADER_PTR_OFFSET));
508 if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) {
509 dev_err(dev, "Bad firmware file\n");
513 hdr = (void *)(fw->data + hdr_offset);
515 status = myri10ge_validate_firmware(mgp, hdr);
519 crc = crc32(~0, fw->data, fw->size);
520 for (i = 0; i < fw->size; i += 256) {
521 myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET + i,
523 min(256U, (unsigned)(fw->size - i)));
527 /* corruption checking is good for parity recovery and buggy chipset */
528 memcpy_fromio(fw->data, mgp->sram + MYRI10GE_FW_OFFSET, fw->size);
529 reread_crc = crc32(~0, fw->data, fw->size);
530 if (crc != reread_crc) {
531 dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
532 (unsigned)fw->size, reread_crc, crc);
536 *size = (u32) fw->size;
539 release_firmware(fw);
545 static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp)
547 struct mcp_gen_header *hdr;
548 struct device *dev = &mgp->pdev->dev;
549 const size_t bytes = sizeof(struct mcp_gen_header);
553 /* find running firmware header */
554 hdr_offset = ntohl(__raw_readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
556 if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) {
557 dev_err(dev, "Running firmware has bad header offset (%d)\n",
562 /* copy header of running firmware from SRAM to host memory to
563 * validate firmware */
564 hdr = kmalloc(bytes, GFP_KERNEL);
566 dev_err(dev, "could not malloc firmware hdr\n");
569 memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes);
570 status = myri10ge_validate_firmware(mgp, hdr);
573 /* check to see if adopted firmware has bug where adopting
574 * it will cause broadcasts to be filtered unless the NIC
575 * is kept in ALLMULTI mode */
576 if (mgp->fw_ver_major == 1 && mgp->fw_ver_minor == 4 &&
577 mgp->fw_ver_tiny >= 4 && mgp->fw_ver_tiny <= 11) {
578 mgp->adopted_rx_filter_bug = 1;
579 dev_warn(dev, "Adopting fw %d.%d.%d: "
580 "working around rx filter bug\n",
581 mgp->fw_ver_major, mgp->fw_ver_minor,
587 static int myri10ge_load_firmware(struct myri10ge_priv *mgp)
589 char __iomem *submit;
591 u32 dma_low, dma_high, size;
595 status = myri10ge_load_hotplug_firmware(mgp, &size);
597 dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n");
599 /* Do not attempt to adopt firmware if there
604 status = myri10ge_adopt_running_firmware(mgp);
606 dev_err(&mgp->pdev->dev,
607 "failed to adopt running firmware\n");
610 dev_info(&mgp->pdev->dev,
611 "Successfully adopted running firmware\n");
612 if (mgp->tx.boundary == 4096) {
613 dev_warn(&mgp->pdev->dev,
614 "Using firmware currently running on NIC"
616 dev_warn(&mgp->pdev->dev,
617 "performance consider loading optimized "
619 dev_warn(&mgp->pdev->dev, "via hotplug\n");
622 mgp->fw_name = "adopted";
623 mgp->tx.boundary = 2048;
627 /* clear confirmation addr */
631 /* send a reload command to the bootstrap MCP, and wait for the
632 * response in the confirmation address. The firmware should
633 * write a -1 there to indicate it is alive and well
635 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
636 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
638 buf[0] = htonl(dma_high); /* confirm addr MSW */
639 buf[1] = htonl(dma_low); /* confirm addr LSW */
640 buf[2] = MYRI10GE_NO_CONFIRM_DATA; /* confirm data */
642 /* FIX: All newest firmware should un-protect the bottom of
643 * the sram before handoff. However, the very first interfaces
644 * do not. Therefore the handoff copy must skip the first 8 bytes
646 buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */
647 buf[4] = htonl(size - 8); /* length of code */
648 buf[5] = htonl(8); /* where to copy to */
649 buf[6] = htonl(0); /* where to jump to */
651 submit = mgp->sram + MXGEFW_BOOT_HANDOFF;
653 myri10ge_pio_copy(submit, &buf, sizeof(buf));
658 while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20) {
662 if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) {
663 dev_err(&mgp->pdev->dev, "handoff failed\n");
666 dev_info(&mgp->pdev->dev, "handoff confirmed\n");
667 myri10ge_dummy_rdma(mgp, 1);
672 static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr)
674 struct myri10ge_cmd cmd;
677 cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
678 | (addr[2] << 8) | addr[3]);
680 cmd.data1 = ((addr[4] << 8) | (addr[5]));
682 status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0);
686 static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
688 struct myri10ge_cmd cmd;
691 ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL;
692 status = myri10ge_send_cmd(mgp, ctl, &cmd, 0);
696 "myri10ge: %s: Failed to set flow control mode\n",
705 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic)
707 struct myri10ge_cmd cmd;
710 ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC;
711 status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic);
713 printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n",
717 static int myri10ge_dma_test(struct myri10ge_priv *mgp, int test_type)
719 struct myri10ge_cmd cmd;
722 struct page *dmatest_page;
723 dma_addr_t dmatest_bus;
726 dmatest_page = alloc_page(GFP_KERNEL);
729 dmatest_bus = pci_map_page(mgp->pdev, dmatest_page, 0, PAGE_SIZE,
732 /* Run a small DMA test.
733 * The magic multipliers to the length tell the firmware
734 * to do DMA read, write, or read+write tests. The
735 * results are returned in cmd.data0. The upper 16
736 * bits or the return is the number of transfers completed.
737 * The lower 16 bits is the time in 0.5us ticks that the
738 * transfers took to complete.
741 len = mgp->tx.boundary;
743 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
744 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
745 cmd.data2 = len * 0x10000;
746 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
751 mgp->read_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
752 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
753 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
754 cmd.data2 = len * 0x1;
755 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
760 mgp->write_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
762 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
763 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
764 cmd.data2 = len * 0x10001;
765 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
770 mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) /
771 (cmd.data0 & 0xffff);
774 pci_unmap_page(mgp->pdev, dmatest_bus, PAGE_SIZE, DMA_BIDIRECTIONAL);
775 put_page(dmatest_page);
777 if (status != 0 && test_type != MXGEFW_CMD_UNALIGNED_TEST)
778 dev_warn(&mgp->pdev->dev, "DMA %s benchmark failed: %d\n",
784 static int myri10ge_reset(struct myri10ge_priv *mgp)
786 struct myri10ge_cmd cmd;
790 /* try to send a reset command to the card to see if it
792 memset(&cmd, 0, sizeof(cmd));
793 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
795 dev_err(&mgp->pdev->dev, "failed reset\n");
799 (void)myri10ge_dma_test(mgp, MXGEFW_DMA_TEST);
801 /* Now exchange information about interrupts */
803 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
804 memset(mgp->rx_done.entry, 0, bytes);
805 cmd.data0 = (u32) bytes;
806 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
807 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus);
808 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus);
809 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA, &cmd, 0);
812 myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0);
813 mgp->irq_claim = (__iomem __be32 *) (mgp->sram + cmd.data0);
814 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
816 mgp->irq_deassert = (__iomem __be32 *) (mgp->sram + cmd.data0);
818 status |= myri10ge_send_cmd
819 (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0);
820 mgp->intr_coal_delay_ptr = (__iomem __be32 *) (mgp->sram + cmd.data0);
822 dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n");
825 put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
827 memset(mgp->rx_done.entry, 0, bytes);
829 /* reset mcp/driver shared state back to 0 */
832 mgp->tx.pkt_start = 0;
833 mgp->tx.pkt_done = 0;
835 mgp->rx_small.cnt = 0;
836 mgp->rx_done.idx = 0;
837 mgp->rx_done.cnt = 0;
838 mgp->link_changes = 0;
839 status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr);
840 myri10ge_change_pause(mgp, mgp->pause);
841 myri10ge_set_multicast_list(mgp->dev);
846 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst,
847 struct mcp_kreq_ether_recv *src)
852 src->addr_low = htonl(DMA_32BIT_MASK);
853 myri10ge_pio_copy(dst, src, 4 * sizeof(*src));
855 myri10ge_pio_copy(dst + 4, src + 4, 4 * sizeof(*src));
858 put_be32(low, &dst->addr_low);
862 static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, __wsum hw_csum)
864 struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data);
866 if ((skb->protocol == htons(ETH_P_8021Q)) &&
867 (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) ||
868 vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) {
870 skb->ip_summed = CHECKSUM_COMPLETE;
875 myri10ge_rx_skb_build(struct sk_buff *skb, u8 * va,
876 struct skb_frag_struct *rx_frags, int len, int hlen)
878 struct skb_frag_struct *skb_frags;
880 skb->len = skb->data_len = len;
881 skb->truesize = len + sizeof(struct sk_buff);
882 /* attach the page(s) */
884 skb_frags = skb_shinfo(skb)->frags;
886 memcpy(skb_frags, rx_frags, sizeof(*skb_frags));
887 len -= rx_frags->size;
890 skb_shinfo(skb)->nr_frags++;
893 /* pskb_may_pull is not available in irq context, but
894 * skb_pull() (for ether_pad and eth_type_trans()) requires
895 * the beginning of the packet in skb_headlen(), move it
897 skb_copy_to_linear_data(skb, va, hlen);
898 skb_shinfo(skb)->frags[0].page_offset += hlen;
899 skb_shinfo(skb)->frags[0].size -= hlen;
900 skb->data_len -= hlen;
902 skb_pull(skb, MXGEFW_PAD);
906 myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
907 int bytes, int watchdog)
912 if (unlikely(rx->watchdog_needed && !watchdog))
915 /* try to refill entire ring */
916 while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
917 idx = rx->fill_cnt & rx->mask;
918 if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
919 /* we can use part of previous page */
922 /* we need a new page */
924 alloc_pages(GFP_ATOMIC | __GFP_COMP,
925 MYRI10GE_ALLOC_ORDER);
926 if (unlikely(page == NULL)) {
927 if (rx->fill_cnt - rx->cnt < 16)
928 rx->watchdog_needed = 1;
933 rx->bus = pci_map_page(mgp->pdev, page, 0,
937 rx->info[idx].page = rx->page;
938 rx->info[idx].page_offset = rx->page_offset;
939 /* note that this is the address of the start of the
941 pci_unmap_addr_set(&rx->info[idx], bus, rx->bus);
942 rx->shadow[idx].addr_low =
943 htonl(MYRI10GE_LOWPART_TO_U32(rx->bus) + rx->page_offset);
944 rx->shadow[idx].addr_high =
945 htonl(MYRI10GE_HIGHPART_TO_U32(rx->bus));
947 /* start next packet on a cacheline boundary */
948 rx->page_offset += SKB_DATA_ALIGN(bytes);
950 #if MYRI10GE_ALLOC_SIZE > 4096
951 /* don't cross a 4KB boundary */
952 if ((rx->page_offset >> 12) !=
953 ((rx->page_offset + bytes - 1) >> 12))
954 rx->page_offset = (rx->page_offset + 4096) & ~4095;
958 /* copy 8 descriptors to the firmware at a time */
959 if ((idx & 7) == 7) {
960 if (rx->wc_fifo == NULL)
961 myri10ge_submit_8rx(&rx->lanai[idx - 7],
962 &rx->shadow[idx - 7]);
965 myri10ge_pio_copy(rx->wc_fifo,
966 &rx->shadow[idx - 7], 64);
973 myri10ge_unmap_rx_page(struct pci_dev *pdev,
974 struct myri10ge_rx_buffer_state *info, int bytes)
976 /* unmap the recvd page if we're the only or last user of it */
977 if (bytes >= MYRI10GE_ALLOC_SIZE / 2 ||
978 (info->page_offset + 2 * bytes) > MYRI10GE_ALLOC_SIZE) {
979 pci_unmap_page(pdev, (pci_unmap_addr(info, bus)
980 & ~(MYRI10GE_ALLOC_SIZE - 1)),
981 MYRI10GE_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
985 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
986 * page into an skb */
989 myri10ge_rx_done(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
990 int bytes, int len, __wsum csum)
993 struct skb_frag_struct rx_frags[MYRI10GE_MAX_FRAGS_PER_FRAME];
994 int i, idx, hlen, remainder;
995 struct pci_dev *pdev = mgp->pdev;
996 struct net_device *dev = mgp->dev;
1000 idx = rx->cnt & rx->mask;
1001 va = page_address(rx->info[idx].page) + rx->info[idx].page_offset;
1003 /* Fill skb_frag_struct(s) with data from our receive */
1004 for (i = 0, remainder = len; remainder > 0; i++) {
1005 myri10ge_unmap_rx_page(pdev, &rx->info[idx], bytes);
1006 rx_frags[i].page = rx->info[idx].page;
1007 rx_frags[i].page_offset = rx->info[idx].page_offset;
1008 if (remainder < MYRI10GE_ALLOC_SIZE)
1009 rx_frags[i].size = remainder;
1011 rx_frags[i].size = MYRI10GE_ALLOC_SIZE;
1013 idx = rx->cnt & rx->mask;
1014 remainder -= MYRI10GE_ALLOC_SIZE;
1017 hlen = MYRI10GE_HLEN > len ? len : MYRI10GE_HLEN;
1019 /* allocate an skb to attach the page(s) to. */
1021 skb = netdev_alloc_skb(dev, MYRI10GE_HLEN + 16);
1022 if (unlikely(skb == NULL)) {
1023 mgp->stats.rx_dropped++;
1026 put_page(rx_frags[i].page);
1031 /* Attach the pages to the skb, and trim off any padding */
1032 myri10ge_rx_skb_build(skb, va, rx_frags, len, hlen);
1033 if (skb_shinfo(skb)->frags[0].size <= 0) {
1034 put_page(skb_shinfo(skb)->frags[0].page);
1035 skb_shinfo(skb)->nr_frags = 0;
1037 skb->protocol = eth_type_trans(skb, dev);
1039 if (mgp->csum_flag) {
1040 if ((skb->protocol == htons(ETH_P_IP)) ||
1041 (skb->protocol == htons(ETH_P_IPV6))) {
1043 skb->ip_summed = CHECKSUM_COMPLETE;
1045 myri10ge_vlan_ip_csum(skb, csum);
1047 netif_receive_skb(skb);
1048 dev->last_rx = jiffies;
1052 static inline void myri10ge_tx_done(struct myri10ge_priv *mgp, int mcp_index)
1054 struct pci_dev *pdev = mgp->pdev;
1055 struct myri10ge_tx_buf *tx = &mgp->tx;
1056 struct sk_buff *skb;
1060 while (tx->pkt_done != mcp_index) {
1061 idx = tx->done & tx->mask;
1062 skb = tx->info[idx].skb;
1065 tx->info[idx].skb = NULL;
1066 if (tx->info[idx].last) {
1068 tx->info[idx].last = 0;
1071 len = pci_unmap_len(&tx->info[idx], len);
1072 pci_unmap_len_set(&tx->info[idx], len, 0);
1074 mgp->stats.tx_bytes += skb->len;
1075 mgp->stats.tx_packets++;
1076 dev_kfree_skb_irq(skb);
1078 pci_unmap_single(pdev,
1079 pci_unmap_addr(&tx->info[idx],
1084 pci_unmap_page(pdev,
1085 pci_unmap_addr(&tx->info[idx],
1090 /* limit potential for livelock by only handling
1091 * 2 full tx rings per call */
1092 if (unlikely(++limit > 2 * tx->mask))
1095 /* start the queue if we've stopped it */
1096 if (netif_queue_stopped(mgp->dev)
1097 && tx->req - tx->done < (tx->mask >> 1)) {
1099 netif_wake_queue(mgp->dev);
1103 static inline void myri10ge_clean_rx_done(struct myri10ge_priv *mgp, int *limit)
1105 struct myri10ge_rx_done *rx_done = &mgp->rx_done;
1106 unsigned long rx_bytes = 0;
1107 unsigned long rx_packets = 0;
1108 unsigned long rx_ok;
1110 int idx = rx_done->idx;
1111 int cnt = rx_done->cnt;
1115 while (rx_done->entry[idx].length != 0 && *limit != 0) {
1116 length = ntohs(rx_done->entry[idx].length);
1117 rx_done->entry[idx].length = 0;
1118 checksum = csum_unfold(rx_done->entry[idx].checksum);
1119 if (length <= mgp->small_bytes)
1120 rx_ok = myri10ge_rx_done(mgp, &mgp->rx_small,
1124 rx_ok = myri10ge_rx_done(mgp, &mgp->rx_big,
1127 rx_packets += rx_ok;
1128 rx_bytes += rx_ok * (unsigned long)length;
1130 idx = cnt & (myri10ge_max_intr_slots - 1);
1132 /* limit potential for livelock by only handling a
1133 * limited number of frames. */
1138 mgp->stats.rx_packets += rx_packets;
1139 mgp->stats.rx_bytes += rx_bytes;
1141 /* restock receive rings if needed */
1142 if (mgp->rx_small.fill_cnt - mgp->rx_small.cnt < myri10ge_fill_thresh)
1143 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
1144 mgp->small_bytes + MXGEFW_PAD, 0);
1145 if (mgp->rx_big.fill_cnt - mgp->rx_big.cnt < myri10ge_fill_thresh)
1146 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 0);
1150 static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp)
1152 struct mcp_irq_data *stats = mgp->fw_stats;
1154 if (unlikely(stats->stats_updated)) {
1155 if (mgp->link_state != stats->link_up) {
1156 mgp->link_state = stats->link_up;
1157 if (mgp->link_state) {
1158 if (netif_msg_link(mgp))
1160 "myri10ge: %s: link up\n",
1162 netif_carrier_on(mgp->dev);
1163 mgp->link_changes++;
1165 if (netif_msg_link(mgp))
1167 "myri10ge: %s: link down\n",
1169 netif_carrier_off(mgp->dev);
1170 mgp->link_changes++;
1173 if (mgp->rdma_tags_available !=
1174 ntohl(mgp->fw_stats->rdma_tags_available)) {
1175 mgp->rdma_tags_available =
1176 ntohl(mgp->fw_stats->rdma_tags_available);
1177 printk(KERN_WARNING "myri10ge: %s: RDMA timed out! "
1178 "%d tags left\n", mgp->dev->name,
1179 mgp->rdma_tags_available);
1181 mgp->down_cnt += stats->link_down;
1182 if (stats->link_down)
1183 wake_up(&mgp->down_wq);
1187 static int myri10ge_poll(struct net_device *netdev, int *budget)
1189 struct myri10ge_priv *mgp = netdev_priv(netdev);
1190 struct myri10ge_rx_done *rx_done = &mgp->rx_done;
1191 int limit, orig_limit, work_done;
1193 /* process as many rx events as NAPI will allow */
1194 limit = min(*budget, netdev->quota);
1196 myri10ge_clean_rx_done(mgp, &limit);
1197 work_done = orig_limit - limit;
1198 *budget -= work_done;
1199 netdev->quota -= work_done;
1201 if (rx_done->entry[rx_done->idx].length == 0 || !netif_running(netdev)) {
1202 netif_rx_complete(netdev);
1203 put_be32(htonl(3), mgp->irq_claim);
1209 static irqreturn_t myri10ge_intr(int irq, void *arg)
1211 struct myri10ge_priv *mgp = arg;
1212 struct mcp_irq_data *stats = mgp->fw_stats;
1213 struct myri10ge_tx_buf *tx = &mgp->tx;
1214 u32 send_done_count;
1217 /* make sure it is our IRQ, and that the DMA has finished */
1218 if (unlikely(!stats->valid))
1221 /* low bit indicates receives are present, so schedule
1222 * napi poll handler */
1223 if (stats->valid & 1)
1224 netif_rx_schedule(mgp->dev);
1226 if (!mgp->msi_enabled) {
1227 put_be32(0, mgp->irq_deassert);
1228 if (!myri10ge_deassert_wait)
1234 /* Wait for IRQ line to go low, if using INTx */
1238 /* check for transmit completes and receives */
1239 send_done_count = ntohl(stats->send_done_count);
1240 if (send_done_count != tx->pkt_done)
1241 myri10ge_tx_done(mgp, (int)send_done_count);
1242 if (unlikely(i > myri10ge_max_irq_loops)) {
1243 printk(KERN_WARNING "myri10ge: %s: irq stuck?\n",
1246 schedule_work(&mgp->watchdog_work);
1248 if (likely(stats->valid == 0))
1254 myri10ge_check_statblock(mgp);
1256 put_be32(htonl(3), mgp->irq_claim + 1);
1257 return (IRQ_HANDLED);
1261 myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1263 cmd->autoneg = AUTONEG_DISABLE;
1264 cmd->speed = SPEED_10000;
1265 cmd->duplex = DUPLEX_FULL;
1270 myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)
1272 struct myri10ge_priv *mgp = netdev_priv(netdev);
1274 strlcpy(info->driver, "myri10ge", sizeof(info->driver));
1275 strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version));
1276 strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version));
1277 strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info));
1281 myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1283 struct myri10ge_priv *mgp = netdev_priv(netdev);
1284 coal->rx_coalesce_usecs = mgp->intr_coal_delay;
1289 myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1291 struct myri10ge_priv *mgp = netdev_priv(netdev);
1293 mgp->intr_coal_delay = coal->rx_coalesce_usecs;
1294 put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1299 myri10ge_get_pauseparam(struct net_device *netdev,
1300 struct ethtool_pauseparam *pause)
1302 struct myri10ge_priv *mgp = netdev_priv(netdev);
1305 pause->rx_pause = mgp->pause;
1306 pause->tx_pause = mgp->pause;
1310 myri10ge_set_pauseparam(struct net_device *netdev,
1311 struct ethtool_pauseparam *pause)
1313 struct myri10ge_priv *mgp = netdev_priv(netdev);
1315 if (pause->tx_pause != mgp->pause)
1316 return myri10ge_change_pause(mgp, pause->tx_pause);
1317 if (pause->rx_pause != mgp->pause)
1318 return myri10ge_change_pause(mgp, pause->tx_pause);
1319 if (pause->autoneg != 0)
1325 myri10ge_get_ringparam(struct net_device *netdev,
1326 struct ethtool_ringparam *ring)
1328 struct myri10ge_priv *mgp = netdev_priv(netdev);
1330 ring->rx_mini_max_pending = mgp->rx_small.mask + 1;
1331 ring->rx_max_pending = mgp->rx_big.mask + 1;
1332 ring->rx_jumbo_max_pending = 0;
1333 ring->tx_max_pending = mgp->rx_small.mask + 1;
1334 ring->rx_mini_pending = ring->rx_mini_max_pending;
1335 ring->rx_pending = ring->rx_max_pending;
1336 ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
1337 ring->tx_pending = ring->tx_max_pending;
1340 static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1342 struct myri10ge_priv *mgp = netdev_priv(netdev);
1349 static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1351 struct myri10ge_priv *mgp = netdev_priv(netdev);
1353 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1359 static const char myri10ge_gstrings_stats[][ETH_GSTRING_LEN] = {
1360 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1361 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1362 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1363 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1364 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1365 "tx_heartbeat_errors", "tx_window_errors",
1366 /* device-specific stats */
1367 "tx_boundary", "WC", "irq", "MSI",
1368 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1369 "serial_number", "tx_pkt_start", "tx_pkt_done",
1370 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1371 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1372 "link_changes", "link_up", "dropped_link_overflow",
1373 "dropped_link_error_or_filtered",
1374 "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1375 "dropped_unicast_filtered", "dropped_multicast_filtered",
1376 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1377 "dropped_no_big_buffer"
1380 #define MYRI10GE_NET_STATS_LEN 21
1381 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1384 myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data)
1386 switch (stringset) {
1388 memcpy(data, *myri10ge_gstrings_stats,
1389 sizeof(myri10ge_gstrings_stats));
1394 static int myri10ge_get_stats_count(struct net_device *netdev)
1396 return MYRI10GE_STATS_LEN;
1400 myri10ge_get_ethtool_stats(struct net_device *netdev,
1401 struct ethtool_stats *stats, u64 * data)
1403 struct myri10ge_priv *mgp = netdev_priv(netdev);
1406 for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1407 data[i] = ((unsigned long *)&mgp->stats)[i];
1409 data[i++] = (unsigned int)mgp->tx.boundary;
1410 data[i++] = (unsigned int)mgp->wc_enabled;
1411 data[i++] = (unsigned int)mgp->pdev->irq;
1412 data[i++] = (unsigned int)mgp->msi_enabled;
1413 data[i++] = (unsigned int)mgp->read_dma;
1414 data[i++] = (unsigned int)mgp->write_dma;
1415 data[i++] = (unsigned int)mgp->read_write_dma;
1416 data[i++] = (unsigned int)mgp->serial_number;
1417 data[i++] = (unsigned int)mgp->tx.pkt_start;
1418 data[i++] = (unsigned int)mgp->tx.pkt_done;
1419 data[i++] = (unsigned int)mgp->tx.req;
1420 data[i++] = (unsigned int)mgp->tx.done;
1421 data[i++] = (unsigned int)mgp->rx_small.cnt;
1422 data[i++] = (unsigned int)mgp->rx_big.cnt;
1423 data[i++] = (unsigned int)mgp->wake_queue;
1424 data[i++] = (unsigned int)mgp->stop_queue;
1425 data[i++] = (unsigned int)mgp->watchdog_resets;
1426 data[i++] = (unsigned int)mgp->tx_linearized;
1427 data[i++] = (unsigned int)mgp->link_changes;
1428 data[i++] = (unsigned int)ntohl(mgp->fw_stats->link_up);
1429 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_link_overflow);
1431 (unsigned int)ntohl(mgp->fw_stats->dropped_link_error_or_filtered);
1432 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_pause);
1433 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_bad_phy);
1434 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_bad_crc32);
1436 (unsigned int)ntohl(mgp->fw_stats->dropped_unicast_filtered);
1438 (unsigned int)ntohl(mgp->fw_stats->dropped_multicast_filtered);
1439 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_runt);
1440 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_overrun);
1441 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_small_buffer);
1442 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_big_buffer);
1445 static void myri10ge_set_msglevel(struct net_device *netdev, u32 value)
1447 struct myri10ge_priv *mgp = netdev_priv(netdev);
1448 mgp->msg_enable = value;
1451 static u32 myri10ge_get_msglevel(struct net_device *netdev)
1453 struct myri10ge_priv *mgp = netdev_priv(netdev);
1454 return mgp->msg_enable;
1457 static const struct ethtool_ops myri10ge_ethtool_ops = {
1458 .get_settings = myri10ge_get_settings,
1459 .get_drvinfo = myri10ge_get_drvinfo,
1460 .get_coalesce = myri10ge_get_coalesce,
1461 .set_coalesce = myri10ge_set_coalesce,
1462 .get_pauseparam = myri10ge_get_pauseparam,
1463 .set_pauseparam = myri10ge_set_pauseparam,
1464 .get_ringparam = myri10ge_get_ringparam,
1465 .get_rx_csum = myri10ge_get_rx_csum,
1466 .set_rx_csum = myri10ge_set_rx_csum,
1467 .get_tx_csum = ethtool_op_get_tx_csum,
1468 .set_tx_csum = ethtool_op_set_tx_hw_csum,
1469 .get_sg = ethtool_op_get_sg,
1470 .set_sg = ethtool_op_set_sg,
1471 .get_tso = ethtool_op_get_tso,
1472 .set_tso = ethtool_op_set_tso,
1473 .get_strings = myri10ge_get_strings,
1474 .get_stats_count = myri10ge_get_stats_count,
1475 .get_ethtool_stats = myri10ge_get_ethtool_stats,
1476 .set_msglevel = myri10ge_set_msglevel,
1477 .get_msglevel = myri10ge_get_msglevel
1480 static int myri10ge_allocate_rings(struct net_device *dev)
1482 struct myri10ge_priv *mgp;
1483 struct myri10ge_cmd cmd;
1484 int tx_ring_size, rx_ring_size;
1485 int tx_ring_entries, rx_ring_entries;
1489 mgp = netdev_priv(dev);
1491 /* get ring sizes */
1493 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1494 tx_ring_size = cmd.data0;
1495 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1498 rx_ring_size = cmd.data0;
1500 tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
1501 rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr);
1502 mgp->tx.mask = tx_ring_entries - 1;
1503 mgp->rx_small.mask = mgp->rx_big.mask = rx_ring_entries - 1;
1507 /* allocate the host shadow rings */
1509 bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
1510 * sizeof(*mgp->tx.req_list);
1511 mgp->tx.req_bytes = kzalloc(bytes, GFP_KERNEL);
1512 if (mgp->tx.req_bytes == NULL)
1513 goto abort_with_nothing;
1515 /* ensure req_list entries are aligned to 8 bytes */
1516 mgp->tx.req_list = (struct mcp_kreq_ether_send *)
1517 ALIGN((unsigned long)mgp->tx.req_bytes, 8);
1519 bytes = rx_ring_entries * sizeof(*mgp->rx_small.shadow);
1520 mgp->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
1521 if (mgp->rx_small.shadow == NULL)
1522 goto abort_with_tx_req_bytes;
1524 bytes = rx_ring_entries * sizeof(*mgp->rx_big.shadow);
1525 mgp->rx_big.shadow = kzalloc(bytes, GFP_KERNEL);
1526 if (mgp->rx_big.shadow == NULL)
1527 goto abort_with_rx_small_shadow;
1529 /* allocate the host info rings */
1531 bytes = tx_ring_entries * sizeof(*mgp->tx.info);
1532 mgp->tx.info = kzalloc(bytes, GFP_KERNEL);
1533 if (mgp->tx.info == NULL)
1534 goto abort_with_rx_big_shadow;
1536 bytes = rx_ring_entries * sizeof(*mgp->rx_small.info);
1537 mgp->rx_small.info = kzalloc(bytes, GFP_KERNEL);
1538 if (mgp->rx_small.info == NULL)
1539 goto abort_with_tx_info;
1541 bytes = rx_ring_entries * sizeof(*mgp->rx_big.info);
1542 mgp->rx_big.info = kzalloc(bytes, GFP_KERNEL);
1543 if (mgp->rx_big.info == NULL)
1544 goto abort_with_rx_small_info;
1546 /* Fill the receive rings */
1547 mgp->rx_big.cnt = 0;
1548 mgp->rx_small.cnt = 0;
1549 mgp->rx_big.fill_cnt = 0;
1550 mgp->rx_small.fill_cnt = 0;
1551 mgp->rx_small.page_offset = MYRI10GE_ALLOC_SIZE;
1552 mgp->rx_big.page_offset = MYRI10GE_ALLOC_SIZE;
1553 mgp->rx_small.watchdog_needed = 0;
1554 mgp->rx_big.watchdog_needed = 0;
1555 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
1556 mgp->small_bytes + MXGEFW_PAD, 0);
1558 if (mgp->rx_small.fill_cnt < mgp->rx_small.mask + 1) {
1559 printk(KERN_ERR "myri10ge: %s: alloced only %d small bufs\n",
1560 dev->name, mgp->rx_small.fill_cnt);
1561 goto abort_with_rx_small_ring;
1564 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 0);
1565 if (mgp->rx_big.fill_cnt < mgp->rx_big.mask + 1) {
1566 printk(KERN_ERR "myri10ge: %s: alloced only %d big bufs\n",
1567 dev->name, mgp->rx_big.fill_cnt);
1568 goto abort_with_rx_big_ring;
1573 abort_with_rx_big_ring:
1574 for (i = mgp->rx_big.cnt; i < mgp->rx_big.fill_cnt; i++) {
1575 int idx = i & mgp->rx_big.mask;
1576 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_big.info[idx],
1578 put_page(mgp->rx_big.info[idx].page);
1581 abort_with_rx_small_ring:
1582 for (i = mgp->rx_small.cnt; i < mgp->rx_small.fill_cnt; i++) {
1583 int idx = i & mgp->rx_small.mask;
1584 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_small.info[idx],
1585 mgp->small_bytes + MXGEFW_PAD);
1586 put_page(mgp->rx_small.info[idx].page);
1589 kfree(mgp->rx_big.info);
1591 abort_with_rx_small_info:
1592 kfree(mgp->rx_small.info);
1595 kfree(mgp->tx.info);
1597 abort_with_rx_big_shadow:
1598 kfree(mgp->rx_big.shadow);
1600 abort_with_rx_small_shadow:
1601 kfree(mgp->rx_small.shadow);
1603 abort_with_tx_req_bytes:
1604 kfree(mgp->tx.req_bytes);
1605 mgp->tx.req_bytes = NULL;
1606 mgp->tx.req_list = NULL;
1612 static void myri10ge_free_rings(struct net_device *dev)
1614 struct myri10ge_priv *mgp;
1615 struct sk_buff *skb;
1616 struct myri10ge_tx_buf *tx;
1619 mgp = netdev_priv(dev);
1621 for (i = mgp->rx_big.cnt; i < mgp->rx_big.fill_cnt; i++) {
1622 idx = i & mgp->rx_big.mask;
1623 if (i == mgp->rx_big.fill_cnt - 1)
1624 mgp->rx_big.info[idx].page_offset = MYRI10GE_ALLOC_SIZE;
1625 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_big.info[idx],
1627 put_page(mgp->rx_big.info[idx].page);
1630 for (i = mgp->rx_small.cnt; i < mgp->rx_small.fill_cnt; i++) {
1631 idx = i & mgp->rx_small.mask;
1632 if (i == mgp->rx_small.fill_cnt - 1)
1633 mgp->rx_small.info[idx].page_offset =
1634 MYRI10GE_ALLOC_SIZE;
1635 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_small.info[idx],
1636 mgp->small_bytes + MXGEFW_PAD);
1637 put_page(mgp->rx_small.info[idx].page);
1640 while (tx->done != tx->req) {
1641 idx = tx->done & tx->mask;
1642 skb = tx->info[idx].skb;
1645 tx->info[idx].skb = NULL;
1647 len = pci_unmap_len(&tx->info[idx], len);
1648 pci_unmap_len_set(&tx->info[idx], len, 0);
1650 mgp->stats.tx_dropped++;
1651 dev_kfree_skb_any(skb);
1653 pci_unmap_single(mgp->pdev,
1654 pci_unmap_addr(&tx->info[idx],
1659 pci_unmap_page(mgp->pdev,
1660 pci_unmap_addr(&tx->info[idx],
1665 kfree(mgp->rx_big.info);
1667 kfree(mgp->rx_small.info);
1669 kfree(mgp->tx.info);
1671 kfree(mgp->rx_big.shadow);
1673 kfree(mgp->rx_small.shadow);
1675 kfree(mgp->tx.req_bytes);
1676 mgp->tx.req_bytes = NULL;
1677 mgp->tx.req_list = NULL;
1680 static int myri10ge_request_irq(struct myri10ge_priv *mgp)
1682 struct pci_dev *pdev = mgp->pdev;
1686 status = pci_enable_msi(pdev);
1689 "Error %d setting up MSI; falling back to xPIC\n",
1692 mgp->msi_enabled = 1;
1694 mgp->msi_enabled = 0;
1696 status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
1697 mgp->dev->name, mgp);
1699 dev_err(&pdev->dev, "failed to allocate IRQ\n");
1700 if (mgp->msi_enabled)
1701 pci_disable_msi(pdev);
1706 static void myri10ge_free_irq(struct myri10ge_priv *mgp)
1708 struct pci_dev *pdev = mgp->pdev;
1710 free_irq(pdev->irq, mgp);
1711 if (mgp->msi_enabled)
1712 pci_disable_msi(pdev);
1715 static int myri10ge_open(struct net_device *dev)
1717 struct myri10ge_priv *mgp;
1718 struct myri10ge_cmd cmd;
1719 int status, big_pow2;
1721 mgp = netdev_priv(dev);
1723 if (mgp->running != MYRI10GE_ETH_STOPPED)
1726 mgp->running = MYRI10GE_ETH_STARTING;
1727 status = myri10ge_reset(mgp);
1729 printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name);
1730 goto abort_with_nothing;
1733 status = myri10ge_request_irq(mgp);
1735 goto abort_with_nothing;
1737 /* decide what small buffer size to use. For good TCP rx
1738 * performance, it is important to not receive 1514 byte
1739 * frames into jumbo buffers, as it confuses the socket buffer
1740 * accounting code, leading to drops and erratic performance.
1743 if (dev->mtu <= ETH_DATA_LEN)
1744 /* enough for a TCP header */
1745 mgp->small_bytes = (128 > SMP_CACHE_BYTES)
1746 ? (128 - MXGEFW_PAD)
1747 : (SMP_CACHE_BYTES - MXGEFW_PAD);
1749 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1750 mgp->small_bytes = VLAN_ETH_FRAME_LEN;
1752 /* Override the small buffer size? */
1753 if (myri10ge_small_bytes > 0)
1754 mgp->small_bytes = myri10ge_small_bytes;
1756 /* get the lanai pointers to the send and receive rings */
1758 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd, 0);
1760 (struct mcp_kreq_ether_send __iomem *)(mgp->sram + cmd.data0);
1763 myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET, &cmd, 0);
1764 mgp->rx_small.lanai =
1765 (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1767 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
1769 (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1773 "myri10ge: %s: failed to get ring sizes or locations\n",
1775 mgp->running = MYRI10GE_ETH_STOPPED;
1776 goto abort_with_irq;
1779 if (myri10ge_wcfifo && mgp->wc_enabled) {
1780 mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4;
1781 mgp->rx_small.wc_fifo =
1782 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL;
1783 mgp->rx_big.wc_fifo =
1784 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_BIG;
1786 mgp->tx.wc_fifo = NULL;
1787 mgp->rx_small.wc_fifo = NULL;
1788 mgp->rx_big.wc_fifo = NULL;
1791 /* Firmware needs the big buff size as a power of 2. Lie and
1792 * tell him the buffer is larger, because we only use 1
1793 * buffer/pkt, and the mtu will prevent overruns.
1795 big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1796 if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
1797 while ((big_pow2 & (big_pow2 - 1)) != 0)
1799 mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1801 big_pow2 = MYRI10GE_ALLOC_SIZE;
1802 mgp->big_bytes = big_pow2;
1805 status = myri10ge_allocate_rings(dev);
1807 goto abort_with_irq;
1809 /* now give firmware buffers sizes, and MTU */
1810 cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN;
1811 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0);
1812 cmd.data0 = mgp->small_bytes;
1814 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0);
1815 cmd.data0 = big_pow2;
1817 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0);
1819 printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n",
1821 goto abort_with_rings;
1824 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->fw_stats_bus);
1825 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->fw_stats_bus);
1826 cmd.data2 = sizeof(struct mcp_irq_data);
1827 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
1828 if (status == -ENOSYS) {
1829 dma_addr_t bus = mgp->fw_stats_bus;
1830 bus += offsetof(struct mcp_irq_data, send_done_count);
1831 cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
1832 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
1833 status = myri10ge_send_cmd(mgp,
1834 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
1836 /* Firmware cannot support multicast without STATS_DMA_V2 */
1837 mgp->fw_multicast_support = 0;
1839 mgp->fw_multicast_support = 1;
1842 printk(KERN_ERR "myri10ge: %s: Couldn't set stats DMA\n",
1844 goto abort_with_rings;
1847 mgp->link_state = htonl(~0U);
1848 mgp->rdma_tags_available = 15;
1850 netif_poll_enable(mgp->dev); /* must happen prior to any irq */
1852 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0);
1854 printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n",
1856 goto abort_with_rings;
1859 mgp->wake_queue = 0;
1860 mgp->stop_queue = 0;
1861 mgp->running = MYRI10GE_ETH_RUNNING;
1862 mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ;
1863 add_timer(&mgp->watchdog_timer);
1864 netif_wake_queue(dev);
1868 myri10ge_free_rings(dev);
1871 myri10ge_free_irq(mgp);
1874 mgp->running = MYRI10GE_ETH_STOPPED;
1878 static int myri10ge_close(struct net_device *dev)
1880 struct myri10ge_priv *mgp;
1881 struct myri10ge_cmd cmd;
1882 int status, old_down_cnt;
1884 mgp = netdev_priv(dev);
1886 if (mgp->running != MYRI10GE_ETH_RUNNING)
1889 if (mgp->tx.req_bytes == NULL)
1892 del_timer_sync(&mgp->watchdog_timer);
1893 mgp->running = MYRI10GE_ETH_STOPPING;
1894 netif_poll_disable(mgp->dev);
1895 netif_carrier_off(dev);
1896 netif_stop_queue(dev);
1897 old_down_cnt = mgp->down_cnt;
1899 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0);
1901 printk(KERN_ERR "myri10ge: %s: Couldn't bring down link\n",
1904 wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt, HZ);
1905 if (old_down_cnt == mgp->down_cnt)
1906 printk(KERN_ERR "myri10ge: %s never got down irq\n", dev->name);
1908 netif_tx_disable(dev);
1909 myri10ge_free_irq(mgp);
1910 myri10ge_free_rings(dev);
1912 mgp->running = MYRI10GE_ETH_STOPPED;
1916 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1917 * backwards one at a time and handle ring wraps */
1920 myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx,
1921 struct mcp_kreq_ether_send *src, int cnt)
1923 int idx, starting_slot;
1924 starting_slot = tx->req;
1927 idx = (starting_slot + cnt) & tx->mask;
1928 myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src));
1934 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1935 * at most 32 bytes at a time, so as to avoid involving the software
1936 * pio handler in the nic. We re-write the first segment's flags
1937 * to mark them valid only after writing the entire chain.
1941 myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src,
1945 struct mcp_kreq_ether_send __iomem *dstp, *dst;
1946 struct mcp_kreq_ether_send *srcp;
1949 idx = tx->req & tx->mask;
1951 last_flags = src->flags;
1954 dst = dstp = &tx->lanai[idx];
1957 if ((idx + cnt) < tx->mask) {
1958 for (i = 0; i < (cnt - 1); i += 2) {
1959 myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src));
1960 mb(); /* force write every 32 bytes */
1965 /* submit all but the first request, and ensure
1966 * that it is submitted below */
1967 myri10ge_submit_req_backwards(tx, src, cnt);
1971 /* submit the first request */
1972 myri10ge_pio_copy(dstp, srcp, sizeof(*src));
1973 mb(); /* barrier before setting valid flag */
1976 /* re-write the last 32-bits with the valid flags */
1977 src->flags = last_flags;
1978 put_be32(*((__be32 *) src + 3), (__be32 __iomem *) dst + 3);
1984 myri10ge_submit_req_wc(struct myri10ge_tx_buf *tx,
1985 struct mcp_kreq_ether_send *src, int cnt)
1990 myri10ge_pio_copy(tx->wc_fifo, src, 64);
1996 /* pad it to 64 bytes. The src is 64 bytes bigger than it
1997 * needs to be so that we don't overrun it */
1998 myri10ge_pio_copy(tx->wc_fifo + MXGEFW_ETH_SEND_OFFSET(cnt),
2005 * Transmit a packet. We need to split the packet so that a single
2006 * segment does not cross myri10ge->tx.boundary, so this makes segment
2007 * counting tricky. So rather than try to count segments up front, we
2008 * just give up if there are too few segments to hold a reasonably
2009 * fragmented packet currently available. If we run
2010 * out of segments while preparing a packet for DMA, we just linearize
2014 static int myri10ge_xmit(struct sk_buff *skb, struct net_device *dev)
2016 struct myri10ge_priv *mgp = netdev_priv(dev);
2017 struct mcp_kreq_ether_send *req;
2018 struct myri10ge_tx_buf *tx = &mgp->tx;
2019 struct skb_frag_struct *frag;
2022 __be32 high_swapped;
2024 int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments;
2025 u16 pseudo_hdr_offset, cksum_offset;
2026 int cum_len, seglen, boundary, rdma_count;
2031 avail = tx->mask - 1 - (tx->req - tx->done);
2034 max_segments = MXGEFW_MAX_SEND_DESC;
2036 if (skb_is_gso(skb)) {
2037 mss = skb_shinfo(skb)->gso_size;
2038 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
2041 if ((unlikely(avail < max_segments))) {
2042 /* we are out of transmit resources */
2044 netif_stop_queue(dev);
2048 /* Setup checksum offloading, if needed */
2050 pseudo_hdr_offset = 0;
2052 flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST);
2053 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2054 cksum_offset = skb_transport_offset(skb);
2055 pseudo_hdr_offset = cksum_offset + skb->csum_offset;
2056 /* If the headers are excessively large, then we must
2057 * fall back to a software checksum */
2058 if (unlikely(cksum_offset > 255 || pseudo_hdr_offset > 127)) {
2059 if (skb_checksum_help(skb))
2062 pseudo_hdr_offset = 0;
2064 odd_flag = MXGEFW_FLAGS_ALIGN_ODD;
2065 flags |= MXGEFW_FLAGS_CKSUM;
2071 if (mss) { /* TSO */
2072 /* this removes any CKSUM flag from before */
2073 flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST);
2075 /* negative cum_len signifies to the
2076 * send loop that we are still in the
2077 * header portion of the TSO packet.
2078 * TSO header must be at most 134 bytes long */
2079 cum_len = -(skb_transport_offset(skb) + tcp_hdrlen(skb));
2081 /* for TSO, pseudo_hdr_offset holds mss.
2082 * The firmware figures out where to put
2083 * the checksum by parsing the header. */
2084 pseudo_hdr_offset = mss;
2086 /* Mark small packets, and pad out tiny packets */
2087 if (skb->len <= MXGEFW_SEND_SMALL_SIZE) {
2088 flags |= MXGEFW_FLAGS_SMALL;
2090 /* pad frames to at least ETH_ZLEN bytes */
2091 if (unlikely(skb->len < ETH_ZLEN)) {
2092 if (skb_padto(skb, ETH_ZLEN)) {
2093 /* The packet is gone, so we must
2095 mgp->stats.tx_dropped += 1;
2098 /* adjust the len to account for the zero pad
2099 * so that the nic can know how long it is */
2100 skb->len = ETH_ZLEN;
2104 /* map the skb for DMA */
2105 len = skb->len - skb->data_len;
2106 idx = tx->req & tx->mask;
2107 tx->info[idx].skb = skb;
2108 bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE);
2109 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2110 pci_unmap_len_set(&tx->info[idx], len, len);
2112 frag_cnt = skb_shinfo(skb)->nr_frags;
2117 /* "rdma_count" is the number of RDMAs belonging to the
2118 * current packet BEFORE the current send request. For
2119 * non-TSO packets, this is equal to "count".
2120 * For TSO packets, rdma_count needs to be reset
2121 * to 0 after a segment cut.
2123 * The rdma_count field of the send request is
2124 * the number of RDMAs of the packet starting at
2125 * that request. For TSO send requests with one ore more cuts
2126 * in the middle, this is the number of RDMAs starting
2127 * after the last cut in the request. All previous
2128 * segments before the last cut implicitly have 1 RDMA.
2130 * Since the number of RDMAs is not known beforehand,
2131 * it must be filled-in retroactively - after each
2132 * segmentation cut or at the end of the entire packet.
2136 /* Break the SKB or Fragment up into pieces which
2137 * do not cross mgp->tx.boundary */
2138 low = MYRI10GE_LOWPART_TO_U32(bus);
2139 high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus));
2144 if (unlikely(count == max_segments))
2145 goto abort_linearize;
2147 boundary = (low + tx->boundary) & ~(tx->boundary - 1);
2148 seglen = boundary - low;
2151 flags_next = flags & ~MXGEFW_FLAGS_FIRST;
2152 cum_len_next = cum_len + seglen;
2153 if (mss) { /* TSO */
2154 (req - rdma_count)->rdma_count = rdma_count + 1;
2156 if (likely(cum_len >= 0)) { /* payload */
2157 int next_is_first, chop;
2159 chop = (cum_len_next > mss);
2160 cum_len_next = cum_len_next % mss;
2161 next_is_first = (cum_len_next == 0);
2162 flags |= chop * MXGEFW_FLAGS_TSO_CHOP;
2163 flags_next |= next_is_first *
2165 rdma_count |= -(chop | next_is_first);
2166 rdma_count += chop & !next_is_first;
2167 } else if (likely(cum_len_next >= 0)) { /* header ends */
2173 small = (mss <= MXGEFW_SEND_SMALL_SIZE);
2174 flags_next = MXGEFW_FLAGS_TSO_PLD |
2175 MXGEFW_FLAGS_FIRST |
2176 (small * MXGEFW_FLAGS_SMALL);
2179 req->addr_high = high_swapped;
2180 req->addr_low = htonl(low);
2181 req->pseudo_hdr_offset = htons(pseudo_hdr_offset);
2182 req->pad = 0; /* complete solid 16-byte block; does this matter? */
2183 req->rdma_count = 1;
2184 req->length = htons(seglen);
2185 req->cksum_offset = cksum_offset;
2186 req->flags = flags | ((cum_len & 1) * odd_flag);
2190 cum_len = cum_len_next;
2195 if (unlikely(cksum_offset > seglen))
2196 cksum_offset -= seglen;
2200 if (frag_idx == frag_cnt)
2203 /* map next fragment for DMA */
2204 idx = (count + tx->req) & tx->mask;
2205 frag = &skb_shinfo(skb)->frags[frag_idx];
2208 bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset,
2209 len, PCI_DMA_TODEVICE);
2210 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2211 pci_unmap_len_set(&tx->info[idx], len, len);
2214 (req - rdma_count)->rdma_count = rdma_count;
2218 req->flags |= MXGEFW_FLAGS_TSO_LAST;
2219 } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
2220 MXGEFW_FLAGS_FIRST)));
2221 idx = ((count - 1) + tx->req) & tx->mask;
2222 tx->info[idx].last = 1;
2223 if (tx->wc_fifo == NULL)
2224 myri10ge_submit_req(tx, tx->req_list, count);
2226 myri10ge_submit_req_wc(tx, tx->req_list, count);
2228 if ((avail - count) < MXGEFW_MAX_SEND_DESC) {
2230 netif_stop_queue(dev);
2232 dev->trans_start = jiffies;
2236 /* Free any DMA resources we've alloced and clear out the skb
2237 * slot so as to not trip up assertions, and to avoid a
2238 * double-free if linearizing fails */
2240 last_idx = (idx + 1) & tx->mask;
2241 idx = tx->req & tx->mask;
2242 tx->info[idx].skb = NULL;
2244 len = pci_unmap_len(&tx->info[idx], len);
2246 if (tx->info[idx].skb != NULL)
2247 pci_unmap_single(mgp->pdev,
2248 pci_unmap_addr(&tx->info[idx],
2252 pci_unmap_page(mgp->pdev,
2253 pci_unmap_addr(&tx->info[idx],
2256 pci_unmap_len_set(&tx->info[idx], len, 0);
2257 tx->info[idx].skb = NULL;
2259 idx = (idx + 1) & tx->mask;
2260 } while (idx != last_idx);
2261 if (skb_is_gso(skb)) {
2263 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2268 if (skb_linearize(skb))
2271 mgp->tx_linearized++;
2275 dev_kfree_skb_any(skb);
2276 mgp->stats.tx_dropped += 1;
2281 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2283 struct myri10ge_priv *mgp = netdev_priv(dev);
2287 static void myri10ge_set_multicast_list(struct net_device *dev)
2289 struct myri10ge_cmd cmd;
2290 struct myri10ge_priv *mgp;
2291 struct dev_mc_list *mc_list;
2292 __be32 data[2] = { 0, 0 };
2295 mgp = netdev_priv(dev);
2296 /* can be called from atomic contexts,
2297 * pass 1 to force atomicity in myri10ge_send_cmd() */
2298 myri10ge_change_promisc(mgp, dev->flags & IFF_PROMISC, 1);
2300 /* This firmware is known to not support multicast */
2301 if (!mgp->fw_multicast_support)
2304 /* Disable multicast filtering */
2306 err = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_ALLMULTI, &cmd, 1);
2308 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2309 " error status: %d\n", dev->name, err);
2313 if ((dev->flags & IFF_ALLMULTI) || mgp->adopted_rx_filter_bug) {
2314 /* request to disable multicast filtering, so quit here */
2318 /* Flush the filters */
2320 err = myri10ge_send_cmd(mgp, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
2324 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2325 ", error status: %d\n", dev->name, err);
2329 /* Walk the multicast list, and add each address */
2330 for (mc_list = dev->mc_list; mc_list != NULL; mc_list = mc_list->next) {
2331 memcpy(data, &mc_list->dmi_addr, 6);
2332 cmd.data0 = ntohl(data[0]);
2333 cmd.data1 = ntohl(data[1]);
2334 err = myri10ge_send_cmd(mgp, MXGEFW_JOIN_MULTICAST_GROUP,
2338 printk(KERN_ERR "myri10ge: %s: Failed "
2339 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2340 "%d\t", dev->name, err);
2341 printk(KERN_ERR "MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
2342 ((unsigned char *)&mc_list->dmi_addr)[0],
2343 ((unsigned char *)&mc_list->dmi_addr)[1],
2344 ((unsigned char *)&mc_list->dmi_addr)[2],
2345 ((unsigned char *)&mc_list->dmi_addr)[3],
2346 ((unsigned char *)&mc_list->dmi_addr)[4],
2347 ((unsigned char *)&mc_list->dmi_addr)[5]
2352 /* Enable multicast filtering */
2353 err = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_ALLMULTI, &cmd, 1);
2355 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2356 "error status: %d\n", dev->name, err);
2366 static int myri10ge_set_mac_address(struct net_device *dev, void *addr)
2368 struct sockaddr *sa = addr;
2369 struct myri10ge_priv *mgp = netdev_priv(dev);
2372 if (!is_valid_ether_addr(sa->sa_data))
2373 return -EADDRNOTAVAIL;
2375 status = myri10ge_update_mac_address(mgp, sa->sa_data);
2378 "myri10ge: %s: changing mac address failed with %d\n",
2383 /* change the dev structure */
2384 memcpy(dev->dev_addr, sa->sa_data, 6);
2388 static int myri10ge_change_mtu(struct net_device *dev, int new_mtu)
2390 struct myri10ge_priv *mgp = netdev_priv(dev);
2393 if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) {
2394 printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n",
2395 dev->name, new_mtu);
2398 printk(KERN_INFO "%s: changing mtu from %d to %d\n",
2399 dev->name, dev->mtu, new_mtu);
2401 /* if we change the mtu on an active device, we must
2402 * reset the device so the firmware sees the change */
2403 myri10ge_close(dev);
2413 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2414 * Only do it if the bridge is a root port since we don't want to disturb
2415 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2418 static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
2420 struct pci_dev *bridge = mgp->pdev->bus->self;
2421 struct device *dev = &mgp->pdev->dev;
2428 if (!myri10ge_ecrc_enable || !bridge)
2431 /* check that the bridge is a root port */
2432 cap = pci_find_capability(bridge, PCI_CAP_ID_EXP);
2433 pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
2434 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2435 if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
2436 if (myri10ge_ecrc_enable > 1) {
2437 struct pci_dev *old_bridge = bridge;
2439 /* Walk the hierarchy up to the root port
2440 * where ECRC has to be enabled */
2442 bridge = bridge->bus->self;
2445 "Failed to find root port"
2446 " to force ECRC\n");
2450 pci_find_capability(bridge, PCI_CAP_ID_EXP);
2451 pci_read_config_word(bridge,
2452 cap + PCI_CAP_FLAGS, &val);
2453 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2454 } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
2457 "Forcing ECRC on non-root port %s"
2458 " (enabling on root port %s)\n",
2459 pci_name(old_bridge), pci_name(bridge));
2462 "Not enabling ECRC on non-root port %s\n",
2468 cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR);
2472 ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap);
2474 dev_err(dev, "failed reading ext-conf-space of %s\n",
2476 dev_err(dev, "\t pci=nommconf in use? "
2477 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2480 if (!(err_cap & PCI_ERR_CAP_ECRC_GENC))
2483 err_cap |= PCI_ERR_CAP_ECRC_GENE;
2484 pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap);
2485 dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge));
2486 mgp->tx.boundary = 4096;
2487 mgp->fw_name = myri10ge_fw_aligned;
2491 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2492 * when the PCI-E Completion packets are aligned on an 8-byte
2493 * boundary. Some PCI-E chip sets always align Completion packets; on
2494 * the ones that do not, the alignment can be enforced by enabling
2495 * ECRC generation (if supported).
2497 * When PCI-E Completion packets are not aligned, it is actually more
2498 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2500 * If the driver can neither enable ECRC nor verify that it has
2501 * already been enabled, then it must use a firmware image which works
2502 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2503 * should also ensure that it never gives the device a Read-DMA which is
2504 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2505 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2506 * firmware image, and set tx.boundary to 4KB.
2509 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
2510 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
2511 #define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 0x3510
2512 #define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4 0x351b
2513 #define PCI_DEVICE_ID_INTEL_E3000_PCIE 0x2779
2514 #define PCI_DEVICE_ID_INTEL_E3010_PCIE 0x277a
2515 #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140
2516 #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142
2518 static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
2520 struct pci_dev *bridge = mgp->pdev->bus->self;
2522 mgp->tx.boundary = 2048;
2523 mgp->fw_name = myri10ge_fw_unaligned;
2525 if (myri10ge_force_firmware == 0) {
2526 int link_width, exp_cap;
2529 exp_cap = pci_find_capability(mgp->pdev, PCI_CAP_ID_EXP);
2530 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
2531 link_width = (lnk >> 4) & 0x3f;
2533 myri10ge_enable_ecrc(mgp);
2535 /* Check to see if Link is less than 8 or if the
2536 * upstream bridge is known to provide aligned
2538 if (link_width < 8) {
2539 dev_info(&mgp->pdev->dev, "PCIE x%d Link\n",
2541 mgp->tx.boundary = 4096;
2542 mgp->fw_name = myri10ge_fw_aligned;
2543 } else if (bridge &&
2544 /* ServerWorks HT2000/HT1000 */
2545 ((bridge->vendor == PCI_VENDOR_ID_SERVERWORKS
2546 && bridge->device ==
2547 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE)
2548 /* ServerWorks HT2100 */
2549 || (bridge->vendor == PCI_VENDOR_ID_SERVERWORKS
2550 && bridge->device >=
2551 PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST
2552 && bridge->device <=
2553 PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST)
2554 /* All Intel E3000/E3010 PCIE ports */
2555 || (bridge->vendor == PCI_VENDOR_ID_INTEL
2556 && (bridge->device ==
2557 PCI_DEVICE_ID_INTEL_E3000_PCIE
2558 || bridge->device ==
2559 PCI_DEVICE_ID_INTEL_E3010_PCIE))
2560 /* All Intel 6310/6311/6321ESB PCIE ports */
2561 || (bridge->vendor == PCI_VENDOR_ID_INTEL
2562 && bridge->device >=
2563 PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1
2564 && bridge->device <=
2565 PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4)
2566 /* All Intel E5000 PCIE ports */
2567 || (bridge->vendor == PCI_VENDOR_ID_INTEL
2568 && bridge->device >=
2569 PCI_DEVICE_ID_INTEL_E5000_PCIE23
2570 && bridge->device <=
2571 PCI_DEVICE_ID_INTEL_E5000_PCIE47))) {
2572 dev_info(&mgp->pdev->dev,
2573 "Assuming aligned completions (0x%x:0x%x)\n",
2574 bridge->vendor, bridge->device);
2575 mgp->tx.boundary = 4096;
2576 mgp->fw_name = myri10ge_fw_aligned;
2577 } else if (bridge &&
2578 bridge->vendor == PCI_VENDOR_ID_SGI &&
2579 bridge->device == 0x4002 /* TIOCE pcie-port */ ) {
2580 /* this pcie bridge does not support 4K rdma request */
2581 mgp->tx.boundary = 2048;
2582 mgp->fw_name = myri10ge_fw_aligned;
2585 if (myri10ge_force_firmware == 1) {
2586 dev_info(&mgp->pdev->dev,
2587 "Assuming aligned completions (forced)\n");
2588 mgp->tx.boundary = 4096;
2589 mgp->fw_name = myri10ge_fw_aligned;
2591 dev_info(&mgp->pdev->dev,
2592 "Assuming unaligned completions (forced)\n");
2593 mgp->tx.boundary = 2048;
2594 mgp->fw_name = myri10ge_fw_unaligned;
2597 if (myri10ge_fw_name != NULL) {
2598 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
2600 mgp->fw_name = myri10ge_fw_name;
2606 static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state)
2608 struct myri10ge_priv *mgp;
2609 struct net_device *netdev;
2611 mgp = pci_get_drvdata(pdev);
2616 netif_device_detach(netdev);
2617 if (netif_running(netdev)) {
2618 printk(KERN_INFO "myri10ge: closing %s\n", netdev->name);
2620 myri10ge_close(netdev);
2623 myri10ge_dummy_rdma(mgp, 0);
2624 pci_save_state(pdev);
2625 pci_disable_device(pdev);
2627 return pci_set_power_state(pdev, pci_choose_state(pdev, state));
2630 static int myri10ge_resume(struct pci_dev *pdev)
2632 struct myri10ge_priv *mgp;
2633 struct net_device *netdev;
2637 mgp = pci_get_drvdata(pdev);
2641 pci_set_power_state(pdev, 0); /* zeros conf space as a side effect */
2642 msleep(5); /* give card time to respond */
2643 pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2644 if (vendor == 0xffff) {
2645 printk(KERN_ERR "myri10ge: %s: device disappeared!\n",
2650 status = pci_restore_state(pdev);
2654 status = pci_enable_device(pdev);
2656 dev_err(&pdev->dev, "failed to enable device\n");
2660 pci_set_master(pdev);
2662 myri10ge_reset(mgp);
2663 myri10ge_dummy_rdma(mgp, 1);
2665 /* Save configuration space to be restored if the
2666 * nic resets due to a parity error */
2667 pci_save_state(pdev);
2669 if (netif_running(netdev)) {
2671 status = myri10ge_open(netdev);
2674 goto abort_with_enabled;
2677 netif_device_attach(netdev);
2682 pci_disable_device(pdev);
2687 #endif /* CONFIG_PM */
2689 static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp)
2691 struct pci_dev *pdev = mgp->pdev;
2692 int vs = mgp->vendor_specific_offset;
2695 /*enter read32 mode */
2696 pci_write_config_byte(pdev, vs + 0x10, 0x3);
2698 /*read REBOOT_STATUS (0xfffffff0) */
2699 pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0);
2700 pci_read_config_dword(pdev, vs + 0x14, &reboot);
2705 * This watchdog is used to check whether the board has suffered
2706 * from a parity error and needs to be recovered.
2708 static void myri10ge_watchdog(struct work_struct *work)
2710 struct myri10ge_priv *mgp =
2711 container_of(work, struct myri10ge_priv, watchdog_work);
2716 mgp->watchdog_resets++;
2717 pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
2718 if ((cmd & PCI_COMMAND_MASTER) == 0) {
2719 /* Bus master DMA disabled? Check to see
2720 * if the card rebooted due to a parity error
2721 * For now, just report it */
2722 reboot = myri10ge_read_reboot(mgp);
2724 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2725 mgp->dev->name, reboot);
2727 * A rebooted nic will come back with config space as
2728 * it was after power was applied to PCIe bus.
2729 * Attempt to restore config space which was saved
2730 * when the driver was loaded, or the last time the
2731 * nic was resumed from power saving mode.
2733 pci_restore_state(mgp->pdev);
2735 /* save state again for accounting reasons */
2736 pci_save_state(mgp->pdev);
2739 /* if we get back -1's from our slot, perhaps somebody
2740 * powered off our card. Don't try to reset it in
2742 if (cmd == 0xffff) {
2743 pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2744 if (vendor == 0xffff) {
2746 "myri10ge: %s: device disappeared!\n",
2751 /* Perhaps it is a software error. Try to reset */
2753 printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n",
2755 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
2756 mgp->dev->name, mgp->tx.req, mgp->tx.done,
2757 mgp->tx.pkt_start, mgp->tx.pkt_done,
2758 (int)ntohl(mgp->fw_stats->send_done_count));
2760 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
2761 mgp->dev->name, mgp->tx.req, mgp->tx.done,
2762 mgp->tx.pkt_start, mgp->tx.pkt_done,
2763 (int)ntohl(mgp->fw_stats->send_done_count));
2766 myri10ge_close(mgp->dev);
2767 status = myri10ge_load_firmware(mgp);
2769 printk(KERN_ERR "myri10ge: %s: failed to load firmware\n",
2772 myri10ge_open(mgp->dev);
2777 * We use our own timer routine rather than relying upon
2778 * netdev->tx_timeout because we have a very large hardware transmit
2779 * queue. Due to the large queue, the netdev->tx_timeout function
2780 * cannot detect a NIC with a parity error in a timely fashion if the
2781 * NIC is lightly loaded.
2783 static void myri10ge_watchdog_timer(unsigned long arg)
2785 struct myri10ge_priv *mgp;
2787 mgp = (struct myri10ge_priv *)arg;
2789 if (mgp->rx_small.watchdog_needed) {
2790 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
2791 mgp->small_bytes + MXGEFW_PAD, 1);
2792 if (mgp->rx_small.fill_cnt - mgp->rx_small.cnt >=
2793 myri10ge_fill_thresh)
2794 mgp->rx_small.watchdog_needed = 0;
2796 if (mgp->rx_big.watchdog_needed) {
2797 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 1);
2798 if (mgp->rx_big.fill_cnt - mgp->rx_big.cnt >=
2799 myri10ge_fill_thresh)
2800 mgp->rx_big.watchdog_needed = 0;
2803 if (mgp->tx.req != mgp->tx.done &&
2804 mgp->tx.done == mgp->watchdog_tx_done &&
2805 mgp->watchdog_tx_req != mgp->watchdog_tx_done)
2806 /* nic seems like it might be stuck.. */
2807 schedule_work(&mgp->watchdog_work);
2810 mod_timer(&mgp->watchdog_timer,
2811 jiffies + myri10ge_watchdog_timeout * HZ);
2813 mgp->watchdog_tx_done = mgp->tx.done;
2814 mgp->watchdog_tx_req = mgp->tx.req;
2817 static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2819 struct net_device *netdev;
2820 struct myri10ge_priv *mgp;
2821 struct device *dev = &pdev->dev;
2824 int status = -ENXIO;
2829 netdev = alloc_etherdev(sizeof(*mgp));
2830 if (netdev == NULL) {
2831 dev_err(dev, "Could not allocate ethernet device\n");
2835 mgp = netdev_priv(netdev);
2836 memset(mgp, 0, sizeof(*mgp));
2839 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
2840 mgp->pause = myri10ge_flow_control;
2841 mgp->intr_coal_delay = myri10ge_intr_coal_delay;
2842 mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
2843 init_waitqueue_head(&mgp->down_wq);
2845 if (pci_enable_device(pdev)) {
2846 dev_err(&pdev->dev, "pci_enable_device call failed\n");
2848 goto abort_with_netdev;
2850 myri10ge_select_firmware(mgp);
2852 /* Find the vendor-specific cap so we can check
2853 * the reboot register later on */
2854 mgp->vendor_specific_offset
2855 = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
2857 /* Set our max read request to 4KB */
2858 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2860 dev_err(&pdev->dev, "Bad PCI_CAP_ID_EXP location %d\n", cap);
2861 goto abort_with_netdev;
2863 status = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &val);
2865 dev_err(&pdev->dev, "Error %d reading PCI_EXP_DEVCTL\n",
2867 goto abort_with_netdev;
2869 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
2870 status = pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, val);
2872 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
2874 goto abort_with_netdev;
2877 pci_set_master(pdev);
2879 status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
2883 "64-bit pci address mask was refused, trying 32-bit");
2884 status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2887 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
2888 goto abort_with_netdev;
2890 mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
2891 &mgp->cmd_bus, GFP_KERNEL);
2892 if (mgp->cmd == NULL)
2893 goto abort_with_netdev;
2895 mgp->fw_stats = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
2896 &mgp->fw_stats_bus, GFP_KERNEL);
2897 if (mgp->fw_stats == NULL)
2898 goto abort_with_cmd;
2900 mgp->board_span = pci_resource_len(pdev, 0);
2901 mgp->iomem_base = pci_resource_start(pdev, 0);
2903 mgp->wc_enabled = 0;
2905 mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
2906 MTRR_TYPE_WRCOMB, 1);
2908 mgp->wc_enabled = 1;
2910 /* Hack. need to get rid of these magic numbers */
2912 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2913 if (mgp->sram_size > mgp->board_span) {
2914 dev_err(&pdev->dev, "board span %ld bytes too small\n",
2918 mgp->sram = ioremap(mgp->iomem_base, mgp->board_span);
2919 if (mgp->sram == NULL) {
2920 dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n",
2921 mgp->board_span, mgp->iomem_base);
2925 memcpy_fromio(mgp->eeprom_strings,
2926 mgp->sram + mgp->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE,
2927 MYRI10GE_EEPROM_STRINGS_SIZE);
2928 memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2);
2929 status = myri10ge_read_mac_addr(mgp);
2931 goto abort_with_ioremap;
2933 for (i = 0; i < ETH_ALEN; i++)
2934 netdev->dev_addr[i] = mgp->mac_addr[i];
2936 /* allocate rx done ring */
2937 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
2938 mgp->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
2939 &mgp->rx_done.bus, GFP_KERNEL);
2940 if (mgp->rx_done.entry == NULL)
2941 goto abort_with_ioremap;
2942 memset(mgp->rx_done.entry, 0, bytes);
2944 status = myri10ge_load_firmware(mgp);
2946 dev_err(&pdev->dev, "failed to load firmware\n");
2947 goto abort_with_rx_done;
2950 status = myri10ge_reset(mgp);
2952 dev_err(&pdev->dev, "failed reset\n");
2953 goto abort_with_firmware;
2956 pci_set_drvdata(pdev, mgp);
2957 if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU)
2958 myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
2959 if ((myri10ge_initial_mtu + ETH_HLEN) < 68)
2960 myri10ge_initial_mtu = 68;
2961 netdev->mtu = myri10ge_initial_mtu;
2962 netdev->open = myri10ge_open;
2963 netdev->stop = myri10ge_close;
2964 netdev->hard_start_xmit = myri10ge_xmit;
2965 netdev->get_stats = myri10ge_get_stats;
2966 netdev->base_addr = mgp->iomem_base;
2967 netdev->change_mtu = myri10ge_change_mtu;
2968 netdev->set_multicast_list = myri10ge_set_multicast_list;
2969 netdev->set_mac_address = myri10ge_set_mac_address;
2970 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO;
2972 netdev->features |= NETIF_F_HIGHDMA;
2973 netdev->poll = myri10ge_poll;
2974 netdev->weight = myri10ge_napi_weight;
2976 /* make sure we can get an irq, and that MSI can be
2977 * setup (if available). Also ensure netdev->irq
2978 * is set to correct value if MSI is enabled */
2979 status = myri10ge_request_irq(mgp);
2981 goto abort_with_firmware;
2982 netdev->irq = pdev->irq;
2983 myri10ge_free_irq(mgp);
2985 /* Save configuration space to be restored if the
2986 * nic resets due to a parity error */
2987 pci_save_state(pdev);
2989 /* Setup the watchdog timer */
2990 setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
2991 (unsigned long)mgp);
2993 SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
2994 INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
2995 status = register_netdev(netdev);
2997 dev_err(&pdev->dev, "register_netdev failed: %d\n", status);
2998 goto abort_with_state;
3000 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3001 (mgp->msi_enabled ? "MSI" : "xPIC"),
3002 netdev->irq, mgp->tx.boundary, mgp->fw_name,
3003 (mgp->wc_enabled ? "Enabled" : "Disabled"));
3008 pci_restore_state(pdev);
3010 abort_with_firmware:
3011 myri10ge_dummy_rdma(mgp, 0);
3014 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
3015 dma_free_coherent(&pdev->dev, bytes,
3016 mgp->rx_done.entry, mgp->rx_done.bus);
3024 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3026 dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
3027 mgp->fw_stats, mgp->fw_stats_bus);
3030 dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3031 mgp->cmd, mgp->cmd_bus);
3035 free_netdev(netdev);
3042 * Does what is necessary to shutdown one Myrinet device. Called
3043 * once for each Myrinet card by the kernel when a module is
3046 static void myri10ge_remove(struct pci_dev *pdev)
3048 struct myri10ge_priv *mgp;
3049 struct net_device *netdev;
3052 mgp = pci_get_drvdata(pdev);
3056 flush_scheduled_work();
3058 unregister_netdev(netdev);
3060 myri10ge_dummy_rdma(mgp, 0);
3062 /* avoid a memory leak */
3063 pci_restore_state(pdev);
3065 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
3066 dma_free_coherent(&pdev->dev, bytes,
3067 mgp->rx_done.entry, mgp->rx_done.bus);
3073 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3075 dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
3076 mgp->fw_stats, mgp->fw_stats_bus);
3078 dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3079 mgp->cmd, mgp->cmd_bus);
3081 free_netdev(netdev);
3082 pci_set_drvdata(pdev, NULL);
3085 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3087 static struct pci_device_id myri10ge_pci_tbl[] = {
3088 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)},
3092 static struct pci_driver myri10ge_driver = {
3094 .probe = myri10ge_probe,
3095 .remove = myri10ge_remove,
3096 .id_table = myri10ge_pci_tbl,
3098 .suspend = myri10ge_suspend,
3099 .resume = myri10ge_resume,
3103 static __init int myri10ge_init_module(void)
3105 printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name,
3106 MYRI10GE_VERSION_STR);
3107 return pci_register_driver(&myri10ge_driver);
3110 module_init(myri10ge_init_module);
3112 static __exit void myri10ge_cleanup_module(void)
3114 pci_unregister_driver(&myri10ge_driver);
3117 module_exit(myri10ge_cleanup_module);