3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
96 static int nowait = SMC_NOWAIT;
97 module_param(nowait, int, 0400);
98 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
101 * Transmit timeout, default 5 seconds.
103 static int watchdog = 1000;
104 module_param(watchdog, int, 0400);
105 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
107 MODULE_LICENSE("GPL");
108 MODULE_ALIAS("platform:smc91x");
111 * The internal workings of the driver. If you are changing anything
112 * here with the SMC stuff, you should have the datasheet and know
113 * what you are doing.
115 #define CARDNAME "smc91x"
118 * Use power-down feature of the chip
123 * Wait time for memory to be free. This probably shouldn't be
124 * tuned that much, as waiting for this means nothing else happens
127 #define MEMORY_WAIT_TIME 16
130 * The maximum number of processing loops allowed for each call to the
133 #define MAX_IRQ_LOOPS 8
136 * This selects whether TX packets are sent one by one to the SMC91x internal
137 * memory and throttled until transmission completes. This may prevent
138 * RX overruns a litle by keeping much of the memory free for RX packets
139 * but to the expense of reduced TX throughput and increased IRQ overhead.
140 * Note this is not a cure for a too slow data bus or too high IRQ latency.
142 #define THROTTLE_TX_PKTS 0
145 * The MII clock high/low times. 2x this number gives the MII clock period
146 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
151 #define DBG(n, args...) \
153 if (SMC_DEBUG >= (n)) \
157 #define PRINTK(args...) printk(args)
159 #define DBG(n, args...) do { } while(0)
160 #define PRINTK(args...) printk(KERN_DEBUG args)
164 static void PRINT_PKT(u_char *buf, int length)
171 remainder = length % 16;
173 for (i = 0; i < lines ; i ++) {
175 for (cur = 0; cur < 8; cur++) {
179 printk("%02x%02x ", a, b);
183 for (i = 0; i < remainder/2 ; i++) {
187 printk("%02x%02x ", a, b);
192 #define PRINT_PKT(x...) do { } while(0)
196 /* this enables an interrupt in the interrupt mask register */
197 #define SMC_ENABLE_INT(lp, x) do { \
198 unsigned char mask; \
199 spin_lock_irq(&lp->lock); \
200 mask = SMC_GET_INT_MASK(lp); \
202 SMC_SET_INT_MASK(lp, mask); \
203 spin_unlock_irq(&lp->lock); \
206 /* this disables an interrupt from the interrupt mask register */
207 #define SMC_DISABLE_INT(lp, x) do { \
208 unsigned char mask; \
209 spin_lock_irq(&lp->lock); \
210 mask = SMC_GET_INT_MASK(lp); \
212 SMC_SET_INT_MASK(lp, mask); \
213 spin_unlock_irq(&lp->lock); \
217 * Wait while MMU is busy. This is usually in the order of a few nanosecs
218 * if at all, but let's avoid deadlocking the system if the hardware
219 * decides to go south.
221 #define SMC_WAIT_MMU_BUSY(lp) do { \
222 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
223 unsigned long timeout = jiffies + 2; \
224 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
225 if (time_after(jiffies, timeout)) { \
226 printk("%s: timeout %s line %d\n", \
227 dev->name, __FILE__, __LINE__); \
237 * this does a soft reset on the device
239 static void smc_reset(struct net_device *dev)
241 struct smc_local *lp = netdev_priv(dev);
242 void __iomem *ioaddr = lp->base;
243 unsigned int ctl, cfg;
244 struct sk_buff *pending_skb;
246 DBG(2, "%s: %s\n", dev->name, __func__);
248 /* Disable all interrupts, block TX tasklet */
249 spin_lock_irq(&lp->lock);
250 SMC_SELECT_BANK(lp, 2);
251 SMC_SET_INT_MASK(lp, 0);
252 pending_skb = lp->pending_tx_skb;
253 lp->pending_tx_skb = NULL;
254 spin_unlock_irq(&lp->lock);
256 /* free any pending tx skb */
258 dev_kfree_skb(pending_skb);
259 dev->stats.tx_errors++;
260 dev->stats.tx_aborted_errors++;
264 * This resets the registers mostly to defaults, but doesn't
265 * affect EEPROM. That seems unnecessary
267 SMC_SELECT_BANK(lp, 0);
268 SMC_SET_RCR(lp, RCR_SOFTRST);
271 * Setup the Configuration Register
272 * This is necessary because the CONFIG_REG is not affected
275 SMC_SELECT_BANK(lp, 1);
277 cfg = CONFIG_DEFAULT;
280 * Setup for fast accesses if requested. If the card/system
281 * can't handle it then there will be no recovery except for
282 * a hard reset or power cycle
284 if (lp->cfg.flags & SMC91X_NOWAIT)
285 cfg |= CONFIG_NO_WAIT;
288 * Release from possible power-down state
289 * Configuration register is not affected by Soft Reset
291 cfg |= CONFIG_EPH_POWER_EN;
293 SMC_SET_CONFIG(lp, cfg);
295 /* this should pause enough for the chip to be happy */
297 * elaborate? What does the chip _need_? --jgarzik
299 * This seems to be undocumented, but something the original
300 * driver(s) have always done. Suspect undocumented timing
301 * info/determined empirically. --rmk
305 /* Disable transmit and receive functionality */
306 SMC_SELECT_BANK(lp, 0);
307 SMC_SET_RCR(lp, RCR_CLEAR);
308 SMC_SET_TCR(lp, TCR_CLEAR);
310 SMC_SELECT_BANK(lp, 1);
311 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
314 * Set the control register to automatically release successfully
315 * transmitted packets, to make the best use out of our limited
318 if(!THROTTLE_TX_PKTS)
319 ctl |= CTL_AUTO_RELEASE;
321 ctl &= ~CTL_AUTO_RELEASE;
322 SMC_SET_CTL(lp, ctl);
325 SMC_SELECT_BANK(lp, 2);
326 SMC_SET_MMU_CMD(lp, MC_RESET);
327 SMC_WAIT_MMU_BUSY(lp);
331 * Enable Interrupts, Receive, and Transmit
333 static void smc_enable(struct net_device *dev)
335 struct smc_local *lp = netdev_priv(dev);
336 void __iomem *ioaddr = lp->base;
339 DBG(2, "%s: %s\n", dev->name, __func__);
341 /* see the header file for options in TCR/RCR DEFAULT */
342 SMC_SELECT_BANK(lp, 0);
343 SMC_SET_TCR(lp, lp->tcr_cur_mode);
344 SMC_SET_RCR(lp, lp->rcr_cur_mode);
346 SMC_SELECT_BANK(lp, 1);
347 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
349 /* now, enable interrupts */
350 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
351 if (lp->version >= (CHIP_91100 << 4))
353 SMC_SELECT_BANK(lp, 2);
354 SMC_SET_INT_MASK(lp, mask);
357 * From this point the register bank must _NOT_ be switched away
358 * to something else than bank 2 without proper locking against
359 * races with any tasklet or interrupt handlers until smc_shutdown()
360 * or smc_reset() is called.
365 * this puts the device in an inactive state
367 static void smc_shutdown(struct net_device *dev)
369 struct smc_local *lp = netdev_priv(dev);
370 void __iomem *ioaddr = lp->base;
371 struct sk_buff *pending_skb;
373 DBG(2, "%s: %s\n", CARDNAME, __func__);
375 /* no more interrupts for me */
376 spin_lock_irq(&lp->lock);
377 SMC_SELECT_BANK(lp, 2);
378 SMC_SET_INT_MASK(lp, 0);
379 pending_skb = lp->pending_tx_skb;
380 lp->pending_tx_skb = NULL;
381 spin_unlock_irq(&lp->lock);
383 dev_kfree_skb(pending_skb);
385 /* and tell the card to stay away from that nasty outside world */
386 SMC_SELECT_BANK(lp, 0);
387 SMC_SET_RCR(lp, RCR_CLEAR);
388 SMC_SET_TCR(lp, TCR_CLEAR);
391 /* finally, shut the chip down */
392 SMC_SELECT_BANK(lp, 1);
393 SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
398 * This is the procedure to handle the receipt of a packet.
400 static inline void smc_rcv(struct net_device *dev)
402 struct smc_local *lp = netdev_priv(dev);
403 void __iomem *ioaddr = lp->base;
404 unsigned int packet_number, status, packet_len;
406 DBG(3, "%s: %s\n", dev->name, __func__);
408 packet_number = SMC_GET_RXFIFO(lp);
409 if (unlikely(packet_number & RXFIFO_REMPTY)) {
410 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
414 /* read from start of packet */
415 SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
417 /* First two words are status and packet length */
418 SMC_GET_PKT_HDR(lp, status, packet_len);
419 packet_len &= 0x07ff; /* mask off top bits */
420 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
421 dev->name, packet_number, status,
422 packet_len, packet_len);
424 if (unlikely(packet_len == 0 && !(status & RS_ERRORS))) {
425 printk(KERN_ERR "%s: bad memory timings: rxlen %u status %x\n",
426 dev->name, packet_len, status);
427 status |= RS_TOOSHORT;
430 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
431 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
432 /* accept VLAN packets */
433 status &= ~RS_TOOLONG;
436 if (packet_len < 6) {
437 /* bloody hardware */
438 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
439 dev->name, packet_len, status);
440 status |= RS_TOOSHORT;
442 SMC_WAIT_MMU_BUSY(lp);
443 SMC_SET_MMU_CMD(lp, MC_RELEASE);
444 dev->stats.rx_errors++;
445 if (status & RS_ALGNERR)
446 dev->stats.rx_frame_errors++;
447 if (status & (RS_TOOSHORT | RS_TOOLONG))
448 dev->stats.rx_length_errors++;
449 if (status & RS_BADCRC)
450 dev->stats.rx_crc_errors++;
454 unsigned int data_len;
456 /* set multicast stats */
457 if (status & RS_MULTICAST)
458 dev->stats.multicast++;
461 * Actual payload is packet_len - 6 (or 5 if odd byte).
462 * We want skb_reserve(2) and the final ctrl word
463 * (2 bytes, possibly containing the payload odd byte).
464 * Furthermore, we add 2 bytes to allow rounding up to
465 * multiple of 4 bytes on 32 bit buses.
466 * Hence packet_len - 6 + 2 + 2 + 2.
468 skb = dev_alloc_skb(packet_len);
469 if (unlikely(skb == NULL)) {
470 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
472 SMC_WAIT_MMU_BUSY(lp);
473 SMC_SET_MMU_CMD(lp, MC_RELEASE);
474 dev->stats.rx_dropped++;
478 /* Align IP header to 32 bits */
481 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
482 if (lp->version == 0x90)
483 status |= RS_ODDFRAME;
486 * If odd length: packet_len - 5,
487 * otherwise packet_len - 6.
488 * With the trailing ctrl byte it's packet_len - 4.
490 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
491 data = skb_put(skb, data_len);
492 SMC_PULL_DATA(lp, data, packet_len - 4);
494 SMC_WAIT_MMU_BUSY(lp);
495 SMC_SET_MMU_CMD(lp, MC_RELEASE);
497 PRINT_PKT(data, packet_len - 4);
499 skb->protocol = eth_type_trans(skb, dev);
501 dev->stats.rx_packets++;
502 dev->stats.rx_bytes += data_len;
508 * On SMP we have the following problem:
510 * A = smc_hardware_send_pkt()
511 * B = smc_hard_start_xmit()
512 * C = smc_interrupt()
514 * A and B can never be executed simultaneously. However, at least on UP,
515 * it is possible (and even desirable) for C to interrupt execution of
516 * A or B in order to have better RX reliability and avoid overruns.
517 * C, just like A and B, must have exclusive access to the chip and
518 * each of them must lock against any other concurrent access.
519 * Unfortunately this is not possible to have C suspend execution of A or
520 * B taking place on another CPU. On UP this is no an issue since A and B
521 * are run from softirq context and C from hard IRQ context, and there is
522 * no other CPU where concurrent access can happen.
523 * If ever there is a way to force at least B and C to always be executed
524 * on the same CPU then we could use read/write locks to protect against
525 * any other concurrent access and C would always interrupt B. But life
526 * isn't that easy in a SMP world...
528 #define smc_special_trylock(lock) \
531 local_irq_disable(); \
532 __ret = spin_trylock(lock); \
534 local_irq_enable(); \
537 #define smc_special_lock(lock) spin_lock_irq(lock)
538 #define smc_special_unlock(lock) spin_unlock_irq(lock)
540 #define smc_special_trylock(lock) (1)
541 #define smc_special_lock(lock) do { } while (0)
542 #define smc_special_unlock(lock) do { } while (0)
546 * This is called to actually send a packet to the chip.
548 static void smc_hardware_send_pkt(unsigned long data)
550 struct net_device *dev = (struct net_device *)data;
551 struct smc_local *lp = netdev_priv(dev);
552 void __iomem *ioaddr = lp->base;
554 unsigned int packet_no, len;
557 DBG(3, "%s: %s\n", dev->name, __func__);
559 if (!smc_special_trylock(&lp->lock)) {
560 netif_stop_queue(dev);
561 tasklet_schedule(&lp->tx_task);
565 skb = lp->pending_tx_skb;
566 if (unlikely(!skb)) {
567 smc_special_unlock(&lp->lock);
570 lp->pending_tx_skb = NULL;
572 packet_no = SMC_GET_AR(lp);
573 if (unlikely(packet_no & AR_FAILED)) {
574 printk("%s: Memory allocation failed.\n", dev->name);
575 dev->stats.tx_errors++;
576 dev->stats.tx_fifo_errors++;
577 smc_special_unlock(&lp->lock);
581 /* point to the beginning of the packet */
582 SMC_SET_PN(lp, packet_no);
583 SMC_SET_PTR(lp, PTR_AUTOINC);
587 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
588 dev->name, packet_no, len, len, buf);
592 * Send the packet length (+6 for status words, length, and ctl.
593 * The card will pad to 64 bytes with zeroes if packet is too small.
595 SMC_PUT_PKT_HDR(lp, 0, len + 6);
597 /* send the actual data */
598 SMC_PUSH_DATA(lp, buf, len & ~1);
600 /* Send final ctl word with the last byte if there is one */
601 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
604 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
605 * have the effect of having at most one packet queued for TX
606 * in the chip's memory at all time.
608 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
609 * when memory allocation (MC_ALLOC) does not succeed right away.
611 if (THROTTLE_TX_PKTS)
612 netif_stop_queue(dev);
614 /* queue the packet for TX */
615 SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
616 smc_special_unlock(&lp->lock);
618 dev->trans_start = jiffies;
619 dev->stats.tx_packets++;
620 dev->stats.tx_bytes += len;
622 SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
624 done: if (!THROTTLE_TX_PKTS)
625 netif_wake_queue(dev);
631 * Since I am not sure if I will have enough room in the chip's ram
632 * to store the packet, I call this routine which either sends it
633 * now, or set the card to generates an interrupt when ready
636 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
638 struct smc_local *lp = netdev_priv(dev);
639 void __iomem *ioaddr = lp->base;
640 unsigned int numPages, poll_count, status;
642 DBG(3, "%s: %s\n", dev->name, __func__);
644 BUG_ON(lp->pending_tx_skb != NULL);
647 * The MMU wants the number of pages to be the number of 256 bytes
648 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
650 * The 91C111 ignores the size bits, but earlier models don't.
652 * Pkt size for allocating is data length +6 (for additional status
653 * words, length and ctl)
655 * If odd size then last byte is included in ctl word.
657 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
658 if (unlikely(numPages > 7)) {
659 printk("%s: Far too big packet error.\n", dev->name);
660 dev->stats.tx_errors++;
661 dev->stats.tx_dropped++;
666 smc_special_lock(&lp->lock);
668 /* now, try to allocate the memory */
669 SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
672 * Poll the chip for a short amount of time in case the
673 * allocation succeeds quickly.
675 poll_count = MEMORY_WAIT_TIME;
677 status = SMC_GET_INT(lp);
678 if (status & IM_ALLOC_INT) {
679 SMC_ACK_INT(lp, IM_ALLOC_INT);
682 } while (--poll_count);
684 smc_special_unlock(&lp->lock);
686 lp->pending_tx_skb = skb;
688 /* oh well, wait until the chip finds memory later */
689 netif_stop_queue(dev);
690 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
691 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
694 * Allocation succeeded: push packet to the chip's own memory
697 smc_hardware_send_pkt((unsigned long)dev);
704 * This handles a TX interrupt, which is only called when:
705 * - a TX error occurred, or
706 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
708 static void smc_tx(struct net_device *dev)
710 struct smc_local *lp = netdev_priv(dev);
711 void __iomem *ioaddr = lp->base;
712 unsigned int saved_packet, packet_no, tx_status, pkt_len;
714 DBG(3, "%s: %s\n", dev->name, __func__);
716 /* If the TX FIFO is empty then nothing to do */
717 packet_no = SMC_GET_TXFIFO(lp);
718 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
719 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
723 /* select packet to read from */
724 saved_packet = SMC_GET_PN(lp);
725 SMC_SET_PN(lp, packet_no);
727 /* read the first word (status word) from this packet */
728 SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
729 SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
730 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
731 dev->name, tx_status, packet_no);
733 if (!(tx_status & ES_TX_SUC))
734 dev->stats.tx_errors++;
736 if (tx_status & ES_LOSTCARR)
737 dev->stats.tx_carrier_errors++;
739 if (tx_status & (ES_LATCOL | ES_16COL)) {
740 PRINTK("%s: %s occurred on last xmit\n", dev->name,
741 (tx_status & ES_LATCOL) ?
742 "late collision" : "too many collisions");
743 dev->stats.tx_window_errors++;
744 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
745 printk(KERN_INFO "%s: unexpectedly large number of "
746 "bad collisions. Please check duplex "
747 "setting.\n", dev->name);
751 /* kill the packet */
752 SMC_WAIT_MMU_BUSY(lp);
753 SMC_SET_MMU_CMD(lp, MC_FREEPKT);
755 /* Don't restore Packet Number Reg until busy bit is cleared */
756 SMC_WAIT_MMU_BUSY(lp);
757 SMC_SET_PN(lp, saved_packet);
759 /* re-enable transmit */
760 SMC_SELECT_BANK(lp, 0);
761 SMC_SET_TCR(lp, lp->tcr_cur_mode);
762 SMC_SELECT_BANK(lp, 2);
766 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
768 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
770 struct smc_local *lp = netdev_priv(dev);
771 void __iomem *ioaddr = lp->base;
772 unsigned int mii_reg, mask;
774 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
777 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
783 SMC_SET_MII(lp, mii_reg);
785 SMC_SET_MII(lp, mii_reg | MII_MCLK);
790 static unsigned int smc_mii_in(struct net_device *dev, int bits)
792 struct smc_local *lp = netdev_priv(dev);
793 void __iomem *ioaddr = lp->base;
794 unsigned int mii_reg, mask, val;
796 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
797 SMC_SET_MII(lp, mii_reg);
799 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
800 if (SMC_GET_MII(lp) & MII_MDI)
803 SMC_SET_MII(lp, mii_reg);
805 SMC_SET_MII(lp, mii_reg | MII_MCLK);
813 * Reads a register from the MII Management serial interface
815 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
817 struct smc_local *lp = netdev_priv(dev);
818 void __iomem *ioaddr = lp->base;
819 unsigned int phydata;
821 SMC_SELECT_BANK(lp, 3);
824 smc_mii_out(dev, 0xffffffff, 32);
826 /* Start code (01) + read (10) + phyaddr + phyreg */
827 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
829 /* Turnaround (2bits) + phydata */
830 phydata = smc_mii_in(dev, 18);
832 /* Return to idle state */
833 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
835 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
836 __func__, phyaddr, phyreg, phydata);
838 SMC_SELECT_BANK(lp, 2);
843 * Writes a register to the MII Management serial interface
845 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
848 struct smc_local *lp = netdev_priv(dev);
849 void __iomem *ioaddr = lp->base;
851 SMC_SELECT_BANK(lp, 3);
854 smc_mii_out(dev, 0xffffffff, 32);
856 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
857 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
859 /* Return to idle state */
860 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
862 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
863 __func__, phyaddr, phyreg, phydata);
865 SMC_SELECT_BANK(lp, 2);
869 * Finds and reports the PHY address
871 static void smc_phy_detect(struct net_device *dev)
873 struct smc_local *lp = netdev_priv(dev);
876 DBG(2, "%s: %s\n", dev->name, __func__);
881 * Scan all 32 PHY addresses if necessary, starting at
882 * PHY#1 to PHY#31, and then PHY#0 last.
884 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
885 unsigned int id1, id2;
887 /* Read the PHY identifiers */
888 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
889 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
891 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
892 dev->name, id1, id2);
894 /* Make sure it is a valid identifier */
895 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
896 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
897 /* Save the PHY's address */
898 lp->mii.phy_id = phyaddr & 31;
899 lp->phy_type = id1 << 16 | id2;
906 * Sets the PHY to a configuration as determined by the user
908 static int smc_phy_fixed(struct net_device *dev)
910 struct smc_local *lp = netdev_priv(dev);
911 void __iomem *ioaddr = lp->base;
912 int phyaddr = lp->mii.phy_id;
915 DBG(3, "%s: %s\n", dev->name, __func__);
917 /* Enter Link Disable state */
918 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
919 cfg1 |= PHY_CFG1_LNKDIS;
920 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
923 * Set our fixed capabilities
924 * Disable auto-negotiation
929 bmcr |= BMCR_FULLDPLX;
931 if (lp->ctl_rspeed == 100)
932 bmcr |= BMCR_SPEED100;
934 /* Write our capabilities to the phy control register */
935 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
937 /* Re-Configure the Receive/Phy Control register */
938 SMC_SELECT_BANK(lp, 0);
939 SMC_SET_RPC(lp, lp->rpc_cur_mode);
940 SMC_SELECT_BANK(lp, 2);
946 * smc_phy_reset - reset the phy
950 * Issue a software reset for the specified PHY and
951 * wait up to 100ms for the reset to complete. We should
952 * not access the PHY for 50ms after issuing the reset.
954 * The time to wait appears to be dependent on the PHY.
956 * Must be called with lp->lock locked.
958 static int smc_phy_reset(struct net_device *dev, int phy)
960 struct smc_local *lp = netdev_priv(dev);
964 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
966 for (timeout = 2; timeout; timeout--) {
967 spin_unlock_irq(&lp->lock);
969 spin_lock_irq(&lp->lock);
971 bmcr = smc_phy_read(dev, phy, MII_BMCR);
972 if (!(bmcr & BMCR_RESET))
976 return bmcr & BMCR_RESET;
980 * smc_phy_powerdown - powerdown phy
983 * Power down the specified PHY
985 static void smc_phy_powerdown(struct net_device *dev)
987 struct smc_local *lp = netdev_priv(dev);
989 int phy = lp->mii.phy_id;
991 if (lp->phy_type == 0)
994 /* We need to ensure that no calls to smc_phy_configure are
997 cancel_work_sync(&lp->phy_configure);
999 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1000 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1004 * smc_phy_check_media - check the media status and adjust TCR
1006 * @init: set true for initialisation
1008 * Select duplex mode depending on negotiation state. This
1009 * also updates our carrier state.
1011 static void smc_phy_check_media(struct net_device *dev, int init)
1013 struct smc_local *lp = netdev_priv(dev);
1014 void __iomem *ioaddr = lp->base;
1016 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1017 /* duplex state has changed */
1018 if (lp->mii.full_duplex) {
1019 lp->tcr_cur_mode |= TCR_SWFDUP;
1021 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1024 SMC_SELECT_BANK(lp, 0);
1025 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1030 * Configures the specified PHY through the MII management interface
1031 * using Autonegotiation.
1032 * Calls smc_phy_fixed() if the user has requested a certain config.
1033 * If RPC ANEG bit is set, the media selection is dependent purely on
1034 * the selection by the MII (either in the MII BMCR reg or the result
1035 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1036 * is controlled by the RPC SPEED and RPC DPLX bits.
1038 static void smc_phy_configure(struct work_struct *work)
1040 struct smc_local *lp =
1041 container_of(work, struct smc_local, phy_configure);
1042 struct net_device *dev = lp->dev;
1043 void __iomem *ioaddr = lp->base;
1044 int phyaddr = lp->mii.phy_id;
1045 int my_phy_caps; /* My PHY capabilities */
1046 int my_ad_caps; /* My Advertised capabilities */
1049 DBG(3, "%s:smc_program_phy()\n", dev->name);
1051 spin_lock_irq(&lp->lock);
1054 * We should not be called if phy_type is zero.
1056 if (lp->phy_type == 0)
1057 goto smc_phy_configure_exit;
1059 if (smc_phy_reset(dev, phyaddr)) {
1060 printk("%s: PHY reset timed out\n", dev->name);
1061 goto smc_phy_configure_exit;
1065 * Enable PHY Interrupts (for register 18)
1066 * Interrupts listed here are disabled
1068 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1069 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1070 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1071 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1073 /* Configure the Receive/Phy Control register */
1074 SMC_SELECT_BANK(lp, 0);
1075 SMC_SET_RPC(lp, lp->rpc_cur_mode);
1077 /* If the user requested no auto neg, then go set his request */
1078 if (lp->mii.force_media) {
1080 goto smc_phy_configure_exit;
1083 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1084 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1086 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1087 printk(KERN_INFO "Auto negotiation NOT supported\n");
1089 goto smc_phy_configure_exit;
1092 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1094 if (my_phy_caps & BMSR_100BASE4)
1095 my_ad_caps |= ADVERTISE_100BASE4;
1096 if (my_phy_caps & BMSR_100FULL)
1097 my_ad_caps |= ADVERTISE_100FULL;
1098 if (my_phy_caps & BMSR_100HALF)
1099 my_ad_caps |= ADVERTISE_100HALF;
1100 if (my_phy_caps & BMSR_10FULL)
1101 my_ad_caps |= ADVERTISE_10FULL;
1102 if (my_phy_caps & BMSR_10HALF)
1103 my_ad_caps |= ADVERTISE_10HALF;
1105 /* Disable capabilities not selected by our user */
1106 if (lp->ctl_rspeed != 100)
1107 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1109 if (!lp->ctl_rfduplx)
1110 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1112 /* Update our Auto-Neg Advertisement Register */
1113 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1114 lp->mii.advertising = my_ad_caps;
1117 * Read the register back. Without this, it appears that when
1118 * auto-negotiation is restarted, sometimes it isn't ready and
1119 * the link does not come up.
1121 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1123 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1124 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1126 /* Restart auto-negotiation process in order to advertise my caps */
1127 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1129 smc_phy_check_media(dev, 1);
1131 smc_phy_configure_exit:
1132 SMC_SELECT_BANK(lp, 2);
1133 spin_unlock_irq(&lp->lock);
1139 * Purpose: Handle interrupts relating to PHY register 18. This is
1140 * called from the "hard" interrupt handler under our private spinlock.
1142 static void smc_phy_interrupt(struct net_device *dev)
1144 struct smc_local *lp = netdev_priv(dev);
1145 int phyaddr = lp->mii.phy_id;
1148 DBG(2, "%s: %s\n", dev->name, __func__);
1150 if (lp->phy_type == 0)
1154 smc_phy_check_media(dev, 0);
1156 /* Read PHY Register 18, Status Output */
1157 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1158 if ((phy18 & PHY_INT_INT) == 0)
1163 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1165 static void smc_10bt_check_media(struct net_device *dev, int init)
1167 struct smc_local *lp = netdev_priv(dev);
1168 void __iomem *ioaddr = lp->base;
1169 unsigned int old_carrier, new_carrier;
1171 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1173 SMC_SELECT_BANK(lp, 0);
1174 new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1175 SMC_SELECT_BANK(lp, 2);
1177 if (init || (old_carrier != new_carrier)) {
1179 netif_carrier_off(dev);
1181 netif_carrier_on(dev);
1183 if (netif_msg_link(lp))
1184 printk(KERN_INFO "%s: link %s\n", dev->name,
1185 new_carrier ? "up" : "down");
1189 static void smc_eph_interrupt(struct net_device *dev)
1191 struct smc_local *lp = netdev_priv(dev);
1192 void __iomem *ioaddr = lp->base;
1195 smc_10bt_check_media(dev, 0);
1197 SMC_SELECT_BANK(lp, 1);
1198 ctl = SMC_GET_CTL(lp);
1199 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1200 SMC_SET_CTL(lp, ctl);
1201 SMC_SELECT_BANK(lp, 2);
1205 * This is the main routine of the driver, to handle the device when
1206 * it needs some attention.
1208 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1210 struct net_device *dev = dev_id;
1211 struct smc_local *lp = netdev_priv(dev);
1212 void __iomem *ioaddr = lp->base;
1213 int status, mask, timeout, card_stats;
1216 DBG(3, "%s: %s\n", dev->name, __func__);
1218 spin_lock(&lp->lock);
1220 /* A preamble may be used when there is a potential race
1221 * between the interruptible transmit functions and this
1223 SMC_INTERRUPT_PREAMBLE;
1225 saved_pointer = SMC_GET_PTR(lp);
1226 mask = SMC_GET_INT_MASK(lp);
1227 SMC_SET_INT_MASK(lp, 0);
1229 /* set a timeout value, so I don't stay here forever */
1230 timeout = MAX_IRQ_LOOPS;
1233 status = SMC_GET_INT(lp);
1235 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1236 dev->name, status, mask,
1237 ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1238 meminfo = SMC_GET_MIR(lp);
1239 SMC_SELECT_BANK(lp, 2); meminfo; }),
1246 if (status & IM_TX_INT) {
1247 /* do this before RX as it will free memory quickly */
1248 DBG(3, "%s: TX int\n", dev->name);
1250 SMC_ACK_INT(lp, IM_TX_INT);
1251 if (THROTTLE_TX_PKTS)
1252 netif_wake_queue(dev);
1253 } else if (status & IM_RCV_INT) {
1254 DBG(3, "%s: RX irq\n", dev->name);
1256 } else if (status & IM_ALLOC_INT) {
1257 DBG(3, "%s: Allocation irq\n", dev->name);
1258 tasklet_hi_schedule(&lp->tx_task);
1259 mask &= ~IM_ALLOC_INT;
1260 } else if (status & IM_TX_EMPTY_INT) {
1261 DBG(3, "%s: TX empty\n", dev->name);
1262 mask &= ~IM_TX_EMPTY_INT;
1265 SMC_SELECT_BANK(lp, 0);
1266 card_stats = SMC_GET_COUNTER(lp);
1267 SMC_SELECT_BANK(lp, 2);
1269 /* single collisions */
1270 dev->stats.collisions += card_stats & 0xF;
1273 /* multiple collisions */
1274 dev->stats.collisions += card_stats & 0xF;
1275 } else if (status & IM_RX_OVRN_INT) {
1276 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1277 ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1278 eph_st = SMC_GET_EPH_STATUS(lp);
1279 SMC_SELECT_BANK(lp, 2); eph_st; }));
1280 SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1281 dev->stats.rx_errors++;
1282 dev->stats.rx_fifo_errors++;
1283 } else if (status & IM_EPH_INT) {
1284 smc_eph_interrupt(dev);
1285 } else if (status & IM_MDINT) {
1286 SMC_ACK_INT(lp, IM_MDINT);
1287 smc_phy_interrupt(dev);
1288 } else if (status & IM_ERCV_INT) {
1289 SMC_ACK_INT(lp, IM_ERCV_INT);
1290 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1292 } while (--timeout);
1294 /* restore register states */
1295 SMC_SET_PTR(lp, saved_pointer);
1296 SMC_SET_INT_MASK(lp, mask);
1297 spin_unlock(&lp->lock);
1299 #ifndef CONFIG_NET_POLL_CONTROLLER
1300 if (timeout == MAX_IRQ_LOOPS)
1301 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1304 DBG(3, "%s: Interrupt done (%d loops)\n",
1305 dev->name, MAX_IRQ_LOOPS - timeout);
1308 * We return IRQ_HANDLED unconditionally here even if there was
1309 * nothing to do. There is a possibility that a packet might
1310 * get enqueued into the chip right after TX_EMPTY_INT is raised
1311 * but just before the CPU acknowledges the IRQ.
1312 * Better take an unneeded IRQ in some occasions than complexifying
1313 * the code for all cases.
1318 #ifdef CONFIG_NET_POLL_CONTROLLER
1320 * Polling receive - used by netconsole and other diagnostic tools
1321 * to allow network i/o with interrupts disabled.
1323 static void smc_poll_controller(struct net_device *dev)
1325 disable_irq(dev->irq);
1326 smc_interrupt(dev->irq, dev);
1327 enable_irq(dev->irq);
1331 /* Our watchdog timed out. Called by the networking layer */
1332 static void smc_timeout(struct net_device *dev)
1334 struct smc_local *lp = netdev_priv(dev);
1335 void __iomem *ioaddr = lp->base;
1336 int status, mask, eph_st, meminfo, fifo;
1338 DBG(2, "%s: %s\n", dev->name, __func__);
1340 spin_lock_irq(&lp->lock);
1341 status = SMC_GET_INT(lp);
1342 mask = SMC_GET_INT_MASK(lp);
1343 fifo = SMC_GET_FIFO(lp);
1344 SMC_SELECT_BANK(lp, 0);
1345 eph_st = SMC_GET_EPH_STATUS(lp);
1346 meminfo = SMC_GET_MIR(lp);
1347 SMC_SELECT_BANK(lp, 2);
1348 spin_unlock_irq(&lp->lock);
1349 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1350 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1351 dev->name, status, mask, meminfo, fifo, eph_st );
1357 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1358 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1359 * which calls schedule(). Hence we use a work queue.
1361 if (lp->phy_type != 0)
1362 schedule_work(&lp->phy_configure);
1364 /* We can accept TX packets again */
1365 dev->trans_start = jiffies;
1366 netif_wake_queue(dev);
1370 * This routine will, depending on the values passed to it,
1371 * either make it accept multicast packets, go into
1372 * promiscuous mode (for TCPDUMP and cousins) or accept
1373 * a select set of multicast packets
1375 static void smc_set_multicast_list(struct net_device *dev)
1377 struct smc_local *lp = netdev_priv(dev);
1378 void __iomem *ioaddr = lp->base;
1379 unsigned char multicast_table[8];
1380 int update_multicast = 0;
1382 DBG(2, "%s: %s\n", dev->name, __func__);
1384 if (dev->flags & IFF_PROMISC) {
1385 DBG(2, "%s: RCR_PRMS\n", dev->name);
1386 lp->rcr_cur_mode |= RCR_PRMS;
1389 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1390 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1391 when promiscuous mode is turned on.
1395 * Here, I am setting this to accept all multicast packets.
1396 * I don't need to zero the multicast table, because the flag is
1397 * checked before the table is
1399 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1400 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1401 lp->rcr_cur_mode |= RCR_ALMUL;
1405 * This sets the internal hardware table to filter out unwanted
1406 * multicast packets before they take up memory.
1408 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1409 * address are the offset into the table. If that bit is 1, then the
1410 * multicast packet is accepted. Otherwise, it's dropped silently.
1412 * To use the 6 bits as an offset into the table, the high 3 bits are
1413 * the number of the 8 bit register, while the low 3 bits are the bit
1414 * within that register.
1416 else if (dev->mc_count) {
1418 struct dev_mc_list *cur_addr;
1420 /* table for flipping the order of 3 bits */
1421 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1423 /* start with a table of all zeros: reject all */
1424 memset(multicast_table, 0, sizeof(multicast_table));
1426 cur_addr = dev->mc_list;
1427 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1430 /* do we have a pointer here? */
1433 /* make sure this is a multicast address -
1434 shouldn't this be a given if we have it here ? */
1435 if (!(*cur_addr->dmi_addr & 1))
1438 /* only use the low order bits */
1439 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1441 /* do some messy swapping to put the bit in the right spot */
1442 multicast_table[invert3[position&7]] |=
1443 (1<<invert3[(position>>3)&7]);
1446 /* be sure I get rid of flags I might have set */
1447 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1449 /* now, the table can be loaded into the chipset */
1450 update_multicast = 1;
1452 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1453 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1456 * since I'm disabling all multicast entirely, I need to
1457 * clear the multicast list
1459 memset(multicast_table, 0, sizeof(multicast_table));
1460 update_multicast = 1;
1463 spin_lock_irq(&lp->lock);
1464 SMC_SELECT_BANK(lp, 0);
1465 SMC_SET_RCR(lp, lp->rcr_cur_mode);
1466 if (update_multicast) {
1467 SMC_SELECT_BANK(lp, 3);
1468 SMC_SET_MCAST(lp, multicast_table);
1470 SMC_SELECT_BANK(lp, 2);
1471 spin_unlock_irq(&lp->lock);
1476 * Open and Initialize the board
1478 * Set up everything, reset the card, etc..
1481 smc_open(struct net_device *dev)
1483 struct smc_local *lp = netdev_priv(dev);
1485 DBG(2, "%s: %s\n", dev->name, __func__);
1488 * Check that the address is valid. If its not, refuse
1489 * to bring the device up. The user must specify an
1490 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1492 if (!is_valid_ether_addr(dev->dev_addr)) {
1493 PRINTK("%s: no valid ethernet hw addr\n", __func__);
1497 /* Setup the default Register Modes */
1498 lp->tcr_cur_mode = TCR_DEFAULT;
1499 lp->rcr_cur_mode = RCR_DEFAULT;
1500 lp->rpc_cur_mode = RPC_DEFAULT |
1501 lp->cfg.leda << RPC_LSXA_SHFT |
1502 lp->cfg.ledb << RPC_LSXB_SHFT;
1505 * If we are not using a MII interface, we need to
1506 * monitor our own carrier signal to detect faults.
1508 if (lp->phy_type == 0)
1509 lp->tcr_cur_mode |= TCR_MON_CSN;
1511 /* reset the hardware */
1515 /* Configure the PHY, initialize the link state */
1516 if (lp->phy_type != 0)
1517 smc_phy_configure(&lp->phy_configure);
1519 spin_lock_irq(&lp->lock);
1520 smc_10bt_check_media(dev, 1);
1521 spin_unlock_irq(&lp->lock);
1524 netif_start_queue(dev);
1531 * this makes the board clean up everything that it can
1532 * and not talk to the outside world. Caused by
1533 * an 'ifconfig ethX down'
1535 static int smc_close(struct net_device *dev)
1537 struct smc_local *lp = netdev_priv(dev);
1539 DBG(2, "%s: %s\n", dev->name, __func__);
1541 netif_stop_queue(dev);
1542 netif_carrier_off(dev);
1544 /* clear everything */
1546 tasklet_kill(&lp->tx_task);
1547 smc_phy_powerdown(dev);
1555 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1557 struct smc_local *lp = netdev_priv(dev);
1563 if (lp->phy_type != 0) {
1564 spin_lock_irq(&lp->lock);
1565 ret = mii_ethtool_gset(&lp->mii, cmd);
1566 spin_unlock_irq(&lp->lock);
1568 cmd->supported = SUPPORTED_10baseT_Half |
1569 SUPPORTED_10baseT_Full |
1570 SUPPORTED_TP | SUPPORTED_AUI;
1572 if (lp->ctl_rspeed == 10)
1573 cmd->speed = SPEED_10;
1574 else if (lp->ctl_rspeed == 100)
1575 cmd->speed = SPEED_100;
1577 cmd->autoneg = AUTONEG_DISABLE;
1578 cmd->transceiver = XCVR_INTERNAL;
1580 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1589 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1591 struct smc_local *lp = netdev_priv(dev);
1594 if (lp->phy_type != 0) {
1595 spin_lock_irq(&lp->lock);
1596 ret = mii_ethtool_sset(&lp->mii, cmd);
1597 spin_unlock_irq(&lp->lock);
1599 if (cmd->autoneg != AUTONEG_DISABLE ||
1600 cmd->speed != SPEED_10 ||
1601 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1602 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1605 // lp->port = cmd->port;
1606 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1608 // if (netif_running(dev))
1609 // smc_set_port(dev);
1618 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1620 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1621 strncpy(info->version, version, sizeof(info->version));
1622 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1625 static int smc_ethtool_nwayreset(struct net_device *dev)
1627 struct smc_local *lp = netdev_priv(dev);
1630 if (lp->phy_type != 0) {
1631 spin_lock_irq(&lp->lock);
1632 ret = mii_nway_restart(&lp->mii);
1633 spin_unlock_irq(&lp->lock);
1639 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1641 struct smc_local *lp = netdev_priv(dev);
1642 return lp->msg_enable;
1645 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1647 struct smc_local *lp = netdev_priv(dev);
1648 lp->msg_enable = level;
1651 static const struct ethtool_ops smc_ethtool_ops = {
1652 .get_settings = smc_ethtool_getsettings,
1653 .set_settings = smc_ethtool_setsettings,
1654 .get_drvinfo = smc_ethtool_getdrvinfo,
1656 .get_msglevel = smc_ethtool_getmsglevel,
1657 .set_msglevel = smc_ethtool_setmsglevel,
1658 .nway_reset = smc_ethtool_nwayreset,
1659 .get_link = ethtool_op_get_link,
1660 // .get_eeprom = smc_ethtool_geteeprom,
1661 // .set_eeprom = smc_ethtool_seteeprom,
1667 * This routine has a simple purpose -- make the SMC chip generate an
1668 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1671 * does this still work?
1673 * I just deleted auto_irq.c, since it was never built...
1676 static int __devinit smc_findirq(struct smc_local *lp)
1678 void __iomem *ioaddr = lp->base;
1680 unsigned long cookie;
1682 DBG(2, "%s: %s\n", CARDNAME, __func__);
1684 cookie = probe_irq_on();
1687 * What I try to do here is trigger an ALLOC_INT. This is done
1688 * by allocating a small chunk of memory, which will give an interrupt
1691 /* enable ALLOCation interrupts ONLY */
1692 SMC_SELECT_BANK(lp, 2);
1693 SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1696 * Allocate 512 bytes of memory. Note that the chip was just
1697 * reset so all the memory is available
1699 SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1702 * Wait until positive that the interrupt has been generated
1707 int_status = SMC_GET_INT(lp);
1708 if (int_status & IM_ALLOC_INT)
1709 break; /* got the interrupt */
1710 } while (--timeout);
1713 * there is really nothing that I can do here if timeout fails,
1714 * as autoirq_report will return a 0 anyway, which is what I
1715 * want in this case. Plus, the clean up is needed in both
1719 /* and disable all interrupts again */
1720 SMC_SET_INT_MASK(lp, 0);
1722 /* and return what I found */
1723 return probe_irq_off(cookie);
1727 * Function: smc_probe(unsigned long ioaddr)
1730 * Tests to see if a given ioaddr points to an SMC91x chip.
1731 * Returns a 0 on success
1734 * (1) see if the high byte of BANK_SELECT is 0x33
1735 * (2) compare the ioaddr with the base register's address
1736 * (3) see if I recognize the chip ID in the appropriate register
1738 * Here I do typical initialization tasks.
1740 * o Initialize the structure if needed
1741 * o print out my vanity message if not done so already
1742 * o print out what type of hardware is detected
1743 * o print out the ethernet address
1745 * o set up my private data
1746 * o configure the dev structure with my subroutines
1747 * o actually GRAB the irq.
1750 static int __devinit smc_probe(struct net_device *dev, void __iomem *ioaddr,
1751 unsigned long irq_flags)
1753 struct smc_local *lp = netdev_priv(dev);
1754 static int version_printed = 0;
1756 unsigned int val, revision_register;
1757 const char *version_string;
1759 DBG(2, "%s: %s\n", CARDNAME, __func__);
1761 /* First, see if the high byte is 0x33 */
1762 val = SMC_CURRENT_BANK(lp);
1763 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1764 if ((val & 0xFF00) != 0x3300) {
1765 if ((val & 0xFF) == 0x33) {
1767 "%s: Detected possible byte-swapped interface"
1768 " at IOADDR %p\n", CARDNAME, ioaddr);
1775 * The above MIGHT indicate a device, but I need to write to
1776 * further test this.
1778 SMC_SELECT_BANK(lp, 0);
1779 val = SMC_CURRENT_BANK(lp);
1780 if ((val & 0xFF00) != 0x3300) {
1786 * well, we've already written once, so hopefully another
1787 * time won't hurt. This time, I need to switch the bank
1788 * register to bank 1, so I can access the base address
1791 SMC_SELECT_BANK(lp, 1);
1792 val = SMC_GET_BASE(lp);
1793 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1794 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1795 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1796 CARDNAME, ioaddr, val);
1800 * check if the revision register is something that I
1801 * recognize. These might need to be added to later,
1802 * as future revisions could be added.
1804 SMC_SELECT_BANK(lp, 3);
1805 revision_register = SMC_GET_REV(lp);
1806 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1807 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1808 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1809 /* I don't recognize this chip, so... */
1810 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1811 ", Contact author.\n", CARDNAME,
1812 ioaddr, revision_register);
1818 /* At this point I'll assume that the chip is an SMC91x. */
1819 if (version_printed++ == 0)
1820 printk("%s", version);
1822 /* fill in some of the fields */
1823 dev->base_addr = (unsigned long)ioaddr;
1825 lp->version = revision_register & 0xff;
1826 spin_lock_init(&lp->lock);
1828 /* Get the MAC address */
1829 SMC_SELECT_BANK(lp, 1);
1830 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1832 /* now, reset the chip, and put it into a known state */
1836 * If dev->irq is 0, then the device has to be banged on to see
1839 * This banging doesn't always detect the IRQ, for unknown reasons.
1840 * a workaround is to reset the chip and try again.
1842 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1843 * be what is requested on the command line. I don't do that, mostly
1844 * because the card that I have uses a non-standard method of accessing
1845 * the IRQs, and because this _should_ work in most configurations.
1847 * Specifying an IRQ is done with the assumption that the user knows
1848 * what (s)he is doing. No checking is done!!!!
1855 dev->irq = smc_findirq(lp);
1858 /* kick the card and try again */
1862 if (dev->irq == 0) {
1863 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1868 dev->irq = irq_canonicalize(dev->irq);
1870 /* Fill in the fields of the device structure with ethernet values. */
1873 dev->open = smc_open;
1874 dev->stop = smc_close;
1875 dev->hard_start_xmit = smc_hard_start_xmit;
1876 dev->tx_timeout = smc_timeout;
1877 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1878 dev->set_multicast_list = smc_set_multicast_list;
1879 dev->ethtool_ops = &smc_ethtool_ops;
1880 #ifdef CONFIG_NET_POLL_CONTROLLER
1881 dev->poll_controller = smc_poll_controller;
1884 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1885 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1887 lp->mii.phy_id_mask = 0x1f;
1888 lp->mii.reg_num_mask = 0x1f;
1889 lp->mii.force_media = 0;
1890 lp->mii.full_duplex = 0;
1892 lp->mii.mdio_read = smc_phy_read;
1893 lp->mii.mdio_write = smc_phy_write;
1896 * Locate the phy, if any.
1898 if (lp->version >= (CHIP_91100 << 4))
1899 smc_phy_detect(dev);
1901 /* then shut everything down to save power */
1903 smc_phy_powerdown(dev);
1905 /* Set default parameters */
1906 lp->msg_enable = NETIF_MSG_LINK;
1907 lp->ctl_rfduplx = 0;
1908 lp->ctl_rspeed = 10;
1910 if (lp->version >= (CHIP_91100 << 4)) {
1911 lp->ctl_rfduplx = 1;
1912 lp->ctl_rspeed = 100;
1916 retval = request_irq(dev->irq, &smc_interrupt, irq_flags, dev->name, dev);
1920 #ifdef CONFIG_ARCH_PXA
1921 # ifdef SMC_USE_PXA_DMA
1922 lp->cfg.flags |= SMC91X_USE_DMA;
1924 if (lp->cfg.flags & SMC91X_USE_DMA) {
1925 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1926 smc_pxa_dma_irq, NULL);
1932 retval = register_netdev(dev);
1934 /* now, print out the card info, in a short format.. */
1935 printk("%s: %s (rev %d) at %p IRQ %d",
1936 dev->name, version_string, revision_register & 0x0f,
1937 lp->base, dev->irq);
1939 if (dev->dma != (unsigned char)-1)
1940 printk(" DMA %d", dev->dma);
1943 lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
1944 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1946 if (!is_valid_ether_addr(dev->dev_addr)) {
1947 printk("%s: Invalid ethernet MAC address. Please "
1948 "set using ifconfig\n", dev->name);
1950 /* Print the Ethernet address */
1951 printk("%s: Ethernet addr: %pM\n",
1952 dev->name, dev->dev_addr);
1955 if (lp->phy_type == 0) {
1956 PRINTK("%s: No PHY found\n", dev->name);
1957 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
1958 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
1959 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
1960 PRINTK("%s: PHY LAN83C180\n", dev->name);
1965 #ifdef CONFIG_ARCH_PXA
1966 if (retval && dev->dma != (unsigned char)-1)
1967 pxa_free_dma(dev->dma);
1972 static int smc_enable_device(struct platform_device *pdev)
1974 struct net_device *ndev = platform_get_drvdata(pdev);
1975 struct smc_local *lp = netdev_priv(ndev);
1976 unsigned long flags;
1977 unsigned char ecor, ecsr;
1979 struct resource * res;
1981 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
1986 * Map the attribute space. This is overkill, but clean.
1988 addr = ioremap(res->start, ATTRIB_SIZE);
1993 * Reset the device. We must disable IRQs around this
1994 * since a reset causes the IRQ line become active.
1996 local_irq_save(flags);
1997 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
1998 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
1999 readb(addr + (ECOR << SMC_IO_SHIFT));
2002 * Wait 100us for the chip to reset.
2007 * The device will ignore all writes to the enable bit while
2008 * reset is asserted, even if the reset bit is cleared in the
2009 * same write. Must clear reset first, then enable the device.
2011 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2012 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2015 * Set the appropriate byte/word mode.
2017 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2020 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2021 local_irq_restore(flags);
2026 * Wait for the chip to wake up. We could poll the control
2027 * register in the main register space, but that isn't mapped
2028 * yet. We know this is going to take 750us.
2035 static int smc_request_attrib(struct platform_device *pdev,
2036 struct net_device *ndev)
2038 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2039 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2044 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2050 static void smc_release_attrib(struct platform_device *pdev,
2051 struct net_device *ndev)
2053 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2054 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2057 release_mem_region(res->start, ATTRIB_SIZE);
2060 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2062 if (SMC_CAN_USE_DATACS) {
2063 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2064 struct smc_local *lp = netdev_priv(ndev);
2069 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2070 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2074 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2078 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2080 if (SMC_CAN_USE_DATACS) {
2081 struct smc_local *lp = netdev_priv(ndev);
2082 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2085 iounmap(lp->datacs);
2090 release_mem_region(res->start, SMC_DATA_EXTENT);
2097 * dev->base_addr == 0, try to find all possible locations
2098 * dev->base_addr > 0x1ff, this is the address to check
2099 * dev->base_addr == <anything else>, return failure code
2102 * 0 --> there is a device
2103 * anything else, error
2105 static int __devinit smc_drv_probe(struct platform_device *pdev)
2107 struct smc91x_platdata *pd = pdev->dev.platform_data;
2108 struct smc_local *lp;
2109 struct net_device *ndev;
2110 struct resource *res, *ires;
2111 unsigned int __iomem *addr;
2112 unsigned long irq_flags = SMC_IRQ_FLAGS;
2115 ndev = alloc_etherdev(sizeof(struct smc_local));
2117 printk("%s: could not allocate device.\n", CARDNAME);
2121 SET_NETDEV_DEV(ndev, &pdev->dev);
2123 /* get configuration from platform data, only allow use of
2124 * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2127 lp = netdev_priv(ndev);
2130 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2131 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2133 lp->cfg.flags |= (SMC_CAN_USE_8BIT) ? SMC91X_USE_8BIT : 0;
2134 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2135 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2136 lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2139 if (!lp->cfg.leda && !lp->cfg.ledb) {
2140 lp->cfg.leda = RPC_LSA_DEFAULT;
2141 lp->cfg.ledb = RPC_LSB_DEFAULT;
2144 ndev->dma = (unsigned char)-1;
2146 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2148 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2151 goto out_free_netdev;
2155 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2157 goto out_free_netdev;
2160 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2163 goto out_release_io;
2166 ndev->irq = ires->start;
2168 if (ires->flags & IRQF_TRIGGER_MASK)
2169 irq_flags = ires->flags & IRQF_TRIGGER_MASK;
2171 ret = smc_request_attrib(pdev, ndev);
2173 goto out_release_io;
2174 #if defined(CONFIG_SA1100_ASSABET)
2175 NCR_0 |= NCR_ENET_OSC_EN;
2177 platform_set_drvdata(pdev, ndev);
2178 ret = smc_enable_device(pdev);
2180 goto out_release_attrib;
2182 addr = ioremap(res->start, SMC_IO_EXTENT);
2185 goto out_release_attrib;
2188 #ifdef CONFIG_ARCH_PXA
2190 struct smc_local *lp = netdev_priv(ndev);
2191 lp->device = &pdev->dev;
2192 lp->physaddr = res->start;
2196 ret = smc_probe(ndev, addr, irq_flags);
2200 smc_request_datacs(pdev, ndev);
2205 platform_set_drvdata(pdev, NULL);
2208 smc_release_attrib(pdev, ndev);
2210 release_mem_region(res->start, SMC_IO_EXTENT);
2214 printk("%s: not found (%d).\n", CARDNAME, ret);
2219 static int __devexit smc_drv_remove(struct platform_device *pdev)
2221 struct net_device *ndev = platform_get_drvdata(pdev);
2222 struct smc_local *lp = netdev_priv(ndev);
2223 struct resource *res;
2225 platform_set_drvdata(pdev, NULL);
2227 unregister_netdev(ndev);
2229 free_irq(ndev->irq, ndev);
2231 #ifdef CONFIG_ARCH_PXA
2232 if (ndev->dma != (unsigned char)-1)
2233 pxa_free_dma(ndev->dma);
2237 smc_release_datacs(pdev,ndev);
2238 smc_release_attrib(pdev,ndev);
2240 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2242 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2243 release_mem_region(res->start, SMC_IO_EXTENT);
2250 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2252 struct net_device *ndev = platform_get_drvdata(dev);
2255 if (netif_running(ndev)) {
2256 netif_device_detach(ndev);
2258 smc_phy_powerdown(ndev);
2264 static int smc_drv_resume(struct platform_device *dev)
2266 struct net_device *ndev = platform_get_drvdata(dev);
2269 struct smc_local *lp = netdev_priv(ndev);
2270 smc_enable_device(dev);
2271 if (netif_running(ndev)) {
2274 if (lp->phy_type != 0)
2275 smc_phy_configure(&lp->phy_configure);
2276 netif_device_attach(ndev);
2282 static struct platform_driver smc_driver = {
2283 .probe = smc_drv_probe,
2284 .remove = __devexit_p(smc_drv_remove),
2285 .suspend = smc_drv_suspend,
2286 .resume = smc_drv_resume,
2289 .owner = THIS_MODULE,
2293 static int __init smc_init(void)
2295 return platform_driver_register(&smc_driver);
2298 static void __exit smc_cleanup(void)
2300 platform_driver_unregister(&smc_driver);
2303 module_init(smc_init);
2304 module_exit(smc_cleanup);