drivers/net/wireless/bcm43xx/bcm43xx_radio.c

   1 /*
   2
   3   Broadcom BCM43xx wireless driver
   4
   5   Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
   6                      Stefano Brivio <st3@riseup.net>
   7                      Michael Buesch <mbuesch@freenet.de>
   8                      Danny van Dyk <kugelfang@gentoo.org>
   9                      Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10
  11   Some parts of the code in this file are derived from the ipw2200
  12   driver  Copyright(c) 2003 - 2004 Intel Corporation.
  13
  14   This program is free software; you can redistribute it and/or modify
  15   it under the terms of the GNU General Public License as published by
  16   the Free Software Foundation; either version 2 of the License, or
  17   (at your option) any later version.
  18
  19   This program is distributed in the hope that it will be useful,
  20   but WITHOUT ANY WARRANTY; without even the implied warranty of
  21   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22   GNU General Public License for more details.
  23
  24   You should have received a copy of the GNU General Public License
  25   along with this program; see the file COPYING.  If not, write to
  26   the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  27   Boston, MA 02110-1301, USA.
  28
  29 */
  30
  31 #include <linux/delay.h>
  32
  33 #include "bcm43xx.h"
  34 #include "bcm43xx_main.h"
  35 #include "bcm43xx_phy.h"
  36 #include "bcm43xx_radio.h"
  37 #include "bcm43xx_ilt.h"
  38
  39
  40 /* Table for bcm43xx_radio_calibrationvalue() */
  41 static const u16 rcc_table[16] = {
  42         0x0002, 0x0003, 0x0001, 0x000F,
  43         0x0006, 0x0007, 0x0005, 0x000F,
  44         0x000A, 0x000B, 0x0009, 0x000F,
  45         0x000E, 0x000F, 0x000D, 0x000F,
  46 };
  47
  48 /* Reverse the bits of a 4bit value.
  49  * Example:  1101 is flipped 1011
  50  */
  51 static u16 flip_4bit(u16 value)
  52 {
  53         u16 flipped = 0x0000;
  54
  55         assert((value & ~0x000F) == 0x0000);
  56
  57         flipped |= (value & 0x0001) << 3;
  58         flipped |= (value & 0x0002) << 1;
  59         flipped |= (value & 0x0004) >> 1;
  60         flipped |= (value & 0x0008) >> 3;
  61
  62         return flipped;
  63 }
  64
  65 /* Get the freq, as it has to be written to the device. */
  66 static inline
  67 u16 channel2freq_bg(u8 channel)
  68 {
  69         /* Frequencies are given as frequencies_bg[index] + 2.4GHz
  70          * Starting with channel 1
  71          */
  72         static const u16 frequencies_bg[14] = {
  73                 12, 17, 22, 27,
  74                 32, 37, 42, 47,
  75                 52, 57, 62, 67,
  76                 72, 84,
  77         };
  78
  79         assert(channel >= 1 && channel <= 14);
  80
  81         return frequencies_bg[channel - 1];
  82 }
  83
  84 /* Get the freq, as it has to be written to the device. */
  85 static inline
  86 u16 channel2freq_a(u8 channel)
  87 {
  88         assert(channel <= 200);
  89
  90         return (5000 + 5 * channel);
  91 }
  92
  93 void bcm43xx_radio_lock(struct bcm43xx_private *bcm)
  94 {
  95         u32 status;
  96
  97         status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
  98         status |= BCM43xx_SBF_RADIOREG_LOCK;
  99         bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
 100         mmiowb();
 101         udelay(10);
 102 }
 103
 104 void bcm43xx_radio_unlock(struct bcm43xx_private *bcm)
 105 {
 106         u32 status;
 107
 108         bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_VER); /* dummy read */
 109         status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
 110         status &= ~BCM43xx_SBF_RADIOREG_LOCK;
 111         bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
 112         mmiowb();
 113 }
 114
 115 u16 bcm43xx_radio_read16(struct bcm43xx_private *bcm, u16 offset)
 116 {
 117         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 118         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 119
 120         switch (phy->type) {
 121         case BCM43xx_PHYTYPE_A:
 122                 offset |= 0x0040;
 123                 break;
 124         case BCM43xx_PHYTYPE_B:
 125                 if (radio->version == 0x2053) {
 126                         if (offset < 0x70)
 127                                 offset += 0x80;
 128                         else if (offset < 0x80)
 129                                 offset += 0x70;
 130                 } else if (radio->version == 0x2050) {
 131                         offset |= 0x80;
 132                 } else
 133                         assert(0);
 134                 break;
 135         case BCM43xx_PHYTYPE_G:
 136                 offset |= 0x80;
 137                 break;
 138         }
 139
 140         bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, offset);
 141         return bcm43xx_read16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW);
 142 }
 143
 144 void bcm43xx_radio_write16(struct bcm43xx_private *bcm, u16 offset, u16 val)
 145 {
 146         bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, offset);
 147         mmiowb();
 148         bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW, val);
 149 }
 150
 151 static void bcm43xx_set_all_gains(struct bcm43xx_private *bcm,
 152                                   s16 first, s16 second, s16 third)
 153 {
 154         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 155         u16 i;
 156         u16 start = 0x08, end = 0x18;
 157         u16 offset = 0x0400;
 158         u16 tmp;
 159
 160         if (phy->rev <= 1) {
 161                 offset = 0x5000;
 162                 start = 0x10;
 163                 end = 0x20;
 164         }
 165
 166         for (i = 0; i < 4; i++)
 167                 bcm43xx_ilt_write(bcm, offset + i, first);
 168
 169         for (i = start; i < end; i++)
 170                 bcm43xx_ilt_write(bcm, offset + i, second);
 171
 172         if (third != -1) {
 173                 tmp = ((u16)third << 14) | ((u16)third << 6);
 174                 bcm43xx_phy_write(bcm, 0x04A0,
 175                                   (bcm43xx_phy_read(bcm, 0x04A0) & 0xBFBF) | tmp);
 176                 bcm43xx_phy_write(bcm, 0x04A1,
 177                                   (bcm43xx_phy_read(bcm, 0x04A1) & 0xBFBF) | tmp);
 178                 bcm43xx_phy_write(bcm, 0x04A2,
 179                                   (bcm43xx_phy_read(bcm, 0x04A2) & 0xBFBF) | tmp);
 180         }
 181         bcm43xx_dummy_transmission(bcm);
 182 }
 183
 184 static void bcm43xx_set_original_gains(struct bcm43xx_private *bcm)
 185 {
 186         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 187         u16 i, tmp;
 188         u16 offset = 0x0400;
 189         u16 start = 0x0008, end = 0x0018;
 190
 191         if (phy->rev <= 1) {
 192                 offset = 0x5000;
 193                 start = 0x0010;
 194                 end = 0x0020;
 195         }
 196
 197         for (i = 0; i < 4; i++) {
 198                 tmp = (i & 0xFFFC);
 199                 tmp |= (i & 0x0001) << 1;
 200                 tmp |= (i & 0x0002) >> 1;
 201
 202                 bcm43xx_ilt_write(bcm, offset + i, tmp);
 203         }
 204
 205         for (i = start; i < end; i++)
 206                 bcm43xx_ilt_write(bcm, offset + i, i - start);
 207
 208         bcm43xx_phy_write(bcm, 0x04A0,
 209                           (bcm43xx_phy_read(bcm, 0x04A0) & 0xBFBF) | 0x4040);
 210         bcm43xx_phy_write(bcm, 0x04A1,
 211                           (bcm43xx_phy_read(bcm, 0x04A1) & 0xBFBF) | 0x4040);
 212         bcm43xx_phy_write(bcm, 0x04A2,
 213                           (bcm43xx_phy_read(bcm, 0x04A2) & 0xBFBF) | 0x4000);
 214         bcm43xx_dummy_transmission(bcm);
 215 }
 216
 217 /* Synthetic PU workaround */
 218 static void bcm43xx_synth_pu_workaround(struct bcm43xx_private *bcm, u8 channel)
 219 {
 220         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 221
 222         if (radio->version != 0x2050 || radio->revision >= 6) {
 223                 /* We do not need the workaround. */
 224                 return;
 225         }
 226
 227         if (channel <= 10) {
 228                 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
 229                                 channel2freq_bg(channel + 4));
 230         } else {
 231                 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
 232                                 channel2freq_bg(1));
 233         }
 234         udelay(100);
 235         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
 236                         channel2freq_bg(channel));
 237 }
 238
 239 u8 bcm43xx_radio_aci_detect(struct bcm43xx_private *bcm, u8 channel)
 240 {
 241         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 242         u8 ret = 0;
 243         u16 saved, rssi, temp;
 244         int i, j = 0;
 245
 246         saved = bcm43xx_phy_read(bcm, 0x0403);
 247         bcm43xx_radio_selectchannel(bcm, channel, 0);
 248         bcm43xx_phy_write(bcm, 0x0403, (saved & 0xFFF8) | 5);
 249         if (radio->aci_hw_rssi)
 250                 rssi = bcm43xx_phy_read(bcm, 0x048A) & 0x3F;
 251         else
 252                 rssi = saved & 0x3F;
 253         /* clamp temp to signed 5bit */
 254         if (rssi > 32)
 255                 rssi -= 64;
 256         for (i = 0;i < 100; i++) {
 257                 temp = (bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x3F;
 258                 if (temp > 32)
 259                         temp -= 64;
 260                 if (temp < rssi)
 261                         j++;
 262                 if (j >= 20)
 263                         ret = 1;
 264         }
 265         bcm43xx_phy_write(bcm, 0x0403, saved);
 266
 267         return ret;
 268 }
 269
 270 u8 bcm43xx_radio_aci_scan(struct bcm43xx_private *bcm)
 271 {
 272         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 273         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 274         u8 ret[13];
 275         unsigned int channel = radio->channel;
 276         unsigned int i, j, start, end;
 277         unsigned long phylock_flags;
 278
 279         if (!((phy->type == BCM43xx_PHYTYPE_G) && (phy->rev > 0)))
 280                 return 0;
 281
 282         bcm43xx_phy_lock(bcm, phylock_flags);
 283         bcm43xx_radio_lock(bcm);
 284         bcm43xx_phy_write(bcm, 0x0802,
 285                           bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC);
 286         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
 287                           bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF);
 288         bcm43xx_set_all_gains(bcm, 3, 8, 1);
 289
 290         start = (channel - 5 > 0) ? channel - 5 : 1;
 291         end = (channel + 5 < 14) ? channel + 5 : 13;
 292
 293         for (i = start; i <= end; i++) {
 294                 if (abs(channel - i) > 2)
 295                         ret[i-1] = bcm43xx_radio_aci_detect(bcm, i);
 296         }
 297         bcm43xx_radio_selectchannel(bcm, channel, 0);
 298         bcm43xx_phy_write(bcm, 0x0802,
 299                           (bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC) | 0x0003);
 300         bcm43xx_phy_write(bcm, 0x0403,
 301                           bcm43xx_phy_read(bcm, 0x0403) & 0xFFF8);
 302         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
 303                           bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x8000);
 304         bcm43xx_set_original_gains(bcm);
 305         for (i = 0; i < 13; i++) {
 306                 if (!ret[i])
 307                         continue;
 308                 end = (i + 5 < 13) ? i + 5 : 13;
 309                 for (j = i; j < end; j++)
 310                         ret[j] = 1;
 311         }
 312         bcm43xx_radio_unlock(bcm);
 313         bcm43xx_phy_unlock(bcm, phylock_flags);
 314
 315         return ret[channel - 1];
 316 }
 317
 318 /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
 319 void bcm43xx_nrssi_hw_write(struct bcm43xx_private *bcm, u16 offset, s16 val)
 320 {
 321         bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_CTRL, offset);
 322         mmiowb();
 323         bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_DATA, (u16)val);
 324 }
 325
 326 /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
 327 s16 bcm43xx_nrssi_hw_read(struct bcm43xx_private *bcm, u16 offset)
 328 {
 329         u16 val;
 330
 331         bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_CTRL, offset);
 332         val = bcm43xx_phy_read(bcm, BCM43xx_PHY_NRSSILT_DATA);
 333
 334         return (s16)val;
 335 }
 336
 337 /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
 338 void bcm43xx_nrssi_hw_update(struct bcm43xx_private *bcm, u16 val)
 339 {
 340         u16 i;
 341         s16 tmp;
 342
 343         for (i = 0; i < 64; i++) {
 344                 tmp = bcm43xx_nrssi_hw_read(bcm, i);
 345                 tmp -= val;
 346                 tmp = limit_value(tmp, -32, 31);
 347                 bcm43xx_nrssi_hw_write(bcm, i, tmp);
 348         }
 349 }
 350
 351 /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
 352 void bcm43xx_nrssi_mem_update(struct bcm43xx_private *bcm)
 353 {
 354         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 355         s16 i, delta;
 356         s32 tmp;
 357
 358         delta = 0x1F - radio->nrssi[0];
 359         for (i = 0; i < 64; i++) {
 360                 tmp = (i - delta) * radio->nrssislope;
 361                 tmp /= 0x10000;
 362                 tmp += 0x3A;
 363                 tmp = limit_value(tmp, 0, 0x3F);
 364                 radio->nrssi_lt[i] = tmp;
 365         }
 366 }
 367
 368 static void bcm43xx_calc_nrssi_offset(struct bcm43xx_private *bcm)
 369 {
 370         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 371         u16 backup[20] = { 0 };
 372         s16 v47F;
 373         u16 i;
 374         u16 saved = 0xFFFF;
 375
 376         backup[0] = bcm43xx_phy_read(bcm, 0x0001);
 377         backup[1] = bcm43xx_phy_read(bcm, 0x0811);
 378         backup[2] = bcm43xx_phy_read(bcm, 0x0812);
 379         backup[3] = bcm43xx_phy_read(bcm, 0x0814);
 380         backup[4] = bcm43xx_phy_read(bcm, 0x0815);
 381         backup[5] = bcm43xx_phy_read(bcm, 0x005A);
 382         backup[6] = bcm43xx_phy_read(bcm, 0x0059);
 383         backup[7] = bcm43xx_phy_read(bcm, 0x0058);
 384         backup[8] = bcm43xx_phy_read(bcm, 0x000A);
 385         backup[9] = bcm43xx_phy_read(bcm, 0x0003);
 386         backup[10] = bcm43xx_radio_read16(bcm, 0x007A);
 387         backup[11] = bcm43xx_radio_read16(bcm, 0x0043);
 388
 389         bcm43xx_phy_write(bcm, 0x0429,
 390                           bcm43xx_phy_read(bcm, 0x0429) & 0x7FFF);
 391         bcm43xx_phy_write(bcm, 0x0001,
 392                           (bcm43xx_phy_read(bcm, 0x0001) & 0x3FFF) | 0x4000);
 393         bcm43xx_phy_write(bcm, 0x0811,
 394                           bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
 395         bcm43xx_phy_write(bcm, 0x0812,
 396                           (bcm43xx_phy_read(bcm, 0x0812) & 0xFFF3) | 0x0004);
 397         bcm43xx_phy_write(bcm, 0x0802,
 398                           bcm43xx_phy_read(bcm, 0x0802) & ~(0x1 | 0x2));
 399         if (phy->rev >= 6) {
 400                 backup[12] = bcm43xx_phy_read(bcm, 0x002E);
 401                 backup[13] = bcm43xx_phy_read(bcm, 0x002F);
 402                 backup[14] = bcm43xx_phy_read(bcm, 0x080F);
 403                 backup[15] = bcm43xx_phy_read(bcm, 0x0810);
 404                 backup[16] = bcm43xx_phy_read(bcm, 0x0801);
 405                 backup[17] = bcm43xx_phy_read(bcm, 0x0060);
 406                 backup[18] = bcm43xx_phy_read(bcm, 0x0014);
 407                 backup[19] = bcm43xx_phy_read(bcm, 0x0478);
 408
 409                 bcm43xx_phy_write(bcm, 0x002E, 0);
 410                 bcm43xx_phy_write(bcm, 0x002F, 0);
 411                 bcm43xx_phy_write(bcm, 0x080F, 0);
 412                 bcm43xx_phy_write(bcm, 0x0810, 0);
 413                 bcm43xx_phy_write(bcm, 0x0478,
 414                                   bcm43xx_phy_read(bcm, 0x0478) | 0x0100);
 415                 bcm43xx_phy_write(bcm, 0x0801,
 416                                   bcm43xx_phy_read(bcm, 0x0801) | 0x0040);
 417                 bcm43xx_phy_write(bcm, 0x0060,
 418                                   bcm43xx_phy_read(bcm, 0x0060) | 0x0040);
 419                 bcm43xx_phy_write(bcm, 0x0014,
 420                                   bcm43xx_phy_read(bcm, 0x0014) | 0x0200);
 421         }
 422         bcm43xx_radio_write16(bcm, 0x007A,
 423                               bcm43xx_radio_read16(bcm, 0x007A) | 0x0070);
 424         bcm43xx_radio_write16(bcm, 0x007A,
 425                               bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
 426         udelay(30);
 427
 428         v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
 429         if (v47F >= 0x20)
 430                 v47F -= 0x40;
 431         if (v47F == 31) {
 432                 for (i = 7; i >= 4; i--) {
 433                         bcm43xx_radio_write16(bcm, 0x007B, i);
 434                         udelay(20);
 435                         v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
 436                         if (v47F >= 0x20)
 437                                 v47F -= 0x40;
 438                         if (v47F < 31 && saved == 0xFFFF)
 439                                 saved = i;
 440                 }
 441                 if (saved == 0xFFFF)
 442                         saved = 4;
 443         } else {
 444                 bcm43xx_radio_write16(bcm, 0x007A,
 445                                       bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
 446                 bcm43xx_phy_write(bcm, 0x0814,
 447                                   bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
 448                 bcm43xx_phy_write(bcm, 0x0815,
 449                                   bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
 450                 bcm43xx_phy_write(bcm, 0x0811,
 451                                   bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
 452                 bcm43xx_phy_write(bcm, 0x0812,
 453                                   bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
 454                 bcm43xx_phy_write(bcm, 0x0811,
 455                                   bcm43xx_phy_read(bcm, 0x0811) | 0x0030);
 456                 bcm43xx_phy_write(bcm, 0x0812,
 457                                   bcm43xx_phy_read(bcm, 0x0812) | 0x0030);
 458                 bcm43xx_phy_write(bcm, 0x005A, 0x0480);
 459                 bcm43xx_phy_write(bcm, 0x0059, 0x0810);
 460                 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
 461                 if (phy->rev == 0) {
 462                         bcm43xx_phy_write(bcm, 0x0003, 0x0122);
 463                 } else {
 464                         bcm43xx_phy_write(bcm, 0x000A,
 465                                           bcm43xx_phy_read(bcm, 0x000A)
 466                                           | 0x2000);
 467                 }
 468                 bcm43xx_phy_write(bcm, 0x0814,
 469                                   bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
 470                 bcm43xx_phy_write(bcm, 0x0815,
 471                                   bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
 472                 bcm43xx_phy_write(bcm, 0x0003,
 473                                   (bcm43xx_phy_read(bcm, 0x0003) & 0xFF9F)
 474                                   | 0x0040);
 475                 bcm43xx_radio_write16(bcm, 0x007A,
 476                                       bcm43xx_radio_read16(bcm, 0x007A) | 0x000F);
 477                 bcm43xx_set_all_gains(bcm, 3, 0, 1);
 478                 bcm43xx_radio_write16(bcm, 0x0043,
 479                                       (bcm43xx_radio_read16(bcm, 0x0043)
 480                                        & 0x00F0) | 0x000F);
 481                 udelay(30);
 482                 v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
 483                 if (v47F >= 0x20)
 484                         v47F -= 0x40;
 485                 if (v47F == -32) {
 486                         for (i = 0; i < 4; i++) {
 487                                 bcm43xx_radio_write16(bcm, 0x007B, i);
 488                                 udelay(20);
 489                                 v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
 490                                 if (v47F >= 0x20)
 491                                         v47F -= 0x40;
 492                                 if (v47F > -31 && saved == 0xFFFF)
 493                                         saved = i;
 494                         }
 495                         if (saved == 0xFFFF)
 496                                 saved = 3;
 497                 } else
 498                         saved = 0;
 499         }
 500         bcm43xx_radio_write16(bcm, 0x007B, saved);
 501
 502         if (phy->rev >= 6) {
 503                 bcm43xx_phy_write(bcm, 0x002E, backup[12]);
 504                 bcm43xx_phy_write(bcm, 0x002F, backup[13]);
 505                 bcm43xx_phy_write(bcm, 0x080F, backup[14]);
 506                 bcm43xx_phy_write(bcm, 0x0810, backup[15]);
 507         }
 508         bcm43xx_phy_write(bcm, 0x0814, backup[3]);
 509         bcm43xx_phy_write(bcm, 0x0815, backup[4]);
 510         bcm43xx_phy_write(bcm, 0x005A, backup[5]);
 511         bcm43xx_phy_write(bcm, 0x0059, backup[6]);
 512         bcm43xx_phy_write(bcm, 0x0058, backup[7]);
 513         bcm43xx_phy_write(bcm, 0x000A, backup[8]);
 514         bcm43xx_phy_write(bcm, 0x0003, backup[9]);
 515         bcm43xx_radio_write16(bcm, 0x0043, backup[11]);
 516         bcm43xx_radio_write16(bcm, 0x007A, backup[10]);
 517         bcm43xx_phy_write(bcm, 0x0802,
 518                           bcm43xx_phy_read(bcm, 0x0802) | 0x1 | 0x2);
 519         bcm43xx_phy_write(bcm, 0x0429,
 520                           bcm43xx_phy_read(bcm, 0x0429) | 0x8000);
 521         bcm43xx_set_original_gains(bcm);
 522         if (phy->rev >= 6) {
 523                 bcm43xx_phy_write(bcm, 0x0801, backup[16]);
 524                 bcm43xx_phy_write(bcm, 0x0060, backup[17]);
 525                 bcm43xx_phy_write(bcm, 0x0014, backup[18]);
 526                 bcm43xx_phy_write(bcm, 0x0478, backup[19]);
 527         }
 528         bcm43xx_phy_write(bcm, 0x0001, backup[0]);
 529         bcm43xx_phy_write(bcm, 0x0812, backup[2]);
 530         bcm43xx_phy_write(bcm, 0x0811, backup[1]);
 531 }
 532
 533 void bcm43xx_calc_nrssi_slope(struct bcm43xx_private *bcm)
 534 {
 535         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 536         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 537         u16 backup[18] = { 0 };
 538         u16 tmp;
 539         s16 nrssi0, nrssi1;
 540
 541         switch (phy->type) {
 542         case BCM43xx_PHYTYPE_B:
 543                 backup[0] = bcm43xx_radio_read16(bcm, 0x007A);
 544                 backup[1] = bcm43xx_radio_read16(bcm, 0x0052);
 545                 backup[2] = bcm43xx_radio_read16(bcm, 0x0043);
 546                 backup[3] = bcm43xx_phy_read(bcm, 0x0030);
 547                 backup[4] = bcm43xx_phy_read(bcm, 0x0026);
 548                 backup[5] = bcm43xx_phy_read(bcm, 0x0015);
 549                 backup[6] = bcm43xx_phy_read(bcm, 0x002A);
 550                 backup[7] = bcm43xx_phy_read(bcm, 0x0020);
 551                 backup[8] = bcm43xx_phy_read(bcm, 0x005A);
 552                 backup[9] = bcm43xx_phy_read(bcm, 0x0059);
 553                 backup[10] = bcm43xx_phy_read(bcm, 0x0058);
 554                 backup[11] = bcm43xx_read16(bcm, 0x03E2);
 555                 backup[12] = bcm43xx_read16(bcm, 0x03E6);
 556                 backup[13] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
 557
 558                 tmp  = bcm43xx_radio_read16(bcm, 0x007A);
 559                 tmp &= (phy->rev >= 5) ? 0x007F : 0x000F;
 560                 bcm43xx_radio_write16(bcm, 0x007A, tmp);
 561                 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
 562                 bcm43xx_write16(bcm, 0x03EC, 0x7F7F);
 563                 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
 564                 bcm43xx_phy_write(bcm, 0x0015,
 565                                   bcm43xx_phy_read(bcm, 0x0015) | 0x0020);
 566                 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
 567                 bcm43xx_radio_write16(bcm, 0x007A,
 568                                       bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
 569
 570                 nrssi0 = (s16)bcm43xx_phy_read(bcm, 0x0027);
 571                 bcm43xx_radio_write16(bcm, 0x007A,
 572                                       bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
 573                 if (phy->rev >= 2) {
 574                         bcm43xx_write16(bcm, 0x03E6, 0x0040);
 575                 } else if (phy->rev == 0) {
 576                         bcm43xx_write16(bcm, 0x03E6, 0x0122);
 577                 } else {
 578                         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
 579                                         bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT) & 0x2000);
 580                 }
 581                 bcm43xx_phy_write(bcm, 0x0020, 0x3F3F);
 582                 bcm43xx_phy_write(bcm, 0x0015, 0xF330);
 583                 bcm43xx_radio_write16(bcm, 0x005A, 0x0060);
 584                 bcm43xx_radio_write16(bcm, 0x0043,
 585                                       bcm43xx_radio_read16(bcm, 0x0043) & 0x00F0);
 586                 bcm43xx_phy_write(bcm, 0x005A, 0x0480);
 587                 bcm43xx_phy_write(bcm, 0x0059, 0x0810);
 588                 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
 589                 udelay(20);
 590
 591                 nrssi1 = (s16)bcm43xx_phy_read(bcm, 0x0027);
 592                 bcm43xx_phy_write(bcm, 0x0030, backup[3]);
 593                 bcm43xx_radio_write16(bcm, 0x007A, backup[0]);
 594                 bcm43xx_write16(bcm, 0x03E2, backup[11]);
 595                 bcm43xx_phy_write(bcm, 0x0026, backup[4]);
 596                 bcm43xx_phy_write(bcm, 0x0015, backup[5]);
 597                 bcm43xx_phy_write(bcm, 0x002A, backup[6]);
 598                 bcm43xx_synth_pu_workaround(bcm, radio->channel);
 599                 if (phy->rev != 0)
 600                         bcm43xx_write16(bcm, 0x03F4, backup[13]);
 601
 602                 bcm43xx_phy_write(bcm, 0x0020, backup[7]);
 603                 bcm43xx_phy_write(bcm, 0x005A, backup[8]);
 604                 bcm43xx_phy_write(bcm, 0x0059, backup[9]);
 605                 bcm43xx_phy_write(bcm, 0x0058, backup[10]);
 606                 bcm43xx_radio_write16(bcm, 0x0052, backup[1]);
 607                 bcm43xx_radio_write16(bcm, 0x0043, backup[2]);
 608
 609                 if (nrssi0 == nrssi1)
 610                         radio->nrssislope = 0x00010000;
 611                 else
 612                         radio->nrssislope = 0x00400000 / (nrssi0 - nrssi1);
 613
 614                 if (nrssi0 <= -4) {
 615                         radio->nrssi[0] = nrssi0;
 616                         radio->nrssi[1] = nrssi1;
 617                 }
 618                 break;
 619         case BCM43xx_PHYTYPE_G:
 620                 if (radio->revision >= 9)
 621                         return;
 622                 if (radio->revision == 8)
 623                         bcm43xx_calc_nrssi_offset(bcm);
 624
 625                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
 626                                   bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF);
 627                 bcm43xx_phy_write(bcm, 0x0802,
 628                                   bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC);
 629                 backup[7] = bcm43xx_read16(bcm, 0x03E2);
 630                 bcm43xx_write16(bcm, 0x03E2,
 631                                 bcm43xx_read16(bcm, 0x03E2) | 0x8000);
 632                 backup[0] = bcm43xx_radio_read16(bcm, 0x007A);
 633                 backup[1] = bcm43xx_radio_read16(bcm, 0x0052);
 634                 backup[2] = bcm43xx_radio_read16(bcm, 0x0043);
 635                 backup[3] = bcm43xx_phy_read(bcm, 0x0015);
 636                 backup[4] = bcm43xx_phy_read(bcm, 0x005A);
 637                 backup[5] = bcm43xx_phy_read(bcm, 0x0059);
 638                 backup[6] = bcm43xx_phy_read(bcm, 0x0058);
 639                 backup[8] = bcm43xx_read16(bcm, 0x03E6);
 640                 backup[9] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
 641                 if (phy->rev >= 3) {
 642                         backup[10] = bcm43xx_phy_read(bcm, 0x002E);
 643                         backup[11] = bcm43xx_phy_read(bcm, 0x002F);
 644                         backup[12] = bcm43xx_phy_read(bcm, 0x080F);
 645                         backup[13] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_LO_CONTROL);
 646                         backup[14] = bcm43xx_phy_read(bcm, 0x0801);
 647                         backup[15] = bcm43xx_phy_read(bcm, 0x0060);
 648                         backup[16] = bcm43xx_phy_read(bcm, 0x0014);
 649                         backup[17] = bcm43xx_phy_read(bcm, 0x0478);
 650                         bcm43xx_phy_write(bcm, 0x002E, 0);
 651                         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, 0);
 652                         switch (phy->rev) {
 653                         case 4: case 6: case 7:
 654                                 bcm43xx_phy_write(bcm, 0x0478,
 655                                                   bcm43xx_phy_read(bcm, 0x0478)
 656                                                   | 0x0100);
 657                                 bcm43xx_phy_write(bcm, 0x0801,
 658                                                   bcm43xx_phy_read(bcm, 0x0801)
 659                                                   | 0x0040);
 660                                 break;
 661                         case 3: case 5:
 662                                 bcm43xx_phy_write(bcm, 0x0801,
 663                                                   bcm43xx_phy_read(bcm, 0x0801)
 664                                                   & 0xFFBF);
 665                                 break;
 666                         }
 667                         bcm43xx_phy_write(bcm, 0x0060,
 668                                           bcm43xx_phy_read(bcm, 0x0060)
 669                                           | 0x0040);
 670                         bcm43xx_phy_write(bcm, 0x0014,
 671                                           bcm43xx_phy_read(bcm, 0x0014)
 672                                           | 0x0200);
 673                 }
 674                 bcm43xx_radio_write16(bcm, 0x007A,
 675                                       bcm43xx_radio_read16(bcm, 0x007A) | 0x0070);
 676                 bcm43xx_set_all_gains(bcm, 0, 8, 0);
 677                 bcm43xx_radio_write16(bcm, 0x007A,
 678                                       bcm43xx_radio_read16(bcm, 0x007A) & 0x00F7);
 679                 if (phy->rev >= 2) {
 680                         bcm43xx_phy_write(bcm, 0x0811,
 681                                           (bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF) | 0x0030);
 682                         bcm43xx_phy_write(bcm, 0x0812,
 683                                           (bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF) | 0x0010);
 684                 }
 685                 bcm43xx_radio_write16(bcm, 0x007A,
 686                                       bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
 687                 udelay(20);
 688
 689                 nrssi0 = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
 690                 if (nrssi0 >= 0x0020)
 691                         nrssi0 -= 0x0040;
 692
 693                 bcm43xx_radio_write16(bcm, 0x007A,
 694                                       bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
 695                 if (phy->rev >= 2) {
 696                         bcm43xx_phy_write(bcm, 0x0003,
 697                                           (bcm43xx_phy_read(bcm, 0x0003)
 698                                            & 0xFF9F) | 0x0040);
 699                 }
 700
 701                 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
 702                                 bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
 703                                 | 0x2000);
 704                 bcm43xx_radio_write16(bcm, 0x007A,
 705                                       bcm43xx_radio_read16(bcm, 0x007A) | 0x000F);
 706                 bcm43xx_phy_write(bcm, 0x0015, 0xF330);
 707                 if (phy->rev >= 2) {
 708                         bcm43xx_phy_write(bcm, 0x0812,
 709                                           (bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF) | 0x0020);
 710                         bcm43xx_phy_write(bcm, 0x0811,
 711                                           (bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF) | 0x0020);
 712                 }
 713
 714                 bcm43xx_set_all_gains(bcm, 3, 0, 1);
 715                 if (radio->revision == 8) {
 716                         bcm43xx_radio_write16(bcm, 0x0043, 0x001F);
 717                 } else {
 718                         tmp = bcm43xx_radio_read16(bcm, 0x0052) & 0xFF0F;
 719                         bcm43xx_radio_write16(bcm, 0x0052, tmp | 0x0060);
 720                         tmp = bcm43xx_radio_read16(bcm, 0x0043) & 0xFFF0;
 721                         bcm43xx_radio_write16(bcm, 0x0043, tmp | 0x0009);
 722                 }
 723                 bcm43xx_phy_write(bcm, 0x005A, 0x0480);
 724                 bcm43xx_phy_write(bcm, 0x0059, 0x0810);
 725                 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
 726                 udelay(20);
 727                 nrssi1 = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
 728                 if (nrssi1 >= 0x0020)
 729                         nrssi1 -= 0x0040;
 730                 if (nrssi0 == nrssi1)
 731                         radio->nrssislope = 0x00010000;
 732                 else
 733                         radio->nrssislope = 0x00400000 / (nrssi0 - nrssi1);
 734                 if (nrssi0 >= -4) {
 735                         radio->nrssi[0] = nrssi1;
 736                         radio->nrssi[1] = nrssi0;
 737                 }
 738                 if (phy->rev >= 3) {
 739                         bcm43xx_phy_write(bcm, 0x002E, backup[10]);
 740                         bcm43xx_phy_write(bcm, 0x002F, backup[11]);
 741                         bcm43xx_phy_write(bcm, 0x080F, backup[12]);
 742                         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, backup[13]);
 743                 }
 744                 if (phy->rev >= 2) {
 745                         bcm43xx_phy_write(bcm, 0x0812,
 746                                           bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF);
 747                         bcm43xx_phy_write(bcm, 0x0811,
 748                                           bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF);
 749                 }
 750
 751                 bcm43xx_radio_write16(bcm, 0x007A, backup[0]);
 752                 bcm43xx_radio_write16(bcm, 0x0052, backup[1]);
 753                 bcm43xx_radio_write16(bcm, 0x0043, backup[2]);
 754                 bcm43xx_write16(bcm, 0x03E2, backup[7]);
 755                 bcm43xx_write16(bcm, 0x03E6, backup[8]);
 756                 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, backup[9]);
 757                 bcm43xx_phy_write(bcm, 0x0015, backup[3]);
 758                 bcm43xx_phy_write(bcm, 0x005A, backup[4]);
 759                 bcm43xx_phy_write(bcm, 0x0059, backup[5]);
 760                 bcm43xx_phy_write(bcm, 0x0058, backup[6]);
 761                 bcm43xx_synth_pu_workaround(bcm, radio->channel);
 762                 bcm43xx_phy_write(bcm, 0x0802,
 763                                   bcm43xx_phy_read(bcm, 0x0802) | (0x0001 | 0x0002));
 764                 bcm43xx_set_original_gains(bcm);
 765                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
 766                                   bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x8000);
 767                 if (phy->rev >= 3) {
 768                         bcm43xx_phy_write(bcm, 0x0801, backup[14]);
 769                         bcm43xx_phy_write(bcm, 0x0060, backup[15]);
 770                         bcm43xx_phy_write(bcm, 0x0014, backup[16]);
 771                         bcm43xx_phy_write(bcm, 0x0478, backup[17]);
 772                 }
 773                 bcm43xx_nrssi_mem_update(bcm);
 774                 bcm43xx_calc_nrssi_threshold(bcm);
 775                 break;
 776         default:
 777                 assert(0);
 778         }
 779 }
 780
 781 void bcm43xx_calc_nrssi_threshold(struct bcm43xx_private *bcm)
 782 {
 783         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 784         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 785         s16 threshold;
 786         s32 a, b;
 787         int tmp;
 788         s16 tmp16;
 789         u16 tmp_u16;
 790
 791         switch (phy->type) {
 792         case BCM43xx_PHYTYPE_B: {
 793                 int radiotype = 0;
 794
 795                 if (phy->rev < 2)
 796                         return;
 797                 if (radio->version != 0x2050)
 798                         return;
 799                 if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI))
 800                         return;
 801
 802                 tmp = radio->revision;
 803                 if ((radio->manufact == 0x175 && tmp == 5) ||
 804                      (radio->manufact == 0x17F && (tmp == 3 || tmp == 4)))
 805                         radiotype = 1;
 806
 807                 if (radiotype == 1) {
 808                         threshold = radio->nrssi[1] - 5;
 809                 } else {
 810                         threshold = 40 * radio->nrssi[0];
 811                         threshold += 33 * (radio->nrssi[1] - radio->nrssi[0]);
 812                         threshold += 20;
 813                         threshold /= 10;
 814                 }
 815                 threshold = limit_value(threshold, 0, 0x3E);
 816                 bcm43xx_phy_read(bcm, 0x0020); /* dummy read */
 817                 bcm43xx_phy_write(bcm, 0x0020, (((u16)threshold) << 8) | 0x001C);
 818
 819                 if (radiotype == 1) {
 820                         bcm43xx_phy_write(bcm, 0x0087, 0x0E0D);
 821                         bcm43xx_phy_write(bcm, 0x0086, 0x0C0B);
 822                         bcm43xx_phy_write(bcm, 0x0085, 0x0A09);
 823                         bcm43xx_phy_write(bcm, 0x0084, 0x0808);
 824                         bcm43xx_phy_write(bcm, 0x0083, 0x0808);
 825                         bcm43xx_phy_write(bcm, 0x0082, 0x0604);
 826                         bcm43xx_phy_write(bcm, 0x0081, 0x0302);
 827                         bcm43xx_phy_write(bcm, 0x0080, 0x0100);
 828                 }
 829                 break;
 830         }
 831         case BCM43xx_PHYTYPE_G:
 832                 if (!phy->connected ||
 833                     !(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
 834                         tmp16 = bcm43xx_nrssi_hw_read(bcm, 0x20);
 835                         if (tmp16 >= 0x20)
 836                                 tmp16 -= 0x40;
 837                         if (tmp16 < 3) {
 838                                 bcm43xx_phy_write(bcm, 0x048A,
 839                                                   (bcm43xx_phy_read(bcm, 0x048A)
 840                                                    & 0xF000) | 0x09EB);
 841                         } else {
 842                                 bcm43xx_phy_write(bcm, 0x048A,
 843                                                   (bcm43xx_phy_read(bcm, 0x048A)
 844                                                    & 0xF000) | 0x0AED);
 845                         }
 846                 } else {
 847                         tmp = radio->interfmode;
 848                         if (tmp == BCM43xx_RADIO_INTERFMODE_NONWLAN) {
 849                                 a = -13;
 850                                 b = -17;
 851                         } else if (tmp == BCM43xx_RADIO_INTERFMODE_NONE &&
 852                                    !radio->aci_enable) {
 853                                 a = -13;
 854                                 b = -10;
 855                         } else {
 856                                 a = -8;
 857                                 b = -9;
 858                         }
 859                         a += 0x1B;
 860                         a *= radio->nrssi[1] - radio->nrssi[0];
 861                         a += radio->nrssi[0] * 0x40;
 862                         a /= 64;
 863                         b += 0x1B;
 864                         b *= radio->nrssi[1] - radio->nrssi[0];
 865                         b += radio->nrssi[0] * 0x40;
 866                         b /= 64;
 867
 868                         a = limit_value(a, -31, 31);
 869                         b = limit_value(b, -31, 31);
 870
 871                         tmp_u16 = bcm43xx_phy_read(bcm, 0x048A) & 0xF000;
 872                         tmp_u16 |= ((u32)a & 0x003F);
 873                         tmp_u16 |= (((u32)b & 0x003F) << 6);
 874                         bcm43xx_phy_write(bcm, 0x048A, tmp_u16);
 875                 }
 876                 break;
 877         default:
 878                 assert(0);
 879         }
 880 }
 881
 882 /* Helper macros to save on and restore values from the radio->interfstack */
 883 #ifdef stack_save
 884 # undef stack_save
 885 #endif
 886 #ifdef stack_restore
 887 # undef stack_restore
 888 #endif
 889 #define stack_save(value)  \
 890         do {                                                    \
 891                 assert(i < ARRAY_SIZE(radio->interfstack));     \
 892                 stack[i++] = (value);                           \
 893         } while (0)
 894
 895 #define stack_restore()  \
 896         ({                                                      \
 897                 assert(i < ARRAY_SIZE(radio->interfstack));     \
 898                 stack[i++];                                     \
 899         })
 900
 901 static void
 902 bcm43xx_radio_interference_mitigation_enable(struct bcm43xx_private *bcm,
 903                                              int mode)
 904 {
 905         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 906         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 907         int i = 0;
 908         u16 *stack = radio->interfstack;
 909         u16 tmp, flipped;
 910
 911         switch (mode) {
 912         case BCM43xx_RADIO_INTERFMODE_NONWLAN:
 913                 if (phy->rev != 1) {
 914                         bcm43xx_phy_write(bcm, 0x042B,
 915                                           bcm43xx_phy_read(bcm, 0x042B) & 0x0800);
 916                         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
 917                                           bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & ~0x4000);
 918                         break;
 919                 }
 920                 tmp = (bcm43xx_radio_read16(bcm, 0x0078) & 0x001E);
 921                 flipped = flip_4bit(tmp);
 922                 if ((flipped >> 1) >= 4)
 923                         tmp = flipped - 3;
 924                 tmp = flip_4bit(tmp);
 925                 bcm43xx_radio_write16(bcm, 0x0078, tmp << 1);
 926
 927                 bcm43xx_calc_nrssi_threshold(bcm);
 928
 929                 if (bcm->current_core->rev < 5) {
 930                         stack_save(bcm43xx_phy_read(bcm, 0x0406));
 931                         bcm43xx_phy_write(bcm, 0x0406, 0x7E28);
 932                 } else {
 933                         stack_save(bcm43xx_phy_read(bcm, 0x04C0));
 934                         stack_save(bcm43xx_phy_read(bcm, 0x04C1));
 935                         bcm43xx_phy_write(bcm, 0x04C0, 0x3E04);
 936                         bcm43xx_phy_write(bcm, 0x04C1, 0x0640);
 937                 }
 938
 939                 bcm43xx_phy_write(bcm, 0x042B,
 940                                   bcm43xx_phy_read(bcm, 0x042B) | 0x0800);
 941                 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
 942                                   bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | 0x1000);
 943
 944                 stack_save(bcm43xx_phy_read(bcm, 0x04A0));
 945                 bcm43xx_phy_write(bcm, 0x04A0,
 946                                   (bcm43xx_phy_read(bcm, 0x04A0) & 0xC0C0) | 0x0008);
 947                 stack_save(bcm43xx_phy_read(bcm, 0x04A1));
 948                 bcm43xx_phy_write(bcm, 0x04A1,
 949                                   (bcm43xx_phy_read(bcm, 0x04A1) & 0xC0C0) | 0x0605);
 950                 stack_save(bcm43xx_phy_read(bcm, 0x04A2));
 951                 bcm43xx_phy_write(bcm, 0x04A2,
 952                                   (bcm43xx_phy_read(bcm, 0x04A2) & 0xC0C0) | 0x0204);
 953                 stack_save(bcm43xx_phy_read(bcm, 0x04A8));
 954                 bcm43xx_phy_write(bcm, 0x04A8,
 955                                   (bcm43xx_phy_read(bcm, 0x04A8) & 0xC0C0) | 0x0403);
 956                 stack_save(bcm43xx_phy_read(bcm, 0x04AB));
 957                 bcm43xx_phy_write(bcm, 0x04AB,
 958                                   (bcm43xx_phy_read(bcm, 0x04AB) & 0xC0C0) | 0x0504);
 959
 960                 stack_save(bcm43xx_phy_read(bcm, 0x04A7));
 961                 bcm43xx_phy_write(bcm, 0x04A7, 0x0002);
 962                 stack_save(bcm43xx_phy_read(bcm, 0x04A3));
 963                 bcm43xx_phy_write(bcm, 0x04A3, 0x287A);
 964                 stack_save(bcm43xx_phy_read(bcm, 0x04A9));
 965                 bcm43xx_phy_write(bcm, 0x04A9, 0x2027);
 966                 stack_save(bcm43xx_phy_read(bcm, 0x0493));
 967                 bcm43xx_phy_write(bcm, 0x0493, 0x32F5);
 968                 stack_save(bcm43xx_phy_read(bcm, 0x04AA));
 969                 bcm43xx_phy_write(bcm, 0x04AA, 0x2027);
 970                 stack_save(bcm43xx_phy_read(bcm, 0x04AC));
 971                 bcm43xx_phy_write(bcm, 0x04AC, 0x32F5);
 972                 break;
 973         case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
 974                 if (bcm43xx_phy_read(bcm, 0x0033) == 0x0800)
 975                         break;
 976
 977                 radio->aci_enable = 1;
 978
 979                 stack_save(bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD));
 980                 stack_save(bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS));
 981                 if (bcm->current_core->rev < 5) {
 982                         stack_save(bcm43xx_phy_read(bcm, 0x0406));
 983                 } else {
 984                         stack_save(bcm43xx_phy_read(bcm, 0x04C0));
 985                         stack_save(bcm43xx_phy_read(bcm, 0x04C1));
 986                 }
 987                 stack_save(bcm43xx_phy_read(bcm, 0x0033));
 988                 stack_save(bcm43xx_phy_read(bcm, 0x04A7));
 989                 stack_save(bcm43xx_phy_read(bcm, 0x04A3));
 990                 stack_save(bcm43xx_phy_read(bcm, 0x04A9));
 991                 stack_save(bcm43xx_phy_read(bcm, 0x04AA));
 992                 stack_save(bcm43xx_phy_read(bcm, 0x04AC));
 993                 stack_save(bcm43xx_phy_read(bcm, 0x0493));
 994                 stack_save(bcm43xx_phy_read(bcm, 0x04A1));
 995                 stack_save(bcm43xx_phy_read(bcm, 0x04A0));
 996                 stack_save(bcm43xx_phy_read(bcm, 0x04A2));
 997                 stack_save(bcm43xx_phy_read(bcm, 0x048A));
 998                 stack_save(bcm43xx_phy_read(bcm, 0x04A8));
 999                 stack_save(bcm43xx_phy_read(bcm, 0x04AB));
1000
1001                 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
1002                                   bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) & 0xEFFF);
1003                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
1004                                   (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xEFFF) | 0x0002);
1005
1006                 bcm43xx_phy_write(bcm, 0x04A7, 0x0800);
1007                 bcm43xx_phy_write(bcm, 0x04A3, 0x287A);
1008                 bcm43xx_phy_write(bcm, 0x04A9, 0x2027);
1009                 bcm43xx_phy_write(bcm, 0x0493, 0x32F5);
1010                 bcm43xx_phy_write(bcm, 0x04AA, 0x2027);
1011                 bcm43xx_phy_write(bcm, 0x04AC, 0x32F5);
1012
1013                 bcm43xx_phy_write(bcm, 0x04A0,
1014                                   (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFC0) | 0x001A);
1015                 if (bcm->current_core->rev < 5) {
1016                         bcm43xx_phy_write(bcm, 0x0406, 0x280D);
1017                 } else {
1018                         bcm43xx_phy_write(bcm, 0x04C0, 0x0640);
1019                         bcm43xx_phy_write(bcm, 0x04C1, 0x00A9);
1020                 }
1021
1022                 bcm43xx_phy_write(bcm, 0x04A1,
1023                                   (bcm43xx_phy_read(bcm, 0x04A1) & 0xC0FF) | 0x1800);
1024                 bcm43xx_phy_write(bcm, 0x04A1,
1025                                   (bcm43xx_phy_read(bcm, 0x04A1) & 0xFFC0) | 0x0016);
1026                 bcm43xx_phy_write(bcm, 0x04A2,
1027                                   (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0900);
1028                 bcm43xx_phy_write(bcm, 0x04A0,
1029                                   (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0700);
1030                 bcm43xx_phy_write(bcm, 0x04A2,
1031                                   (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x000D);
1032                 bcm43xx_phy_write(bcm, 0x04A8,
1033                                   (bcm43xx_phy_read(bcm, 0x04A8) & 0xCFFF) | 0x1000);
1034                 bcm43xx_phy_write(bcm, 0x04A8,
1035                                   (bcm43xx_phy_read(bcm, 0x04A8) & 0xF0FF) | 0x0A00);
1036                 bcm43xx_phy_write(bcm, 0x04AB,
1037                                   (bcm43xx_phy_read(bcm, 0x04AB) & 0xCFFF) | 0x1000);
1038                 bcm43xx_phy_write(bcm, 0x04AB,
1039                                   (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0800);
1040                 bcm43xx_phy_write(bcm, 0x04AB,
1041                                   (bcm43xx_phy_read(bcm, 0x04AB) & 0xFFCF) | 0x0010);
1042                 bcm43xx_phy_write(bcm, 0x04AB,
1043                                   (bcm43xx_phy_read(bcm, 0x04AB) & 0xFFF0) | 0x0006);
1044
1045                 bcm43xx_calc_nrssi_slope(bcm);
1046                 break;
1047         default:
1048                 assert(0);
1049         }
1050 }
1051
1052 static void
1053 bcm43xx_radio_interference_mitigation_disable(struct bcm43xx_private *bcm,
1054                                               int mode)
1055 {
1056         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1057         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1058         int i = 0;
1059         u16 *stack = radio->interfstack;
1060         u16 tmp, flipped;
1061
1062         switch (mode) {
1063         case BCM43xx_RADIO_INTERFMODE_NONWLAN:
1064                 if (phy->rev != 1) {
1065                         bcm43xx_phy_write(bcm, 0x042B,
1066                                           bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
1067                         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
1068                                           bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x4000);
1069                         break;
1070                 }
1071                 tmp = (bcm43xx_radio_read16(bcm, 0x0078) & 0x001E);
1072                 flipped = flip_4bit(tmp);
1073                 if ((flipped >> 1) >= 0x000C)
1074                         tmp = flipped + 3;
1075                 tmp = flip_4bit(tmp);
1076                 bcm43xx_radio_write16(bcm, 0x0078, tmp << 1);
1077
1078                 bcm43xx_calc_nrssi_threshold(bcm);
1079
1080                 if (bcm->current_core->rev < 5) {
1081                         bcm43xx_phy_write(bcm, 0x0406, stack_restore());
1082                 } else {
1083                         bcm43xx_phy_write(bcm, 0x04C0, stack_restore());
1084                         bcm43xx_phy_write(bcm, 0x04C1, stack_restore());
1085                 }
1086                 bcm43xx_phy_write(bcm, 0x042B,
1087                                   bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
1088
1089                 if (!bcm->bad_frames_preempt)
1090                         bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
1091                                           bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) & ~(1 << 11));
1092                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
1093                                   bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x4000);
1094                 bcm43xx_phy_write(bcm, 0x04A0, stack_restore());
1095                 bcm43xx_phy_write(bcm, 0x04A1, stack_restore());
1096                 bcm43xx_phy_write(bcm, 0x04A2, stack_restore());
1097                 bcm43xx_phy_write(bcm, 0x04A8, stack_restore());
1098                 bcm43xx_phy_write(bcm, 0x04AB, stack_restore());
1099                 bcm43xx_phy_write(bcm, 0x04A7, stack_restore());
1100                 bcm43xx_phy_write(bcm, 0x04A3, stack_restore());
1101                 bcm43xx_phy_write(bcm, 0x04A9, stack_restore());
1102                 bcm43xx_phy_write(bcm, 0x0493, stack_restore());
1103                 bcm43xx_phy_write(bcm, 0x04AA, stack_restore());
1104                 bcm43xx_phy_write(bcm, 0x04AC, stack_restore());
1105                 break;
1106         case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
1107                 if (bcm43xx_phy_read(bcm, 0x0033) != 0x0800)
1108                         break;
1109
1110                 radio->aci_enable = 0;
1111
1112                 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD, stack_restore());
1113                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, stack_restore());
1114                 if (bcm->current_core->rev < 5) {
1115                         bcm43xx_phy_write(bcm, 0x0406, stack_restore());
1116                 } else {
1117                         bcm43xx_phy_write(bcm, 0x04C0, stack_restore());
1118                         bcm43xx_phy_write(bcm, 0x04C1, stack_restore());
1119                 }
1120                 bcm43xx_phy_write(bcm, 0x0033, stack_restore());
1121                 bcm43xx_phy_write(bcm, 0x04A7, stack_restore());
1122                 bcm43xx_phy_write(bcm, 0x04A3, stack_restore());
1123                 bcm43xx_phy_write(bcm, 0x04A9, stack_restore());
1124                 bcm43xx_phy_write(bcm, 0x04AA, stack_restore());
1125                 bcm43xx_phy_write(bcm, 0x04AC, stack_restore());
1126                 bcm43xx_phy_write(bcm, 0x0493, stack_restore());
1127                 bcm43xx_phy_write(bcm, 0x04A1, stack_restore());
1128                 bcm43xx_phy_write(bcm, 0x04A0, stack_restore());
1129                 bcm43xx_phy_write(bcm, 0x04A2, stack_restore());
1130                 bcm43xx_phy_write(bcm, 0x04A8, stack_restore());
1131                 bcm43xx_phy_write(bcm, 0x04AB, stack_restore());
1132
1133                 bcm43xx_calc_nrssi_slope(bcm);
1134                 break;
1135         default:
1136                 assert(0);
1137         }
1138 }
1139
1140 #undef stack_save
1141 #undef stack_restore
1142
1143 int bcm43xx_radio_set_interference_mitigation(struct bcm43xx_private *bcm,
1144                                               int mode)
1145 {
1146         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1147         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1148         int currentmode;
1149
1150         if ((phy->type != BCM43xx_PHYTYPE_G) ||
1151             (phy->rev == 0) ||
1152             (!phy->connected))
1153                 return -ENODEV;
1154
1155         radio->aci_wlan_automatic = 0;
1156         switch (mode) {
1157         case BCM43xx_RADIO_INTERFMODE_AUTOWLAN:
1158                 radio->aci_wlan_automatic = 1;
1159                 if (radio->aci_enable)
1160                         mode = BCM43xx_RADIO_INTERFMODE_MANUALWLAN;
1161                 else
1162                         mode = BCM43xx_RADIO_INTERFMODE_NONE;
1163                 break;
1164         case BCM43xx_RADIO_INTERFMODE_NONE:
1165         case BCM43xx_RADIO_INTERFMODE_NONWLAN:
1166         case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
1167                 break;
1168         default:
1169                 return -EINVAL;
1170         }
1171
1172         currentmode = radio->interfmode;
1173         if (currentmode == mode)
1174                 return 0;
1175         if (currentmode != BCM43xx_RADIO_INTERFMODE_NONE)
1176                 bcm43xx_radio_interference_mitigation_disable(bcm, currentmode);
1177
1178         if (mode == BCM43xx_RADIO_INTERFMODE_NONE) {
1179                 radio->aci_enable = 0;
1180                 radio->aci_hw_rssi = 0;
1181         } else
1182                 bcm43xx_radio_interference_mitigation_enable(bcm, mode);
1183         radio->interfmode = mode;
1184
1185         return 0;
1186 }
1187
1188 u16 bcm43xx_radio_calibrationvalue(struct bcm43xx_private *bcm)
1189 {
1190         u16 reg, index, ret;
1191
1192         reg = bcm43xx_radio_read16(bcm, 0x0060);
1193         index = (reg & 0x001E) >> 1;
1194         ret = rcc_table[index] << 1;
1195         ret |= (reg & 0x0001);
1196         ret |= 0x0020;
1197
1198         return ret;
1199 }
1200
1201 u16 bcm43xx_radio_init2050(struct bcm43xx_private *bcm)
1202 {
1203         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1204         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1205         u16 backup[19] = { 0 };
1206         u16 ret;
1207         u16 i, j;
1208         u32 tmp1 = 0, tmp2 = 0;
1209
1210         backup[0] = bcm43xx_radio_read16(bcm, 0x0043);
1211         backup[14] = bcm43xx_radio_read16(bcm, 0x0051);
1212         backup[15] = bcm43xx_radio_read16(bcm, 0x0052);
1213         backup[1] = bcm43xx_phy_read(bcm, 0x0015);
1214         backup[16] = bcm43xx_phy_read(bcm, 0x005A);
1215         backup[17] = bcm43xx_phy_read(bcm, 0x0059);
1216         backup[18] = bcm43xx_phy_read(bcm, 0x0058);
1217         if (phy->type == BCM43xx_PHYTYPE_B) {
1218                 backup[2] = bcm43xx_phy_read(bcm, 0x0030);
1219                 backup[3] = bcm43xx_read16(bcm, 0x03EC);
1220                 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1221                 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1222         } else {
1223                 if (phy->connected) {
1224                         backup[4] = bcm43xx_phy_read(bcm, 0x0811);
1225                         backup[5] = bcm43xx_phy_read(bcm, 0x0812);
1226                         backup[6] = bcm43xx_phy_read(bcm, 0x0814);
1227                         backup[7] = bcm43xx_phy_read(bcm, 0x0815);
1228                         backup[8] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1229                         backup[9] = bcm43xx_phy_read(bcm, 0x0802);
1230                         bcm43xx_phy_write(bcm, 0x0814,
1231                                           (bcm43xx_phy_read(bcm, 0x0814) | 0x0003));
1232                         bcm43xx_phy_write(bcm, 0x0815,
1233                                           (bcm43xx_phy_read(bcm, 0x0815) & 0xFFFC));
1234                         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
1235                                           (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF));
1236                         bcm43xx_phy_write(bcm, 0x0802,
1237                                           (bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC));
1238                         bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1239                         bcm43xx_phy_write(bcm, 0x0812, 0x0FB2);
1240                 }
1241                 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO,
1242                                 (bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_RADIO) | 0x8000));
1243         }
1244         backup[10] = bcm43xx_phy_read(bcm, 0x0035);
1245         bcm43xx_phy_write(bcm, 0x0035,
1246                           (bcm43xx_phy_read(bcm, 0x0035) & 0xFF7F));
1247         backup[11] = bcm43xx_read16(bcm, 0x03E6);
1248         backup[12] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1249
1250         // Initialization
1251         if (phy->version == 0) {
1252                 bcm43xx_write16(bcm, 0x03E6, 0x0122);
1253         } else {
1254                 if (phy->version >= 2)
1255                         bcm43xx_write16(bcm, 0x03E6, 0x0040);
1256                 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
1257                                 (bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT) | 0x2000));
1258         }
1259
1260         ret = bcm43xx_radio_calibrationvalue(bcm);
1261
1262         if (phy->type == BCM43xx_PHYTYPE_B)
1263                 bcm43xx_radio_write16(bcm, 0x0078, 0x0003);
1264
1265         bcm43xx_phy_write(bcm, 0x0015, 0xBFAF);
1266         bcm43xx_phy_write(bcm, 0x002B, 0x1403);
1267         if (phy->connected)
1268                 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1269         bcm43xx_phy_write(bcm, 0x0015, 0xBFA0);
1270         bcm43xx_radio_write16(bcm, 0x0051,
1271                               (bcm43xx_radio_read16(bcm, 0x0051) | 0x0004));
1272         bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1273         bcm43xx_radio_write16(bcm, 0x0043,
1274                               bcm43xx_radio_read16(bcm, 0x0043) | 0x0009);
1275         bcm43xx_phy_write(bcm, 0x0058, 0x0000);
1276
1277         for (i = 0; i < 16; i++) {
1278                 bcm43xx_phy_write(bcm, 0x005A, 0x0480);
1279                 bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1280                 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
1281                 if (phy->connected)
1282                         bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1283                 bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
1284                 udelay(10);
1285                 if (phy->connected)
1286                         bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1287                 bcm43xx_phy_write(bcm, 0x0015, 0xEFB0);
1288                 udelay(10);
1289                 if (phy->connected)
1290                         bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1291                 bcm43xx_phy_write(bcm, 0x0015, 0xFFF0);
1292                 udelay(10);
1293                 tmp1 += bcm43xx_phy_read(bcm, 0x002D);
1294                 bcm43xx_phy_write(bcm, 0x0058, 0x0000);
1295                 if (phy->connected)
1296                         bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1297                 bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
1298         }
1299
1300         tmp1++;
1301         tmp1 >>= 9;
1302         udelay(10);
1303         bcm43xx_phy_write(bcm, 0x0058, 0x0000);
1304
1305         for (i = 0; i < 16; i++) {
1306                 bcm43xx_radio_write16(bcm, 0x0078, (flip_4bit(i) << 1) | 0x0020);
1307                 backup[13] = bcm43xx_radio_read16(bcm, 0x0078);
1308                 udelay(10);
1309                 for (j = 0; j < 16; j++) {
1310                         bcm43xx_phy_write(bcm, 0x005A, 0x0D80);
1311                         bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1312                         bcm43xx_phy_write(bcm, 0x0058, 0x000D);
1313                         if (phy->connected)
1314                                 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1315                         bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
1316                         udelay(10);
1317                         if (phy->connected)
1318                                 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1319                         bcm43xx_phy_write(bcm, 0x0015, 0xEFB0);
1320                         udelay(10);
1321                         if (phy->connected)
1322                                 bcm43xx_phy_write(bcm, 0x0812, 0x30B3); /* 0x30B3 is not a typo */
1323                         bcm43xx_phy_write(bcm, 0x0015, 0xFFF0);
1324                         udelay(10);
1325                         tmp2 += bcm43xx_phy_read(bcm, 0x002D);
1326                         bcm43xx_phy_write(bcm, 0x0058, 0x0000);
1327                         if (phy->connected)
1328                                 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1329                         bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
1330                 }
1331                 tmp2++;
1332                 tmp2 >>= 8;
1333                 if (tmp1 < tmp2)
1334                         break;
1335         }
1336
1337         /* Restore the registers */
1338         bcm43xx_phy_write(bcm, 0x0015, backup[1]);
1339         bcm43xx_radio_write16(bcm, 0x0051, backup[14]);
1340         bcm43xx_radio_write16(bcm, 0x0052, backup[15]);
1341         bcm43xx_radio_write16(bcm, 0x0043, backup[0]);
1342         bcm43xx_phy_write(bcm, 0x005A, backup[16]);
1343         bcm43xx_phy_write(bcm, 0x0059, backup[17]);
1344         bcm43xx_phy_write(bcm, 0x0058, backup[18]);
1345         bcm43xx_write16(bcm, 0x03E6, backup[11]);
1346         if (phy->version != 0)
1347                 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, backup[12]);
1348         bcm43xx_phy_write(bcm, 0x0035, backup[10]);
1349         bcm43xx_radio_selectchannel(bcm, radio->channel, 1);
1350         if (phy->type == BCM43xx_PHYTYPE_B) {
1351                 bcm43xx_phy_write(bcm, 0x0030, backup[2]);
1352                 bcm43xx_write16(bcm, 0x03EC, backup[3]);
1353         } else {
1354                 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO,
1355                                 (bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_RADIO) & 0x7FFF));
1356                 if (phy->connected) {
1357                         bcm43xx_phy_write(bcm, 0x0811, backup[4]);
1358                         bcm43xx_phy_write(bcm, 0x0812, backup[5]);
1359                         bcm43xx_phy_write(bcm, 0x0814, backup[6]);
1360                         bcm43xx_phy_write(bcm, 0x0815, backup[7]);
1361                         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, backup[8]);
1362                         bcm43xx_phy_write(bcm, 0x0802, backup[9]);
1363                 }
1364         }
1365         if (i >= 15)
1366                 ret = backup[13];
1367
1368         return ret;
1369 }
1370
1371 void bcm43xx_radio_init2060(struct bcm43xx_private *bcm)
1372 {
1373         int err;
1374
1375         bcm43xx_radio_write16(bcm, 0x0004, 0x00C0);
1376         bcm43xx_radio_write16(bcm, 0x0005, 0x0008);
1377         bcm43xx_radio_write16(bcm, 0x0009, 0x0040);
1378         bcm43xx_radio_write16(bcm, 0x0005, 0x00AA);
1379         bcm43xx_radio_write16(bcm, 0x0032, 0x008F);
1380         bcm43xx_radio_write16(bcm, 0x0006, 0x008F);
1381         bcm43xx_radio_write16(bcm, 0x0034, 0x008F);
1382         bcm43xx_radio_write16(bcm, 0x002C, 0x0007);
1383         bcm43xx_radio_write16(bcm, 0x0082, 0x0080);
1384         bcm43xx_radio_write16(bcm, 0x0080, 0x0000);
1385         bcm43xx_radio_write16(bcm, 0x003F, 0x00DA);
1386         bcm43xx_radio_write16(bcm, 0x0005, bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008);
1387         bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0010);
1388         bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020);
1389         bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020);
1390         udelay(400);
1391
1392         bcm43xx_radio_write16(bcm, 0x0081, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020) | 0x0010);
1393         udelay(400);
1394
1395         bcm43xx_radio_write16(bcm, 0x0005, (bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008) | 0x0008);
1396         bcm43xx_radio_write16(bcm, 0x0085, bcm43xx_radio_read16(bcm, 0x0085) & ~0x0010);
1397         bcm43xx_radio_write16(bcm, 0x0005, bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008);
1398         bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0040);
1399         bcm43xx_radio_write16(bcm, 0x0081, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0040) | 0x0040);
1400         bcm43xx_radio_write16(bcm, 0x0005, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0008) | 0x0008);
1401         bcm43xx_phy_write(bcm, 0x0063, 0xDDC6);
1402         bcm43xx_phy_write(bcm, 0x0069, 0x07BE);
1403         bcm43xx_phy_write(bcm, 0x006A, 0x0000);
1404
1405         err = bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_A, 0);
1406         assert(err == 0);
1407         udelay(1000);
1408 }
1409
1410 static inline
1411 u16 freq_r3A_value(u16 frequency)
1412 {
1413         u16 value;
1414
1415         if (frequency < 5091)
1416                 value = 0x0040;
1417         else if (frequency < 5321)
1418                 value = 0x0000;
1419         else if (frequency < 5806)
1420                 value = 0x0080;
1421         else
1422                 value = 0x0040;
1423
1424         return value;
1425 }
1426
1427 void bcm43xx_radio_set_tx_iq(struct bcm43xx_private *bcm)
1428 {
1429         static const u8 data_high[5] = { 0x00, 0x40, 0x80, 0x90, 0xD0 };
1430         static const u8 data_low[5]  = { 0x00, 0x01, 0x05, 0x06, 0x0A };
1431         u16 tmp = bcm43xx_radio_read16(bcm, 0x001E);
1432         int i, j;
1433
1434         for (i = 0; i < 5; i++) {
1435                 for (j = 0; j < 5; j++) {
1436                         if (tmp == (data_high[i] << 4 | data_low[j])) {
1437                                 bcm43xx_phy_write(bcm, 0x0069, (i - j) << 8 | 0x00C0);
1438                                 return;
1439                         }
1440                 }
1441         }
1442 }
1443
1444 int bcm43xx_radio_selectchannel(struct bcm43xx_private *bcm,
1445                                 u8 channel,
1446                                 int synthetic_pu_workaround)
1447 {
1448         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1449         u16 r8, tmp;
1450         u16 freq;
1451
1452         if ((radio->manufact == 0x17F) &&
1453             (radio->version == 0x2060) &&
1454             (radio->revision == 1)) {
1455                 if (channel > 200)
1456                         return -EINVAL;
1457                 freq = channel2freq_a(channel);
1458
1459                 r8 = bcm43xx_radio_read16(bcm, 0x0008);
1460                 bcm43xx_write16(bcm, 0x03F0, freq);
1461                 bcm43xx_radio_write16(bcm, 0x0008, r8);
1462
1463                 TODO();//TODO: write max channel TX power? to Radio 0x2D
1464                 tmp = bcm43xx_radio_read16(bcm, 0x002E);
1465                 tmp &= 0x0080;
1466                 TODO();//TODO: OR tmp with the Power out estimation for this channel?
1467                 bcm43xx_radio_write16(bcm, 0x002E, tmp);
1468
1469                 if (freq >= 4920 && freq <= 5500) {
1470                         /*
1471                          * r8 = (((freq * 15 * 0xE1FC780F) >> 32) / 29) & 0x0F;
1472                          *    = (freq * 0.025862069
1473                          */
1474                         r8 = 3 * freq / 116; /* is equal to r8 = freq * 0.025862 */
1475                 }
1476                 bcm43xx_radio_write16(bcm, 0x0007, (r8 << 4) | r8);
1477                 bcm43xx_radio_write16(bcm, 0x0020, (r8 << 4) | r8);
1478                 bcm43xx_radio_write16(bcm, 0x0021, (r8 << 4) | r8);
1479                 bcm43xx_radio_write16(bcm, 0x0022,
1480                                       (bcm43xx_radio_read16(bcm, 0x0022)
1481                                        & 0x000F) | (r8 << 4));
1482                 bcm43xx_radio_write16(bcm, 0x002A, (r8 << 4));
1483                 bcm43xx_radio_write16(bcm, 0x002B, (r8 << 4));
1484                 bcm43xx_radio_write16(bcm, 0x0008,
1485                                       (bcm43xx_radio_read16(bcm, 0x0008)
1486                                        & 0x00F0) | (r8 << 4));
1487                 bcm43xx_radio_write16(bcm, 0x0029,
1488                                       (bcm43xx_radio_read16(bcm, 0x0029)
1489                                        & 0xFF0F) | 0x00B0);
1490                 bcm43xx_radio_write16(bcm, 0x0035, 0x00AA);
1491                 bcm43xx_radio_write16(bcm, 0x0036, 0x0085);
1492                 bcm43xx_radio_write16(bcm, 0x003A,
1493                                       (bcm43xx_radio_read16(bcm, 0x003A)
1494                                        & 0xFF20) | freq_r3A_value(freq));
1495                 bcm43xx_radio_write16(bcm, 0x003D,
1496                                       bcm43xx_radio_read16(bcm, 0x003D) & 0x00FF);
1497                 bcm43xx_radio_write16(bcm, 0x0081,
1498                                       (bcm43xx_radio_read16(bcm, 0x0081)
1499                                        & 0xFF7F) | 0x0080);
1500                 bcm43xx_radio_write16(bcm, 0x0035,
1501                                       bcm43xx_radio_read16(bcm, 0x0035) & 0xFFEF);
1502                 bcm43xx_radio_write16(bcm, 0x0035,
1503                                       (bcm43xx_radio_read16(bcm, 0x0035)
1504                                        & 0xFFEF) | 0x0010);
1505                 bcm43xx_radio_set_tx_iq(bcm);
1506                 TODO(); //TODO: TSSI2dbm workaround
1507                 bcm43xx_phy_xmitpower(bcm);//FIXME correct?
1508         } else {
1509                 if ((channel < 1) || (channel > 14))
1510                         return -EINVAL;
1511
1512                 if (synthetic_pu_workaround)
1513                         bcm43xx_synth_pu_workaround(bcm, channel);
1514
1515                 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
1516                                 channel2freq_bg(channel));
1517
1518                 if (channel == 14) {
1519                         if (bcm->sprom.locale == BCM43xx_LOCALE_JAPAN) {
1520                                 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
1521                                                     BCM43xx_UCODEFLAGS_OFFSET,
1522                                                     bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
1523                                                                        BCM43xx_UCODEFLAGS_OFFSET)
1524                                                     & ~(1 << 7));
1525                         } else {
1526                                 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
1527                                                     BCM43xx_UCODEFLAGS_OFFSET,
1528                                                     bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
1529                                                                        BCM43xx_UCODEFLAGS_OFFSET)
1530                                                     | (1 << 7));
1531                         }
1532                         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
1533                                         bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
1534                                         | (1 << 11));
1535                 } else {
1536                         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
1537                                         bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
1538                                         & 0xF7BF);
1539                 }
1540         }
1541
1542         radio->channel = channel;
1543         //XXX: Using the longer of 2 timeouts (8000 vs 2000 usecs). Specs states
1544         //     that 2000 usecs might suffice.
1545         udelay(8000);
1546
1547         return 0;
1548 }
1549
1550 void bcm43xx_radio_set_txantenna(struct bcm43xx_private *bcm, u32 val)
1551 {
1552         u16 tmp;
1553
1554         val <<= 8;
1555         tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0022) & 0xFCFF;
1556         bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0022, tmp | val);
1557         tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x03A8) & 0xFCFF;
1558         bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x03A8, tmp | val);
1559         tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0054) & 0xFCFF;
1560         bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0054, tmp | val);
1561 }
1562
1563 /* http://bcm-specs.sipsolutions.net/TX_Gain_Base_Band */
1564 static u16 bcm43xx_get_txgain_base_band(u16 txpower)
1565 {
1566         u16 ret;
1567
1568         assert(txpower <= 63);
1569
1570         if (txpower >= 54)
1571                 ret = 2;
1572         else if (txpower >= 49)
1573                 ret = 4;
1574         else if (txpower >= 44)
1575                 ret = 5;
1576         else
1577                 ret = 6;
1578
1579         return ret;
1580 }
1581
1582 /* http://bcm-specs.sipsolutions.net/TX_Gain_Radio_Frequency_Power_Amplifier */
1583 static u16 bcm43xx_get_txgain_freq_power_amp(u16 txpower)
1584 {
1585         u16 ret;
1586
1587         assert(txpower <= 63);
1588
1589         if (txpower >= 32)
1590                 ret = 0;
1591         else if (txpower >= 25)
1592                 ret = 1;
1593         else if (txpower >= 20)
1594                 ret = 2;
1595         else if (txpower >= 12)
1596                 ret = 3;
1597         else
1598                 ret = 4;
1599
1600         return ret;
1601 }
1602
1603 /* http://bcm-specs.sipsolutions.net/TX_Gain_Digital_Analog_Converter */
1604 static u16 bcm43xx_get_txgain_dac(u16 txpower)
1605 {
1606         u16 ret;
1607
1608         assert(txpower <= 63);
1609
1610         if (txpower >= 54)
1611                 ret = txpower - 53;
1612         else if (txpower >= 49)
1613                 ret = txpower - 42;
1614         else if (txpower >= 44)
1615                 ret = txpower - 37;
1616         else if (txpower >= 32)
1617                 ret = txpower - 32;
1618         else if (txpower >= 25)
1619                 ret = txpower - 20;
1620         else if (txpower >= 20)
1621                 ret = txpower - 13;
1622         else if (txpower >= 12)
1623                 ret = txpower - 8;
1624         else
1625                 ret = txpower;
1626
1627         return ret;
1628 }
1629
1630 void bcm43xx_radio_set_txpower_a(struct bcm43xx_private *bcm, u16 txpower)
1631 {
1632         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1633         u16 pamp, base, dac, ilt;
1634
1635         txpower = limit_value(txpower, 0, 63);
1636
1637         pamp = bcm43xx_get_txgain_freq_power_amp(txpower);
1638         pamp <<= 5;
1639         pamp &= 0x00E0;
1640         bcm43xx_phy_write(bcm, 0x0019, pamp);
1641
1642         base = bcm43xx_get_txgain_base_band(txpower);
1643         base &= 0x000F;
1644         bcm43xx_phy_write(bcm, 0x0017, base | 0x0020);
1645
1646         ilt = bcm43xx_ilt_read(bcm, 0x3001);
1647         ilt &= 0x0007;
1648
1649         dac = bcm43xx_get_txgain_dac(txpower);
1650         dac <<= 3;
1651         dac |= ilt;
1652
1653         bcm43xx_ilt_write(bcm, 0x3001, dac);
1654
1655         radio->txpower[0] = txpower;
1656
1657         TODO();
1658         //TODO: FuncPlaceholder (Adjust BB loft cancel)
1659 }
1660
1661 void bcm43xx_radio_set_txpower_bg(struct bcm43xx_private *bcm,
1662                                  u16 baseband_attenuation, u16 radio_attenuation,
1663                                  u16 txpower)
1664 {
1665         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1666         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1667
1668         if (baseband_attenuation == 0xFFFF)
1669                 baseband_attenuation = radio->txpower[0];
1670         else
1671                 radio->txpower[0] = baseband_attenuation;
1672         if (radio_attenuation == 0xFFFF)
1673                 radio_attenuation = radio->txpower[1];
1674         else
1675                 radio->txpower[1] = radio_attenuation;
1676         if (txpower == 0xFFFF)
1677                 txpower = radio->txpower[2];
1678         else
1679                 radio->txpower[2] = txpower;
1680
1681         assert(/*baseband_attenuation >= 0 &&*/ baseband_attenuation <= 11);
1682         if (radio->revision < 6)
1683                 assert(/*radio_attenuation >= 0 &&*/ radio_attenuation <= 9);
1684         else
1685                 assert(/* radio_attenuation >= 0 &&*/ radio_attenuation <= 31);
1686         assert(/*txpower >= 0 &&*/ txpower <= 7);
1687
1688         bcm43xx_phy_set_baseband_attenuation(bcm, baseband_attenuation);
1689         bcm43xx_radio_write16(bcm, 0x0043, radio_attenuation);
1690         bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0064, radio_attenuation);
1691         if (radio->version == 0x2050) {
1692                 bcm43xx_radio_write16(bcm, 0x0052,
1693                                       (bcm43xx_radio_read16(bcm, 0x0052) & ~0x0070)
1694                                        | ((txpower << 4) & 0x0070));
1695         }
1696         if (phy->type == BCM43xx_PHYTYPE_G)
1697                 bcm43xx_phy_lo_adjust(bcm, 0);
1698 }
1699
1700
1701 void bcm43xx_radio_turn_on(struct bcm43xx_private *bcm)
1702 {
1703         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1704         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1705         int err;
1706
1707         if (radio->enabled)
1708                 return;
1709
1710         switch (phy->type) {
1711         case BCM43xx_PHYTYPE_A:
1712                 bcm43xx_radio_write16(bcm, 0x0004, 0x00C0);
1713                 bcm43xx_radio_write16(bcm, 0x0005, 0x0008);
1714                 bcm43xx_phy_write(bcm, 0x0010, bcm43xx_phy_read(bcm, 0x0010) & 0xFFF7);
1715                 bcm43xx_phy_write(bcm, 0x0011, bcm43xx_phy_read(bcm, 0x0011) & 0xFFF7);
1716                 bcm43xx_radio_init2060(bcm);
1717                 break;
1718         case BCM43xx_PHYTYPE_B:
1719         case BCM43xx_PHYTYPE_G:
1720                 bcm43xx_phy_write(bcm, 0x0015, 0x8000);
1721                 bcm43xx_phy_write(bcm, 0x0015, 0xCC00);
1722                 bcm43xx_phy_write(bcm, 0x0015, (phy->connected ? 0x00C0 : 0x0000));
1723                 err = bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 1);
1724                 assert(err == 0);
1725                 break;
1726         default:
1727                 assert(0);
1728         }
1729         radio->enabled = 1;
1730         dprintk(KERN_INFO PFX "Radio turned on\n");
1731 }
1732
1733 void bcm43xx_radio_turn_off(struct bcm43xx_private *bcm)
1734 {
1735         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1736         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1737
1738         if (phy->type == BCM43xx_PHYTYPE_A) {
1739                 bcm43xx_radio_write16(bcm, 0x0004, 0x00FF);
1740                 bcm43xx_radio_write16(bcm, 0x0005, 0x00FB);
1741                 bcm43xx_phy_write(bcm, 0x0010, bcm43xx_phy_read(bcm, 0x0010) | 0x0008);
1742                 bcm43xx_phy_write(bcm, 0x0011, bcm43xx_phy_read(bcm, 0x0011) | 0x0008);
1743         }
1744         if (phy->type == BCM43xx_PHYTYPE_G && bcm->current_core->rev >= 5) {
1745                 bcm43xx_phy_write(bcm, 0x0811, bcm43xx_phy_read(bcm, 0x0811) | 0x008C);
1746                 bcm43xx_phy_write(bcm, 0x0812, bcm43xx_phy_read(bcm, 0x0812) & 0xFF73);
1747         } else
1748                 bcm43xx_phy_write(bcm, 0x0015, 0xAA00);
1749         radio->enabled = 0;
1750         dprintk(KERN_INFO PFX "Radio turned off\n");
1751 }
1752
1753 void bcm43xx_radio_clear_tssi(struct bcm43xx_private *bcm)
1754 {
1755         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1756
1757         switch (phy->type) {
1758         case BCM43xx_PHYTYPE_A:
1759                 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0068, 0x7F7F);
1760                 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x006a, 0x7F7F);
1761                 break;
1762         case BCM43xx_PHYTYPE_B:
1763         case BCM43xx_PHYTYPE_G:
1764                 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0058, 0x7F7F);
1765                 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x005a, 0x7F7F);
1766                 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0070, 0x7F7F);
1767                 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0072, 0x7F7F);
1768                 break;
1769         }
1770 }