drivers/net/wireless/rtl818x/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * The driver was extended to the RTL8187B in 2008 by:
  11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13  *      Larry Finger <Larry.Finger@lwfinger.net>
  14  *
  15  * Magic delays and register offsets below are taken from the original
  16  * r8187 driver sources.  Thanks to Realtek for their support!
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License version 2 as
  20  * published by the Free Software Foundation.
  21  */
  22
  23 #include <linux/init.h>
  24 #include <linux/usb.h>
  25 #include <linux/delay.h>
  26 #include <linux/etherdevice.h>
  27 #include <linux/eeprom_93cx6.h>
  28 #include <net/mac80211.h>
  29
  30 #include "rtl8187.h"
  31 #include "rtl8187_rtl8225.h"
  32
  33 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  34 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  35 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  36 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  37 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  38 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  39 MODULE_LICENSE("GPL");
  40
  41 static struct usb_device_id rtl8187_table[] __devinitdata = {
  42         /* Asus */
  43         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  44         /* Belkin */
  45         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  46         /* Realtek */
  47         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  48         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  49         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  50         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  51         /* Netgear */
  52         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  53         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  54         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  55         /* HP */
  56         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  57         /* Sitecom */
  58         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  59         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  60         /* Abocom */
  61         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  62         {}
  63 };
  64
  65 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  66
  67 static const struct ieee80211_rate rtl818x_rates[] = {
  68         { .bitrate = 10, .hw_value = 0, },
  69         { .bitrate = 20, .hw_value = 1, },
  70         { .bitrate = 55, .hw_value = 2, },
  71         { .bitrate = 110, .hw_value = 3, },
  72         { .bitrate = 60, .hw_value = 4, },
  73         { .bitrate = 90, .hw_value = 5, },
  74         { .bitrate = 120, .hw_value = 6, },
  75         { .bitrate = 180, .hw_value = 7, },
  76         { .bitrate = 240, .hw_value = 8, },
  77         { .bitrate = 360, .hw_value = 9, },
  78         { .bitrate = 480, .hw_value = 10, },
  79         { .bitrate = 540, .hw_value = 11, },
  80 };
  81
  82 static const struct ieee80211_channel rtl818x_channels[] = {
  83         { .center_freq = 2412 },
  84         { .center_freq = 2417 },
  85         { .center_freq = 2422 },
  86         { .center_freq = 2427 },
  87         { .center_freq = 2432 },
  88         { .center_freq = 2437 },
  89         { .center_freq = 2442 },
  90         { .center_freq = 2447 },
  91         { .center_freq = 2452 },
  92         { .center_freq = 2457 },
  93         { .center_freq = 2462 },
  94         { .center_freq = 2467 },
  95         { .center_freq = 2472 },
  96         { .center_freq = 2484 },
  97 };
  98
  99 static void rtl8187_iowrite_async_cb(struct urb *urb)
 100 {
 101         kfree(urb->context);
 102         usb_free_urb(urb);
 103 }
 104
 105 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 106                                   void *data, u16 len)
 107 {
 108         struct usb_ctrlrequest *dr;
 109         struct urb *urb;
 110         struct rtl8187_async_write_data {
 111                 u8 data[4];
 112                 struct usb_ctrlrequest dr;
 113         } *buf;
 114         int rc;
 115
 116         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 117         if (!buf)
 118                 return;
 119
 120         urb = usb_alloc_urb(0, GFP_ATOMIC);
 121         if (!urb) {
 122                 kfree(buf);
 123                 return;
 124         }
 125
 126         dr = &buf->dr;
 127
 128         dr->bRequestType = RTL8187_REQT_WRITE;
 129         dr->bRequest = RTL8187_REQ_SET_REG;
 130         dr->wValue = addr;
 131         dr->wIndex = 0;
 132         dr->wLength = cpu_to_le16(len);
 133
 134         memcpy(buf, data, len);
 135
 136         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 137                              (unsigned char *)dr, buf, len,
 138                              rtl8187_iowrite_async_cb, buf);
 139         rc = usb_submit_urb(urb, GFP_ATOMIC);
 140         if (rc < 0) {
 141                 kfree(buf);
 142                 usb_free_urb(urb);
 143         }
 144 }
 145
 146 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 147                                            __le32 *addr, u32 val)
 148 {
 149         __le32 buf = cpu_to_le32(val);
 150
 151         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 152                               &buf, sizeof(buf));
 153 }
 154
 155 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 156 {
 157         struct rtl8187_priv *priv = dev->priv;
 158
 159         data <<= 8;
 160         data |= addr | 0x80;
 161
 162         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 163         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 164         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 165         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 166 }
 167
 168 static void rtl8187_tx_cb(struct urb *urb)
 169 {
 170         struct sk_buff *skb = (struct sk_buff *)urb->context;
 171         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 172         struct ieee80211_hw *hw = info->rate_driver_data[0];
 173         struct rtl8187_priv *priv = hw->priv;
 174
 175         usb_free_urb(info->rate_driver_data[1]);
 176         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 177                                           sizeof(struct rtl8187_tx_hdr));
 178         ieee80211_tx_info_clear_status(info);
 179         info->flags |= IEEE80211_TX_STAT_ACK;
 180         ieee80211_tx_status_irqsafe(hw, skb);
 181 }
 182
 183 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 184 {
 185         struct rtl8187_priv *priv = dev->priv;
 186         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 187         unsigned int ep;
 188         void *buf;
 189         struct urb *urb;
 190         __le16 rts_dur = 0;
 191         u32 flags;
 192         int rc;
 193
 194         urb = usb_alloc_urb(0, GFP_ATOMIC);
 195         if (!urb) {
 196                 kfree_skb(skb);
 197                 return 0;
 198         }
 199
 200         flags = skb->len;
 201         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 202
 203         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 204         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 205                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 206         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 207                 flags |= RTL818X_TX_DESC_FLAG_RTS;
 208                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 209                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 210                                                  skb->len, info);
 211         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 212                 flags |= RTL818X_TX_DESC_FLAG_CTS;
 213                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 214         }
 215
 216         if (!priv->is_rtl8187b) {
 217                 struct rtl8187_tx_hdr *hdr =
 218                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 219                 hdr->flags = cpu_to_le32(flags);
 220                 hdr->len = 0;
 221                 hdr->rts_duration = rts_dur;
 222                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 223                 buf = hdr;
 224
 225                 ep = 2;
 226         } else {
 227                 /* fc needs to be calculated before skb_push() */
 228                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 229                 struct ieee80211_hdr *tx_hdr =
 230                         (struct ieee80211_hdr *)(skb->data);
 231                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 232
 233                 struct rtl8187b_tx_hdr *hdr =
 234                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 235                 struct ieee80211_rate *txrate =
 236                         ieee80211_get_tx_rate(dev, info);
 237                 memset(hdr, 0, sizeof(*hdr));
 238                 hdr->flags = cpu_to_le32(flags);
 239                 hdr->rts_duration = rts_dur;
 240                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 241                 hdr->tx_duration =
 242                         ieee80211_generic_frame_duration(dev, priv->vif,
 243                                                          skb->len, txrate);
 244                 buf = hdr;
 245
 246                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 247                         ep = 12;
 248                 else
 249                         ep = epmap[skb_get_queue_mapping(skb)];
 250         }
 251
 252         info->rate_driver_data[0] = dev;
 253         info->rate_driver_data[1] = urb;
 254
 255         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 256                           buf, skb->len, rtl8187_tx_cb, skb);
 257         rc = usb_submit_urb(urb, GFP_ATOMIC);
 258         if (rc < 0) {
 259                 usb_free_urb(urb);
 260                 kfree_skb(skb);
 261         }
 262
 263         return 0;
 264 }
 265
 266 static void rtl8187_rx_cb(struct urb *urb)
 267 {
 268         struct sk_buff *skb = (struct sk_buff *)urb->context;
 269         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 270         struct ieee80211_hw *dev = info->dev;
 271         struct rtl8187_priv *priv = dev->priv;
 272         struct ieee80211_rx_status rx_status = { 0 };
 273         int rate, signal;
 274         u32 flags;
 275         u32 quality;
 276
 277         spin_lock(&priv->rx_queue.lock);
 278         if (skb->next)
 279                 __skb_unlink(skb, &priv->rx_queue);
 280         else {
 281                 spin_unlock(&priv->rx_queue.lock);
 282                 return;
 283         }
 284         spin_unlock(&priv->rx_queue.lock);
 285
 286         if (unlikely(urb->status)) {
 287                 usb_free_urb(urb);
 288                 dev_kfree_skb_irq(skb);
 289                 return;
 290         }
 291
 292         skb_put(skb, urb->actual_length);
 293         if (!priv->is_rtl8187b) {
 294                 struct rtl8187_rx_hdr *hdr =
 295                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 296                 flags = le32_to_cpu(hdr->flags);
 297                 signal = hdr->signal & 0x7f;
 298                 rx_status.antenna = (hdr->signal >> 7) & 1;
 299                 rx_status.noise = hdr->noise;
 300                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 301                 priv->quality = signal;
 302                 rx_status.qual = priv->quality;
 303                 priv->noise = hdr->noise;
 304                 rate = (flags >> 20) & 0xF;
 305                 if (rate > 3) { /* OFDM rate */
 306                         if (signal > 90)
 307                                 signal = 90;
 308                         else if (signal < 25)
 309                                 signal = 25;
 310                         signal = 90 - signal;
 311                 } else {        /* CCK rate */
 312                         if (signal > 95)
 313                                 signal = 95;
 314                         else if (signal < 30)
 315                                 signal = 30;
 316                         signal = 95 - signal;
 317                 }
 318                 rx_status.signal = signal;
 319                 priv->signal = signal;
 320         } else {
 321                 struct rtl8187b_rx_hdr *hdr =
 322                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 323                 /* The Realtek datasheet for the RTL8187B shows that the RX
 324                  * header contains the following quantities: signal quality,
 325                  * RSSI, AGC, the received power in dB, and the measured SNR.
 326                  * In testing, none of these quantities show qualitative
 327                  * agreement with AP signal strength, except for the AGC,
 328                  * which is inversely proportional to the strength of the
 329                  * signal. In the following, the quality and signal strength
 330                  * are derived from the AGC. The arbitrary scaling constants
 331                  * are chosen to make the results close to the values obtained
 332                  * for a BCM4312 using b43 as the driver. The noise is ignored
 333                  * for now.
 334                  */
 335                 flags = le32_to_cpu(hdr->flags);
 336                 quality = 170 - hdr->agc;
 337                 if (quality > 100)
 338                         quality = 100;
 339                 signal = 14 - hdr->agc / 2;
 340                 rx_status.qual = quality;
 341                 priv->quality = quality;
 342                 rx_status.signal = signal;
 343                 priv->signal = signal;
 344                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 345                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 346                 rate = (flags >> 20) & 0xF;
 347         }
 348
 349         skb_trim(skb, flags & 0x0FFF);
 350         rx_status.rate_idx = rate;
 351         rx_status.freq = dev->conf.channel->center_freq;
 352         rx_status.band = dev->conf.channel->band;
 353         rx_status.flag |= RX_FLAG_TSFT;
 354         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 355                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 356         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 357
 358         skb = dev_alloc_skb(RTL8187_MAX_RX);
 359         if (unlikely(!skb)) {
 360                 usb_free_urb(urb);
 361                 /* TODO check rx queue length and refill *somewhere* */
 362                 return;
 363         }
 364
 365         info = (struct rtl8187_rx_info *)skb->cb;
 366         info->urb = urb;
 367         info->dev = dev;
 368         urb->transfer_buffer = skb_tail_pointer(skb);
 369         urb->context = skb;
 370         skb_queue_tail(&priv->rx_queue, skb);
 371
 372         usb_submit_urb(urb, GFP_ATOMIC);
 373 }
 374
 375 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 376 {
 377         struct rtl8187_priv *priv = dev->priv;
 378         struct urb *entry;
 379         struct sk_buff *skb;
 380         struct rtl8187_rx_info *info;
 381
 382         while (skb_queue_len(&priv->rx_queue) < 8) {
 383                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 384                 if (!skb)
 385                         break;
 386                 entry = usb_alloc_urb(0, GFP_KERNEL);
 387                 if (!entry) {
 388                         kfree_skb(skb);
 389                         break;
 390                 }
 391                 usb_fill_bulk_urb(entry, priv->udev,
 392                                   usb_rcvbulkpipe(priv->udev,
 393                                   priv->is_rtl8187b ? 3 : 1),
 394                                   skb_tail_pointer(skb),
 395                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 396                 info = (struct rtl8187_rx_info *)skb->cb;
 397                 info->urb = entry;
 398                 info->dev = dev;
 399                 skb_queue_tail(&priv->rx_queue, skb);
 400                 usb_submit_urb(entry, GFP_KERNEL);
 401         }
 402
 403         return 0;
 404 }
 405
 406 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 407 {
 408         struct rtl8187_priv *priv = dev->priv;
 409         u8 reg;
 410         int i;
 411
 412         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 413         reg &= (1 << 1);
 414         reg |= RTL818X_CMD_RESET;
 415         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 416
 417         i = 10;
 418         do {
 419                 msleep(2);
 420                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 421                       RTL818X_CMD_RESET))
 422                         break;
 423         } while (--i);
 424
 425         if (!i) {
 426                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 427                 return -ETIMEDOUT;
 428         }
 429
 430         /* reload registers from eeprom */
 431         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 432
 433         i = 10;
 434         do {
 435                 msleep(4);
 436                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 437                       RTL818X_EEPROM_CMD_CONFIG))
 438                         break;
 439         } while (--i);
 440
 441         if (!i) {
 442                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
 443                        wiphy_name(dev->wiphy));
 444                 return -ETIMEDOUT;
 445         }
 446
 447         return 0;
 448 }
 449
 450 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 451 {
 452         struct rtl8187_priv *priv = dev->priv;
 453         u8 reg;
 454         int res;
 455
 456         /* reset */
 457         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 458                          RTL818X_EEPROM_CMD_CONFIG);
 459         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 460         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 461                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 462         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 463                           RTL8187_RTL8225_ANAPARAM_ON);
 464         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 465                           RTL8187_RTL8225_ANAPARAM2_ON);
 466         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 467                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 468         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 469                          RTL818X_EEPROM_CMD_NORMAL);
 470
 471         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 472
 473         msleep(200);
 474         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 475         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 476         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 477         msleep(200);
 478
 479         res = rtl8187_cmd_reset(dev);
 480         if (res)
 481                 return res;
 482
 483         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 484         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 485         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 486                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 487         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 488                           RTL8187_RTL8225_ANAPARAM_ON);
 489         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 490                           RTL8187_RTL8225_ANAPARAM2_ON);
 491         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 492                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 493         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 494
 495         /* setup card */
 496         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 497         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 498
 499         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 500         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
 501         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 502
 503         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 504
 505         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 506         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 507         reg &= 0x3F;
 508         reg |= 0x80;
 509         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 510
 511         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 512
 513         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 514         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 515         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 516
 517         // TODO: set RESP_RATE and BRSR properly
 518         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 519         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 520
 521         /* host_usb_init */
 522         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 523         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 524         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 525         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 526         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 527         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
 528         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 529         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 530         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 531         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 532         msleep(100);
 533
 534         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 535         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 536         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 537         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 538                          RTL818X_EEPROM_CMD_CONFIG);
 539         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 540         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 541                          RTL818X_EEPROM_CMD_NORMAL);
 542         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 543         msleep(100);
 544
 545         priv->rf->init(dev);
 546
 547         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 548         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 549         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 550         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 551         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 552         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 553         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 554
 555         return 0;
 556 }
 557
 558 static const u8 rtl8187b_reg_table[][3] = {
 559         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 560         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 561         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 562         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 563
 564         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 565         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 566         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 567         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 568         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 569         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 570
 571         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 572         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 573         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 574         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 575         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 576         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 577         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 578         {0x73, 0x9A, 2},
 579
 580         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 581         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 582         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 583         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 584         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
 585
 586         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
 587         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
 588 };
 589
 590 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 591 {
 592         struct rtl8187_priv *priv = dev->priv;
 593         int res, i;
 594         u8 reg;
 595
 596         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 597                          RTL818X_EEPROM_CMD_CONFIG);
 598
 599         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 600         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 601         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 602         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 603                           RTL8187B_RTL8225_ANAPARAM2_ON);
 604         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 605                           RTL8187B_RTL8225_ANAPARAM_ON);
 606         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 607                          RTL8187B_RTL8225_ANAPARAM3_ON);
 608
 609         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 610         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 611         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 612         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 613
 614         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 615         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 616         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 617
 618         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 619                          RTL818X_EEPROM_CMD_NORMAL);
 620
 621         res = rtl8187_cmd_reset(dev);
 622         if (res)
 623                 return res;
 624
 625         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 626         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 627         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 628         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 629         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 630         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 631                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 632         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 633
 634         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 635         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
 636         reg |= RTL818X_RATE_FALLBACK_ENABLE;
 637         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
 638
 639         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 640         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 641         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 642
 643         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 644                          RTL818X_EEPROM_CMD_CONFIG);
 645         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 646         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 647         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 648                          RTL818X_EEPROM_CMD_NORMAL);
 649
 650         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 651         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 652                 rtl818x_iowrite8_idx(priv,
 653                                      (u8 *)(uintptr_t)
 654                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 655                                      rtl8187b_reg_table[i][1],
 656                                      rtl8187b_reg_table[i][2]);
 657         }
 658
 659         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 660         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 661
 662         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 663         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 664         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 665
 666         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 667
 668         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 669
 670         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 671                          RTL818X_EEPROM_CMD_CONFIG);
 672         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 673         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 674         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 675         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 676                          RTL818X_EEPROM_CMD_NORMAL);
 677
 678         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 679         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 680         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 681         msleep(100);
 682
 683         priv->rf->init(dev);
 684
 685         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 686         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 687         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 688
 689         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 690         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 691         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 692         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 693         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 694         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 695         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 696
 697         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 698         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 699         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 700         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 701         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 702         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 703         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 704         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 705         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 706         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 707         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 708         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 709         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 710
 711         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 712
 713         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 714
 715         priv->slot_time = 0x9;
 716         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 717         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 718         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 719         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 720         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 721
 722         return 0;
 723 }
 724
 725 static int rtl8187_start(struct ieee80211_hw *dev)
 726 {
 727         struct rtl8187_priv *priv = dev->priv;
 728         u32 reg;
 729         int ret;
 730
 731         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 732                                      rtl8187b_init_hw(dev);
 733         if (ret)
 734                 return ret;
 735
 736         mutex_lock(&priv->conf_mutex);
 737         if (priv->is_rtl8187b) {
 738                 reg = RTL818X_RX_CONF_MGMT |
 739                       RTL818X_RX_CONF_DATA |
 740                       RTL818X_RX_CONF_BROADCAST |
 741                       RTL818X_RX_CONF_NICMAC |
 742                       RTL818X_RX_CONF_BSSID |
 743                       (7 << 13 /* RX FIFO threshold NONE */) |
 744                       (7 << 10 /* MAX RX DMA */) |
 745                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 746                       RTL818X_RX_CONF_ONLYERLPKT |
 747                       RTL818X_RX_CONF_MULTICAST;
 748                 priv->rx_conf = reg;
 749                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 750
 751                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 752                                   RTL818X_TX_CONF_HW_SEQNUM |
 753                                   RTL818X_TX_CONF_DISREQQSIZE |
 754                                   (7 << 8  /* short retry limit */) |
 755                                   (7 << 0  /* long retry limit */) |
 756                                   (7 << 21 /* MAX TX DMA */));
 757                 rtl8187_init_urbs(dev);
 758                 mutex_unlock(&priv->conf_mutex);
 759                 return 0;
 760         }
 761
 762         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 763
 764         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 765         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 766
 767         rtl8187_init_urbs(dev);
 768
 769         reg = RTL818X_RX_CONF_ONLYERLPKT |
 770               RTL818X_RX_CONF_RX_AUTORESETPHY |
 771               RTL818X_RX_CONF_BSSID |
 772               RTL818X_RX_CONF_MGMT |
 773               RTL818X_RX_CONF_DATA |
 774               (7 << 13 /* RX FIFO threshold NONE */) |
 775               (7 << 10 /* MAX RX DMA */) |
 776               RTL818X_RX_CONF_BROADCAST |
 777               RTL818X_RX_CONF_NICMAC;
 778
 779         priv->rx_conf = reg;
 780         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 781
 782         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 783         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 784         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 785         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 786
 787         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 788         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 789         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 790         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 791         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 792
 793         reg  = RTL818X_TX_CONF_CW_MIN |
 794                (7 << 21 /* MAX TX DMA */) |
 795                RTL818X_TX_CONF_NO_ICV;
 796         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 797
 798         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 799         reg |= RTL818X_CMD_TX_ENABLE;
 800         reg |= RTL818X_CMD_RX_ENABLE;
 801         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 802         mutex_unlock(&priv->conf_mutex);
 803
 804         return 0;
 805 }
 806
 807 static void rtl8187_stop(struct ieee80211_hw *dev)
 808 {
 809         struct rtl8187_priv *priv = dev->priv;
 810         struct rtl8187_rx_info *info;
 811         struct sk_buff *skb;
 812         u32 reg;
 813
 814         mutex_lock(&priv->conf_mutex);
 815         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 816
 817         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 818         reg &= ~RTL818X_CMD_TX_ENABLE;
 819         reg &= ~RTL818X_CMD_RX_ENABLE;
 820         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 821
 822         priv->rf->stop(dev);
 823
 824         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 825         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 826         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 827         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 828
 829         while ((skb = skb_dequeue(&priv->rx_queue))) {
 830                 info = (struct rtl8187_rx_info *)skb->cb;
 831                 usb_kill_urb(info->urb);
 832                 kfree_skb(skb);
 833         }
 834         mutex_unlock(&priv->conf_mutex);
 835 }
 836
 837 static int rtl8187_add_interface(struct ieee80211_hw *dev,
 838                                  struct ieee80211_if_init_conf *conf)
 839 {
 840         struct rtl8187_priv *priv = dev->priv;
 841         int i;
 842
 843         if (priv->mode != NL80211_IFTYPE_MONITOR)
 844                 return -EOPNOTSUPP;
 845
 846         switch (conf->type) {
 847         case NL80211_IFTYPE_STATION:
 848                 priv->mode = conf->type;
 849                 break;
 850         default:
 851                 return -EOPNOTSUPP;
 852         }
 853
 854         mutex_lock(&priv->conf_mutex);
 855         priv->vif = conf->vif;
 856
 857         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 858         for (i = 0; i < ETH_ALEN; i++)
 859                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
 860                                  ((u8 *)conf->mac_addr)[i]);
 861         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 862
 863         mutex_unlock(&priv->conf_mutex);
 864         return 0;
 865 }
 866
 867 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
 868                                      struct ieee80211_if_init_conf *conf)
 869 {
 870         struct rtl8187_priv *priv = dev->priv;
 871         mutex_lock(&priv->conf_mutex);
 872         priv->mode = NL80211_IFTYPE_MONITOR;
 873         priv->vif = NULL;
 874         mutex_unlock(&priv->conf_mutex);
 875 }
 876
 877 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
 878 {
 879         struct rtl8187_priv *priv = dev->priv;
 880         struct ieee80211_conf *conf = &dev->conf;
 881         u32 reg;
 882
 883         mutex_lock(&priv->conf_mutex);
 884         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 885         /* Enable TX loopback on MAC level to avoid TX during channel
 886          * changes, as this has be seen to causes problems and the
 887          * card will stop work until next reset
 888          */
 889         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 890                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
 891         priv->rf->set_chan(dev, conf);
 892         msleep(10);
 893         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 894
 895         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 896         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
 897         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 898         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
 899         mutex_unlock(&priv->conf_mutex);
 900         return 0;
 901 }
 902
 903 static int rtl8187_config_interface(struct ieee80211_hw *dev,
 904                                     struct ieee80211_vif *vif,
 905                                     struct ieee80211_if_conf *conf)
 906 {
 907         struct rtl8187_priv *priv = dev->priv;
 908         int i;
 909         u8 reg;
 910
 911         mutex_lock(&priv->conf_mutex);
 912         for (i = 0; i < ETH_ALEN; i++)
 913                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 914
 915         if (is_valid_ether_addr(conf->bssid)) {
 916                 reg = RTL818X_MSR_INFRA;
 917                 if (priv->is_rtl8187b)
 918                         reg |= RTL818X_MSR_ENEDCA;
 919                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
 920         } else {
 921                 reg = RTL818X_MSR_NO_LINK;
 922                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
 923         }
 924
 925         mutex_unlock(&priv->conf_mutex);
 926         return 0;
 927 }
 928
 929 /*
 930  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
 931  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
 932  */
 933 static __le32 *rtl8187b_ac_addr[4] = {
 934         (__le32 *) 0xFFF0, /* AC_VO */
 935         (__le32 *) 0xFFF4, /* AC_VI */
 936         (__le32 *) 0xFFFC, /* AC_BK */
 937         (__le32 *) 0xFFF8, /* AC_BE */
 938 };
 939
 940 #define SIFS_TIME 0xa
 941
 942 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
 943                              bool use_short_preamble)
 944 {
 945         if (priv->is_rtl8187b) {
 946                 u8 difs, eifs;
 947                 u16 ack_timeout;
 948                 int queue;
 949
 950                 if (use_short_slot) {
 951                         priv->slot_time = 0x9;
 952                         difs = 0x1c;
 953                         eifs = 0x53;
 954                 } else {
 955                         priv->slot_time = 0x14;
 956                         difs = 0x32;
 957                         eifs = 0x5b;
 958                 }
 959                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
 960                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
 961                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
 962
 963                 /*
 964                  * BRSR+1 on 8187B is in fact EIFS register
 965                  * Value in units of 4 us
 966                  */
 967                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
 968
 969                 /*
 970                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
 971                  * register. In units of 4 us like eifs register
 972                  * ack_timeout = ack duration + plcp + difs + preamble
 973                  */
 974                 ack_timeout = 112 + 48 + difs;
 975                 if (use_short_preamble)
 976                         ack_timeout += 72;
 977                 else
 978                         ack_timeout += 144;
 979                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
 980                                  DIV_ROUND_UP(ack_timeout, 4));
 981
 982                 for (queue = 0; queue < 4; queue++)
 983                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
 984                                          priv->aifsn[queue] * priv->slot_time +
 985                                          SIFS_TIME);
 986         } else {
 987                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
 988                 if (use_short_slot) {
 989                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
 990                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
 991                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
 992                 } else {
 993                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
 994                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
 995                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
 996                 }
 997         }
 998 }
 999
1000 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1001                                      struct ieee80211_vif *vif,
1002                                      struct ieee80211_bss_conf *info,
1003                                      u32 changed)
1004 {
1005         struct rtl8187_priv *priv = dev->priv;
1006
1007         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1008                 rtl8187_conf_erp(priv, info->use_short_slot,
1009                                  info->use_short_preamble);
1010 }
1011
1012 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1013                                      unsigned int changed_flags,
1014                                      unsigned int *total_flags,
1015                                      int mc_count, struct dev_addr_list *mclist)
1016 {
1017         struct rtl8187_priv *priv = dev->priv;
1018
1019         if (changed_flags & FIF_FCSFAIL)
1020                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1021         if (changed_flags & FIF_CONTROL)
1022                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1023         if (changed_flags & FIF_OTHER_BSS)
1024                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1025         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
1026                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1027         else
1028                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1029
1030         *total_flags = 0;
1031
1032         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1033                 *total_flags |= FIF_FCSFAIL;
1034         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1035                 *total_flags |= FIF_CONTROL;
1036         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1037                 *total_flags |= FIF_OTHER_BSS;
1038         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1039                 *total_flags |= FIF_ALLMULTI;
1040
1041         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1042 }
1043
1044 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1045                            const struct ieee80211_tx_queue_params *params)
1046 {
1047         struct rtl8187_priv *priv = dev->priv;
1048         u8 cw_min, cw_max;
1049
1050         if (queue > 3)
1051                 return -EINVAL;
1052
1053         cw_min = fls(params->cw_min);
1054         cw_max = fls(params->cw_max);
1055
1056         if (priv->is_rtl8187b) {
1057                 priv->aifsn[queue] = params->aifs;
1058
1059                 /*
1060                  * This is the structure of AC_*_PARAM registers in 8187B:
1061                  * - TXOP limit field, bit offset = 16
1062                  * - ECWmax, bit offset = 12
1063                  * - ECWmin, bit offset = 8
1064                  * - AIFS, bit offset = 0
1065                  */
1066                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1067                                   (params->txop << 16) | (cw_max << 12) |
1068                                   (cw_min << 8) | (params->aifs *
1069                                   priv->slot_time + SIFS_TIME));
1070         } else {
1071                 if (queue != 0)
1072                         return -EINVAL;
1073
1074                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1075                                  cw_min | (cw_max << 4));
1076         }
1077         return 0;
1078 }
1079
1080 static const struct ieee80211_ops rtl8187_ops = {
1081         .tx                     = rtl8187_tx,
1082         .start                  = rtl8187_start,
1083         .stop                   = rtl8187_stop,
1084         .add_interface          = rtl8187_add_interface,
1085         .remove_interface       = rtl8187_remove_interface,
1086         .config                 = rtl8187_config,
1087         .config_interface       = rtl8187_config_interface,
1088         .bss_info_changed       = rtl8187_bss_info_changed,
1089         .configure_filter       = rtl8187_configure_filter,
1090         .conf_tx                = rtl8187_conf_tx
1091 };
1092
1093 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1094 {
1095         struct ieee80211_hw *dev = eeprom->data;
1096         struct rtl8187_priv *priv = dev->priv;
1097         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1098
1099         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1100         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1101         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1102         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1103 }
1104
1105 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1106 {
1107         struct ieee80211_hw *dev = eeprom->data;
1108         struct rtl8187_priv *priv = dev->priv;
1109         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1110
1111         if (eeprom->reg_data_in)
1112                 reg |= RTL818X_EEPROM_CMD_WRITE;
1113         if (eeprom->reg_data_out)
1114                 reg |= RTL818X_EEPROM_CMD_READ;
1115         if (eeprom->reg_data_clock)
1116                 reg |= RTL818X_EEPROM_CMD_CK;
1117         if (eeprom->reg_chip_select)
1118                 reg |= RTL818X_EEPROM_CMD_CS;
1119
1120         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1121         udelay(10);
1122 }
1123
1124 static int __devinit rtl8187_probe(struct usb_interface *intf,
1125                                    const struct usb_device_id *id)
1126 {
1127         struct usb_device *udev = interface_to_usbdev(intf);
1128         struct ieee80211_hw *dev;
1129         struct rtl8187_priv *priv;
1130         struct eeprom_93cx6 eeprom;
1131         struct ieee80211_channel *channel;
1132         const char *chip_name;
1133         u16 txpwr, reg;
1134         int err, i;
1135
1136         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1137         if (!dev) {
1138                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1139                 return -ENOMEM;
1140         }
1141
1142         priv = dev->priv;
1143         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1144
1145         SET_IEEE80211_DEV(dev, &intf->dev);
1146         usb_set_intfdata(intf, dev);
1147         priv->udev = udev;
1148
1149         usb_get_dev(udev);
1150
1151         skb_queue_head_init(&priv->rx_queue);
1152
1153         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1154         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1155
1156         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1157         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1158         priv->map = (struct rtl818x_csr *)0xFF00;
1159
1160         priv->band.band = IEEE80211_BAND_2GHZ;
1161         priv->band.channels = priv->channels;
1162         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1163         priv->band.bitrates = priv->rates;
1164         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1165         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1166
1167
1168         priv->mode = NL80211_IFTYPE_MONITOR;
1169         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1170                      IEEE80211_HW_RX_INCLUDES_FCS;
1171
1172         eeprom.data = dev;
1173         eeprom.register_read = rtl8187_eeprom_register_read;
1174         eeprom.register_write = rtl8187_eeprom_register_write;
1175         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1176                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1177         else
1178                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1179
1180         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1181         udelay(10);
1182
1183         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1184                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1185         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1186                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1187                        "generated MAC address\n");
1188                 random_ether_addr(dev->wiphy->perm_addr);
1189         }
1190
1191         channel = priv->channels;
1192         for (i = 0; i < 3; i++) {
1193                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1194                                   &txpwr);
1195                 (*channel++).hw_value = txpwr & 0xFF;
1196                 (*channel++).hw_value = txpwr >> 8;
1197         }
1198         for (i = 0; i < 2; i++) {
1199                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1200                                   &txpwr);
1201                 (*channel++).hw_value = txpwr & 0xFF;
1202                 (*channel++).hw_value = txpwr >> 8;
1203         }
1204
1205         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1206                           &priv->txpwr_base);
1207
1208         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1209         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1210         /* 0 means asic B-cut, we should use SW 3 wire
1211          * bit-by-bit banging for radio. 1 means we can use
1212          * USB specific request to write radio registers */
1213         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1214         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1215         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1216
1217         if (!priv->is_rtl8187b) {
1218                 u32 reg32;
1219                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1220                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1221                 switch (reg32) {
1222                 case RTL818X_TX_CONF_R8187vD_B:
1223                         /* Some RTL8187B devices have a USB ID of 0x8187
1224                          * detect them here */
1225                         chip_name = "RTL8187BvB(early)";
1226                         priv->is_rtl8187b = 1;
1227                         priv->hw_rev = RTL8187BvB;
1228                         break;
1229                 case RTL818X_TX_CONF_R8187vD:
1230                         chip_name = "RTL8187vD";
1231                         break;
1232                 default:
1233                         chip_name = "RTL8187vB (default)";
1234                 }
1235        } else {
1236                 /*
1237                  * Force USB request to write radio registers for 8187B, Realtek
1238                  * only uses it in their sources
1239                  */
1240                 /*if (priv->asic_rev == 0) {
1241                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1242                                "requests to write to radio registers\n");
1243                         priv->asic_rev = 1;
1244                 }*/
1245                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1246                 case RTL818X_R8187B_B:
1247                         chip_name = "RTL8187BvB";
1248                         priv->hw_rev = RTL8187BvB;
1249                         break;
1250                 case RTL818X_R8187B_D:
1251                         chip_name = "RTL8187BvD";
1252                         priv->hw_rev = RTL8187BvD;
1253                         break;
1254                 case RTL818X_R8187B_E:
1255                         chip_name = "RTL8187BvE";
1256                         priv->hw_rev = RTL8187BvE;
1257                         break;
1258                 default:
1259                         chip_name = "RTL8187BvB (default)";
1260                         priv->hw_rev = RTL8187BvB;
1261                 }
1262         }
1263
1264         if (!priv->is_rtl8187b) {
1265                 for (i = 0; i < 2; i++) {
1266                         eeprom_93cx6_read(&eeprom,
1267                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1268                                           &txpwr);
1269                         (*channel++).hw_value = txpwr & 0xFF;
1270                         (*channel++).hw_value = txpwr >> 8;
1271                 }
1272         } else {
1273                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1274                                   &txpwr);
1275                 (*channel++).hw_value = txpwr & 0xFF;
1276
1277                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1278                 (*channel++).hw_value = txpwr & 0xFF;
1279
1280                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1281                 (*channel++).hw_value = txpwr & 0xFF;
1282                 (*channel++).hw_value = txpwr >> 8;
1283         }
1284
1285         if (priv->is_rtl8187b) {
1286                 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1287                         "is EXPERIMENTAL, and could damage your\n"
1288                         "         hardware, use at your own risk\n");
1289                 dev->flags |= IEEE80211_HW_SIGNAL_DBM;
1290         } else {
1291                 dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
1292                 dev->max_signal = 65;
1293         }
1294
1295         /*
1296          * XXX: Once this driver supports anything that requires
1297          *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1298          */
1299         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1300
1301         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1302                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1303                        " info!\n");
1304
1305         priv->rf = rtl8187_detect_rf(dev);
1306         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1307                                   sizeof(struct rtl8187_tx_hdr) :
1308                                   sizeof(struct rtl8187b_tx_hdr);
1309         if (!priv->is_rtl8187b)
1310                 dev->queues = 1;
1311         else
1312                 dev->queues = 4;
1313
1314         err = ieee80211_register_hw(dev);
1315         if (err) {
1316                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1317                 goto err_free_dev;
1318         }
1319         mutex_init(&priv->conf_mutex);
1320
1321         printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1322                wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1323                chip_name, priv->asic_rev, priv->rf->name);
1324
1325         return 0;
1326
1327  err_free_dev:
1328         ieee80211_free_hw(dev);
1329         usb_set_intfdata(intf, NULL);
1330         usb_put_dev(udev);
1331         return err;
1332 }
1333
1334 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1335 {
1336         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1337         struct rtl8187_priv *priv;
1338
1339         if (!dev)
1340                 return;
1341
1342         ieee80211_unregister_hw(dev);
1343
1344         priv = dev->priv;
1345         usb_put_dev(interface_to_usbdev(intf));
1346         ieee80211_free_hw(dev);
1347 }
1348
1349 static struct usb_driver rtl8187_driver = {
1350         .name           = KBUILD_MODNAME,
1351         .id_table       = rtl8187_table,
1352         .probe          = rtl8187_probe,
1353         .disconnect     = __devexit_p(rtl8187_disconnect),
1354 };
1355
1356 static int __init rtl8187_init(void)
1357 {
1358         return usb_register(&rtl8187_driver);
1359 }
1360
1361 static void __exit rtl8187_exit(void)
1362 {
1363         usb_deregister(&rtl8187_driver);
1364 }
1365
1366 module_init(rtl8187_init);
1367 module_exit(rtl8187_exit);