2 * ipr.h -- driver for IBM Power Linux RAID adapters
4 * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
6 * Copyright (C) 2003, 2004 IBM Corporation
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
23 * that broke 64bit platforms.
29 #include <linux/types.h>
30 #include <linux/completion.h>
31 #include <linux/list.h>
32 #include <linux/kref.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_cmnd.h>
39 #define IPR_DRIVER_VERSION "2.0.14"
40 #define IPR_DRIVER_DATE "(May 2, 2005)"
43 * IPR_DBG_TRACE: Setting this to 1 will turn on some general function tracing
44 * resulting in a bunch of extra debugging printks to the console
46 * IPR_DEBUG: Setting this to 1 will turn on some error path tracing.
47 * Enables the ipr_trace macro.
51 #define IPR_DBG_TRACE 1
54 #define IPR_DBG_TRACE 0
58 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
59 * ops per device for devices not running tagged command queuing.
60 * This can be adjusted at runtime through sysfs device attributes.
62 #define IPR_MAX_CMD_PER_LUN 6
65 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
66 * ops the mid-layer can send to the adapter.
68 #define IPR_NUM_BASE_CMD_BLKS 100
70 #define IPR_SUBS_DEV_ID_2780 0x0264
71 #define IPR_SUBS_DEV_ID_5702 0x0266
72 #define IPR_SUBS_DEV_ID_5703 0x0278
73 #define IPR_SUBS_DEV_ID_572E 0x028D
74 #define IPR_SUBS_DEV_ID_573E 0x02D3
75 #define IPR_SUBS_DEV_ID_573D 0x02D4
76 #define IPR_SUBS_DEV_ID_571A 0x02C0
77 #define IPR_SUBS_DEV_ID_571B 0x02BE
78 #define IPR_SUBS_DEV_ID_571E 0x02BF
80 #define IPR_NAME "ipr"
85 #define IPR_RC_JOB_CONTINUE 1
86 #define IPR_RC_JOB_RETURN 2
91 #define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
92 #define IPR_IOASC_SYNC_REQUIRED 0x023f0000
93 #define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00
94 #define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000
95 #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500
96 #define IPR_IOASC_IOASC_MASK 0xFFFFFF00
97 #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF
98 #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000
99 #define IPR_IOASC_BUS_WAS_RESET 0x06290000
100 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000
101 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000
103 #define IPR_FIRST_DRIVER_IOASC 0x10000000
104 #define IPR_IOASC_IOA_WAS_RESET 0x10000001
105 #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002
107 #define IPR_NUM_LOG_HCAMS 2
108 #define IPR_NUM_CFG_CHG_HCAMS 2
109 #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
110 #define IPR_MAX_NUM_TARGETS_PER_BUS 0x10
111 #define IPR_MAX_NUM_LUNS_PER_TARGET 256
112 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8
113 #define IPR_VSET_BUS 0xff
114 #define IPR_IOA_BUS 0xff
115 #define IPR_IOA_TARGET 0xff
116 #define IPR_IOA_LUN 0xff
117 #define IPR_MAX_NUM_BUSES 4
118 #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES
120 #define IPR_NUM_RESET_RELOAD_RETRIES 3
122 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
123 #define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \
124 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
126 #define IPR_MAX_COMMANDS IPR_NUM_BASE_CMD_BLKS
127 #define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \
128 IPR_NUM_INTERNAL_CMD_BLKS)
130 #define IPR_MAX_PHYSICAL_DEVS 192
132 #define IPR_MAX_SGLIST 64
133 #define IPR_IOA_MAX_SECTORS 32767
134 #define IPR_VSET_MAX_SECTORS 512
135 #define IPR_MAX_CDB_LEN 16
137 #define IPR_DEFAULT_BUS_WIDTH 16
138 #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
139 #define IPR_U160_SCSI_RATE ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
140 #define IPR_U320_SCSI_RATE ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
141 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
143 #define IPR_IOA_RES_HANDLE 0xffffffff
144 #define IPR_IOA_RES_ADDR 0x00ffffff
149 #define IPR_QUERY_RSRC_STATE 0xC2
150 #define IPR_RESET_DEVICE 0xC3
151 #define IPR_RESET_TYPE_SELECT 0x80
152 #define IPR_LUN_RESET 0x40
153 #define IPR_TARGET_RESET 0x20
154 #define IPR_BUS_RESET 0x10
155 #define IPR_ID_HOST_RR_Q 0xC4
156 #define IPR_QUERY_IOA_CONFIG 0xC5
157 #define IPR_CANCEL_ALL_REQUESTS 0xCE
158 #define IPR_HOST_CONTROLLED_ASYNC 0xCF
159 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01
160 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02
161 #define IPR_SET_SUPPORTED_DEVICES 0xFB
162 #define IPR_IOA_SHUTDOWN 0xF7
163 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05
168 #define IPR_SHUTDOWN_TIMEOUT (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
169 #define IPR_VSET_RW_TIMEOUT (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
170 #define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
171 #define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
172 #define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
173 #define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
174 #define IPR_INTERNAL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
175 #define IPR_WRITE_BUFFER_TIMEOUT (10 * 60 * HZ)
176 #define IPR_SET_SUP_DEVICE_TIMEOUT (2 * 60 * HZ)
177 #define IPR_REQUEST_SENSE_TIMEOUT (10 * HZ)
178 #define IPR_OPERATIONAL_TIMEOUT (5 * 60)
179 #define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
180 #define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
181 #define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
182 #define IPR_DUMP_TIMEOUT (15 * HZ)
187 #define IPR_VENDOR_ID_LEN 8
188 #define IPR_PROD_ID_LEN 16
189 #define IPR_SERIAL_NUM_LEN 8
194 #define IPR_FMT2_MBX_ADDR_MASK 0x0fffffff
195 #define IPR_FMT2_MBX_BAR_SEL_MASK 0xf0000000
196 #define IPR_FMT2_MKR_BAR_SEL_SHIFT 28
197 #define IPR_GET_FMT2_BAR_SEL(mbx) \
198 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
199 #define IPR_SDT_FMT2_BAR0_SEL 0x0
200 #define IPR_SDT_FMT2_BAR1_SEL 0x1
201 #define IPR_SDT_FMT2_BAR2_SEL 0x2
202 #define IPR_SDT_FMT2_BAR3_SEL 0x3
203 #define IPR_SDT_FMT2_BAR4_SEL 0x4
204 #define IPR_SDT_FMT2_BAR5_SEL 0x5
205 #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8
206 #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2
207 #define IPR_DOORBELL 0x82800000
209 #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0)
210 #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3)
211 #define IPR_PCII_IOA_UNIT_CHECKED (0x80000000 >> 4)
212 #define IPR_PCII_NO_HOST_RRQ (0x80000000 >> 5)
213 #define IPR_PCII_CRITICAL_OPERATION (0x80000000 >> 6)
214 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE (0x80000000 >> 7)
215 #define IPR_PCII_IOARRIN_LOST (0x80000000 >> 27)
216 #define IPR_PCII_MMIO_ERROR (0x80000000 >> 28)
217 #define IPR_PCII_PROC_ERR_STATE (0x80000000 >> 29)
218 #define IPR_PCII_HRRQ_UPDATED (0x80000000 >> 30)
219 #define IPR_PCII_CORE_ISSUED_RST_REQ (0x80000000 >> 31)
221 #define IPR_PCII_ERROR_INTERRUPTS \
222 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
223 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
225 #define IPR_PCII_OPER_INTERRUPTS \
226 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
228 #define IPR_UPROCI_RESET_ALERT (0x80000000 >> 7)
229 #define IPR_UPROCI_IO_DEBUG_ALERT (0x80000000 >> 9)
231 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC 200000 /* 200 ms */
232 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC 200000 /* 200 ms */
237 #define IPR_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024)
238 #define IPR_NUM_SDT_ENTRIES 511
239 #define IPR_MAX_NUM_DUMP_PAGES ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
244 #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST
247 * Adapter interface types
250 struct ipr_res_addr {
255 #define IPR_GET_PHYS_LOC(res_addr) \
256 (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
257 }__attribute__((packed, aligned (4)));
259 struct ipr_std_inq_vpids {
260 u8 vendor_id[IPR_VENDOR_ID_LEN];
261 u8 product_id[IPR_PROD_ID_LEN];
262 }__attribute__((packed));
265 struct ipr_std_inq_vpids vpids;
266 u8 sn[IPR_SERIAL_NUM_LEN];
267 }__attribute__((packed));
269 struct ipr_std_inq_data {
270 u8 peri_qual_dev_type;
271 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
272 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
274 u8 removeable_medium_rsvd;
275 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
277 #define IPR_IS_DASD_DEVICE(std_inq) \
278 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
279 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
281 #define IPR_IS_SES_DEVICE(std_inq) \
282 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
291 struct ipr_std_inq_vpids vpids;
293 u8 ros_rsvd_ram_rsvd[4];
295 u8 serial_num[IPR_SERIAL_NUM_LEN];
296 }__attribute__ ((packed));
298 struct ipr_config_table_entry {
302 #define IPR_IS_IOA_RESOURCE 0x80
303 #define IPR_IS_ARRAY_MEMBER 0x20
304 #define IPR_IS_HOT_SPARE 0x10
307 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
308 #define IPR_SUBTYPE_AF_DASD 0
309 #define IPR_SUBTYPE_GENERIC_SCSI 1
310 #define IPR_SUBTYPE_VOLUME_SET 2
312 struct ipr_res_addr res_addr;
315 struct ipr_std_inq_data std_inq_data;
316 }__attribute__ ((packed, aligned (4)));
318 struct ipr_config_table_hdr {
321 #define IPR_UCODE_DOWNLOAD_REQ 0x10
323 }__attribute__((packed, aligned (4)));
325 struct ipr_config_table {
326 struct ipr_config_table_hdr hdr;
327 struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
328 }__attribute__((packed, aligned (4)));
330 struct ipr_hostrcb_cfg_ch_not {
331 struct ipr_config_table_entry cfgte;
333 }__attribute__((packed, aligned (4)));
335 struct ipr_supported_device {
339 struct ipr_std_inq_vpids vpids;
341 }__attribute__((packed, aligned (4)));
343 /* Command packet structure */
345 __be16 reserved; /* Reserved by IOA */
347 #define IPR_RQTYPE_SCSICDB 0x00
348 #define IPR_RQTYPE_IOACMD 0x01
349 #define IPR_RQTYPE_HCAM 0x02
354 #define IPR_FLAGS_HI_WRITE_NOT_READ 0x80
355 #define IPR_FLAGS_HI_NO_ULEN_CHK 0x20
356 #define IPR_FLAGS_HI_SYNC_OVERRIDE 0x10
357 #define IPR_FLAGS_HI_SYNC_COMPLETE 0x08
358 #define IPR_FLAGS_HI_NO_LINK_DESC 0x04
361 #define IPR_FLAGS_LO_ALIGNED_BFR 0x20
362 #define IPR_FLAGS_LO_DELAY_AFTER_RST 0x10
363 #define IPR_FLAGS_LO_UNTAGGED_TASK 0x00
364 #define IPR_FLAGS_LO_SIMPLE_TASK 0x02
365 #define IPR_FLAGS_LO_ORDERED_TASK 0x04
366 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK 0x06
367 #define IPR_FLAGS_LO_ACA_TASK 0x08
371 }__attribute__ ((packed, aligned(4)));
373 /* IOA Request Control Block 128 bytes */
375 __be32 ioarcb_host_pci_addr;
378 __be32 host_response_handle;
383 __be32 write_data_transfer_length;
384 __be32 read_data_transfer_length;
385 __be32 write_ioadl_addr;
386 __be32 write_ioadl_len;
387 __be32 read_ioadl_addr;
388 __be32 read_ioadl_len;
390 __be32 ioasa_host_pci_addr;
394 struct ipr_cmd_pkt cmd_pkt;
396 __be32 add_cmd_parms_len;
397 __be32 add_cmd_parms[10];
398 }__attribute__((packed, aligned (4)));
400 struct ipr_ioadl_desc {
401 __be32 flags_and_data_len;
402 #define IPR_IOADL_FLAGS_MASK 0xff000000
403 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
404 #define IPR_IOADL_DATA_LEN_MASK 0x00ffffff
405 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
406 #define IPR_IOADL_FLAGS_READ 0x48000000
407 #define IPR_IOADL_FLAGS_READ_LAST 0x49000000
408 #define IPR_IOADL_FLAGS_WRITE 0x68000000
409 #define IPR_IOADL_FLAGS_WRITE_LAST 0x69000000
410 #define IPR_IOADL_FLAGS_LAST 0x01000000
413 }__attribute__((packed, aligned (8)));
415 struct ipr_ioasa_vset {
416 __be32 failing_lba_hi;
417 __be32 failing_lba_lo;
419 }__attribute__((packed, aligned (4)));
421 struct ipr_ioasa_af_dasd {
423 }__attribute__((packed, aligned (4)));
425 struct ipr_ioasa_gpdd {
430 }__attribute__((packed, aligned (4)));
432 struct ipr_ioasa_raw {
434 }__attribute__((packed, aligned (4)));
438 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
439 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
440 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
441 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
443 __be16 ret_stat_len; /* Length of the returned IOASA */
445 __be16 avail_stat_len; /* Total Length of status available. */
447 __be32 residual_data_len; /* number of bytes in the host data */
448 /* buffers that were not used by the IOARCB command. */
451 #define IPR_NO_ILID 0
452 #define IPR_DRIVER_ILID 0xffffffff
456 __be32 fd_phys_locator;
458 __be32 fd_res_handle;
460 __be32 ioasc_specific; /* status code specific field */
461 #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff
462 #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8)
463 #define IPR_FIELD_POINTER_MASK 0x0000ffff
466 struct ipr_ioasa_vset vset;
467 struct ipr_ioasa_af_dasd dasd;
468 struct ipr_ioasa_gpdd gpdd;
469 struct ipr_ioasa_raw raw;
471 }__attribute__((packed, aligned (4)));
473 struct ipr_mode_parm_hdr {
476 u8 device_spec_parms;
478 }__attribute__((packed));
480 struct ipr_mode_pages {
481 struct ipr_mode_parm_hdr hdr;
482 u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
483 }__attribute__((packed));
485 struct ipr_mode_page_hdr {
487 #define IPR_MODE_PAGE_PS 0x80
488 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
490 }__attribute__ ((packed));
492 struct ipr_dev_bus_entry {
493 struct ipr_res_addr res_addr;
495 #define IPR_SCSI_ATTR_ENABLE_QAS 0x80
496 #define IPR_SCSI_ATTR_DISABLE_QAS 0x40
497 #define IPR_SCSI_ATTR_QAS_MASK 0xC0
498 #define IPR_SCSI_ATTR_ENABLE_TM 0x20
499 #define IPR_SCSI_ATTR_NO_TERM_PWR 0x10
500 #define IPR_SCSI_ATTR_TM_SUPPORTED 0x08
501 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED 0x04
505 u8 extended_reset_delay;
506 #define IPR_EXTENDED_RESET_DELAY 7
508 __be32 max_xfer_rate;
513 }__attribute__((packed, aligned (4)));
515 struct ipr_mode_page28 {
516 struct ipr_mode_page_hdr hdr;
519 struct ipr_dev_bus_entry bus[0];
520 }__attribute__((packed));
523 struct ipr_std_inq_data std_inq_data;
524 u8 ascii_part_num[12];
526 u8 ascii_plant_code[4];
527 }__attribute__((packed));
529 struct ipr_inquiry_page3 {
530 u8 peri_qual_dev_type;
542 }__attribute__((packed));
544 struct ipr_hostrcb_device_data_entry {
546 struct ipr_res_addr dev_res_addr;
547 struct ipr_vpd new_vpd;
548 struct ipr_vpd ioa_last_with_dev_vpd;
549 struct ipr_vpd cfc_last_with_dev_vpd;
551 }__attribute__((packed, aligned (4)));
553 struct ipr_hostrcb_array_data_entry {
555 struct ipr_res_addr expected_dev_res_addr;
556 struct ipr_res_addr dev_res_addr;
557 }__attribute__((packed, aligned (4)));
559 struct ipr_hostrcb_type_ff_error {
560 __be32 ioa_data[246];
561 }__attribute__((packed, aligned (4)));
563 struct ipr_hostrcb_type_01_error {
567 __be32 ioa_data[236];
568 }__attribute__((packed, aligned (4)));
570 struct ipr_hostrcb_type_02_error {
571 struct ipr_vpd ioa_vpd;
572 struct ipr_vpd cfc_vpd;
573 struct ipr_vpd ioa_last_attached_to_cfc_vpd;
574 struct ipr_vpd cfc_last_attached_to_ioa_vpd;
576 }__attribute__((packed, aligned (4)));
578 struct ipr_hostrcb_type_03_error {
579 struct ipr_vpd ioa_vpd;
580 struct ipr_vpd cfc_vpd;
581 __be32 errors_detected;
582 __be32 errors_logged;
584 struct ipr_hostrcb_device_data_entry dev[3];
585 }__attribute__((packed, aligned (4)));
587 struct ipr_hostrcb_type_04_error {
588 struct ipr_vpd ioa_vpd;
589 struct ipr_vpd cfc_vpd;
591 struct ipr_hostrcb_array_data_entry array_member[10];
592 __be32 exposed_mode_adn;
594 struct ipr_vpd incomp_dev_vpd;
596 struct ipr_hostrcb_array_data_entry array_member2[8];
597 struct ipr_res_addr last_func_vset_res_addr;
598 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
599 u8 protection_level[8];
600 }__attribute__((packed, aligned (4)));
602 struct ipr_hostrcb_error {
603 __be32 failing_dev_ioasc;
604 struct ipr_res_addr failing_dev_res_addr;
605 __be32 failing_dev_res_handle;
608 struct ipr_hostrcb_type_ff_error type_ff_error;
609 struct ipr_hostrcb_type_01_error type_01_error;
610 struct ipr_hostrcb_type_02_error type_02_error;
611 struct ipr_hostrcb_type_03_error type_03_error;
612 struct ipr_hostrcb_type_04_error type_04_error;
614 }__attribute__((packed, aligned (4)));
616 struct ipr_hostrcb_raw {
617 __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
618 }__attribute__((packed, aligned (4)));
622 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE 0xE1
623 #define IPR_HOST_RCB_OP_CODE_LOG_DATA 0xE2
626 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED 0x00
627 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY 0x01
628 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY 0x02
629 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY 0x10
630 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY 0x11
632 u8 notifications_lost;
633 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST 0
634 #define IPR_HOST_RCB_NOTIFICATIONS_LOST 0x80
637 #define IPR_HOSTRCB_INTERNAL_OPER 0x80
638 #define IPR_HOSTRCB_ERR_RESP_SENT 0x40
641 #define IPR_HOST_RCB_OVERLAY_ID_1 0x01
642 #define IPR_HOST_RCB_OVERLAY_ID_2 0x02
643 #define IPR_HOST_RCB_OVERLAY_ID_3 0x03
644 #define IPR_HOST_RCB_OVERLAY_ID_4 0x04
645 #define IPR_HOST_RCB_OVERLAY_ID_6 0x06
646 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF
650 __be32 time_since_last_ioa_reset;
655 struct ipr_hostrcb_error error;
656 struct ipr_hostrcb_cfg_ch_not ccn;
657 struct ipr_hostrcb_raw raw;
659 }__attribute__((packed, aligned (4)));
662 struct ipr_hcam hcam;
663 dma_addr_t hostrcb_dma;
664 struct list_head queue;
667 /* IPR smart dump table structures */
668 struct ipr_sdt_entry {
669 __be32 bar_str_offset;
675 #define IPR_SDT_ENDIAN 0x80
676 #define IPR_SDT_VALID_ENTRY 0x20
680 }__attribute__((packed, aligned (4)));
682 struct ipr_sdt_header {
685 __be32 num_entries_used;
687 }__attribute__((packed, aligned (4)));
690 struct ipr_sdt_header hdr;
691 struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
692 }__attribute__((packed, aligned (4)));
695 struct ipr_sdt_header hdr;
696 struct ipr_sdt_entry entry[1];
697 }__attribute__((packed, aligned (4)));
702 struct ipr_bus_attributes {
710 struct ipr_resource_entry {
711 struct ipr_config_table_entry cfgte;
712 u8 needs_sync_complete:1;
716 u8 resetting_device:1;
718 struct scsi_device *sdev;
719 struct list_head queue;
722 struct ipr_resource_hdr {
727 struct ipr_resource_table {
728 struct ipr_resource_hdr hdr;
729 struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
732 struct ipr_misc_cbs {
733 struct ipr_ioa_vpd ioa_vpd;
734 struct ipr_inquiry_page3 page3_data;
735 struct ipr_mode_pages mode_pages;
736 struct ipr_supported_device supp_dev;
739 struct ipr_interrupt_offsets {
740 unsigned long set_interrupt_mask_reg;
741 unsigned long clr_interrupt_mask_reg;
742 unsigned long sense_interrupt_mask_reg;
743 unsigned long clr_interrupt_reg;
745 unsigned long sense_interrupt_reg;
746 unsigned long ioarrin_reg;
747 unsigned long sense_uproc_interrupt_reg;
748 unsigned long set_uproc_interrupt_reg;
749 unsigned long clr_uproc_interrupt_reg;
752 struct ipr_interrupts {
753 void __iomem *set_interrupt_mask_reg;
754 void __iomem *clr_interrupt_mask_reg;
755 void __iomem *sense_interrupt_mask_reg;
756 void __iomem *clr_interrupt_reg;
758 void __iomem *sense_interrupt_reg;
759 void __iomem *ioarrin_reg;
760 void __iomem *sense_uproc_interrupt_reg;
761 void __iomem *set_uproc_interrupt_reg;
762 void __iomem *clr_uproc_interrupt_reg;
765 struct ipr_chip_cfg_t {
768 struct ipr_interrupt_offsets regs;
774 const struct ipr_chip_cfg_t *cfg;
777 enum ipr_shutdown_type {
778 IPR_SHUTDOWN_NORMAL = 0x00,
779 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
780 IPR_SHUTDOWN_ABBREV = 0x80,
781 IPR_SHUTDOWN_NONE = 0x100
784 struct ipr_trace_entry {
789 #define IPR_TRACE_START 0x00
790 #define IPR_TRACE_FINISH 0xff
805 struct scatterlist scatterlist[1];
816 /* Per-controller data */
819 #define IPR_EYECATCHER "iprcfg"
821 struct list_head queue;
823 u8 allow_interrupts:1;
824 u8 in_reset_reload:1;
825 u8 in_ioa_bringdown:1;
826 u8 ioa_unit_checked:1;
830 u8 allow_ml_add_del:1;
832 u16 type; /* CCIN of the card */
835 #define IPR_MAX_LOG_LEVEL 4
836 #define IPR_DEFAULT_LOG_LEVEL 2
838 #define IPR_NUM_TRACE_INDEX_BITS 8
839 #define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
840 #define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
842 #define IPR_TRACE_START_LABEL "trace"
843 struct ipr_trace_entry *trace;
844 u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
847 * Queue for free command blocks
849 char ipr_free_label[8];
850 #define IPR_FREEQ_LABEL "free-q"
851 struct list_head free_q;
854 * Queue for command blocks outstanding to the adapter
856 char ipr_pending_label[8];
857 #define IPR_PENDQ_LABEL "pend-q"
858 struct list_head pending_q;
860 char cfg_table_start[8];
861 #define IPR_CFG_TBL_START "cfg"
862 struct ipr_config_table *cfg_table;
863 dma_addr_t cfg_table_dma;
865 char resource_table_label[8];
866 #define IPR_RES_TABLE_LABEL "res_tbl"
867 struct ipr_resource_entry *res_entries;
868 struct list_head free_res_q;
869 struct list_head used_res_q;
871 char ipr_hcam_label[8];
872 #define IPR_HCAM_LABEL "hcams"
873 struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
874 dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
875 struct list_head hostrcb_free_q;
876 struct list_head hostrcb_pending_q;
879 dma_addr_t host_rrq_dma;
880 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK 0xfffffffc
881 #define IPR_HRRQ_RESP_BIT_SET 0x00000002
882 #define IPR_HRRQ_TOGGLE_BIT 0x00000001
883 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT 2
884 volatile __be32 *hrrq_start;
885 volatile __be32 *hrrq_end;
886 volatile __be32 *hrrq_curr;
887 volatile u32 toggle_bit;
889 struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
891 const struct ipr_chip_cfg_t *chip_cfg;
893 void __iomem *hdw_dma_regs; /* iomapped PCI memory space */
894 unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
895 void __iomem *ioa_mailbox;
896 struct ipr_interrupts regs;
898 u16 saved_pcix_cmd_reg;
903 struct Scsi_Host *host;
904 struct pci_dev *pdev;
905 struct ipr_sglist *ucode_sglist;
906 struct ipr_mode_pages *saved_mode_pages;
907 u8 saved_mode_page_len;
909 struct work_struct work_q;
911 wait_queue_head_t reset_wait_q;
913 struct ipr_dump *dump;
914 enum ipr_sdt_state sdt_state;
916 struct ipr_misc_cbs *vpd_cbs;
917 dma_addr_t vpd_cbs_dma;
919 struct pci_pool *ipr_cmd_pool;
921 struct ipr_cmnd *reset_cmd;
923 char ipr_cmd_label[8];
924 #define IPR_CMD_LABEL "ipr_cmnd"
925 struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
926 u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
930 struct ipr_ioarcb ioarcb;
931 struct ipr_ioasa ioasa;
932 struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
933 struct list_head queue;
934 struct scsi_cmnd *scsi_cmd;
935 struct completion completion;
936 struct timer_list timer;
937 void (*done) (struct ipr_cmnd *);
938 int (*job_step) (struct ipr_cmnd *);
940 u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
941 dma_addr_t sense_buffer_dma;
942 unsigned short dma_use_sg;
943 dma_addr_t dma_handle;
944 struct ipr_cmnd *sibling;
946 enum ipr_shutdown_type shutdown_type;
947 struct ipr_hostrcb *hostrcb;
948 unsigned long time_left;
949 unsigned long scratch;
950 struct ipr_resource_entry *res;
951 struct scsi_device *sdev;
954 struct ipr_ioa_cfg *ioa_cfg;
957 struct ipr_ses_table_entry {
959 char compare_product_id_byte[17];
960 u32 max_bus_speed_limit; /* MB/sec limit for this backplane */
963 struct ipr_dump_header {
965 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
968 u32 first_entry_offset;
970 #define IPR_DUMP_STATUS_SUCCESS 0
971 #define IPR_DUMP_STATUS_QUAL_SUCCESS 2
972 #define IPR_DUMP_STATUS_FAILED 0xffffffff
974 #define IPR_DUMP_OS_LINUX 0x4C4E5558
976 #define IPR_DUMP_DRIVER_NAME 0x49505232
977 }__attribute__((packed, aligned (4)));
979 struct ipr_dump_entry_header {
981 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
986 #define IPR_DUMP_DATA_TYPE_ASCII 0x41534349
987 #define IPR_DUMP_DATA_TYPE_BINARY 0x42494E41
989 #define IPR_DUMP_IOA_DUMP_ID 0x494F4131
990 #define IPR_DUMP_LOCATION_ID 0x4C4F4341
991 #define IPR_DUMP_TRACE_ID 0x54524143
992 #define IPR_DUMP_DRIVER_VERSION_ID 0x44525652
993 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
994 #define IPR_DUMP_IOA_CTRL_BLK 0x494F4342
995 #define IPR_DUMP_PEND_OPS 0x414F5053
997 }__attribute__((packed, aligned (4)));
999 struct ipr_dump_location_entry {
1000 struct ipr_dump_entry_header hdr;
1001 u8 location[BUS_ID_SIZE];
1002 }__attribute__((packed));
1004 struct ipr_dump_trace_entry {
1005 struct ipr_dump_entry_header hdr;
1006 u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1007 }__attribute__((packed, aligned (4)));
1009 struct ipr_dump_version_entry {
1010 struct ipr_dump_entry_header hdr;
1011 u8 version[sizeof(IPR_DRIVER_VERSION)];
1014 struct ipr_dump_ioa_type_entry {
1015 struct ipr_dump_entry_header hdr;
1020 struct ipr_driver_dump {
1021 struct ipr_dump_header hdr;
1022 struct ipr_dump_version_entry version_entry;
1023 struct ipr_dump_location_entry location_entry;
1024 struct ipr_dump_ioa_type_entry ioa_type_entry;
1025 struct ipr_dump_trace_entry trace_entry;
1026 }__attribute__((packed));
1028 struct ipr_ioa_dump {
1029 struct ipr_dump_entry_header hdr;
1031 __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1033 u32 next_page_index;
1036 #define IPR_SDT_FMT2 2
1037 #define IPR_SDT_UNKNOWN 3
1038 }__attribute__((packed, aligned (4)));
1042 struct ipr_ioa_cfg *ioa_cfg;
1043 struct ipr_driver_dump driver_dump;
1044 struct ipr_ioa_dump ioa_dump;
1047 struct ipr_error_table_t {
1054 struct ipr_software_inq_lid_info {
1056 __be32 timestamp[3];
1057 }__attribute__((packed, aligned (4)));
1059 struct ipr_ucode_image_header {
1060 __be32 header_length;
1061 __be32 lid_table_offset;
1064 u8 minor_release[2];
1066 char eyecatcher[16];
1068 struct ipr_software_inq_lid_info lid[1];
1069 }__attribute__((packed, aligned (4)));
1075 #define IPR_DBG_CMD(CMD) do { CMD; } while (0)
1077 #define IPR_DBG_CMD(CMD)
1080 #ifdef CONFIG_SCSI_IPR_TRACE
1081 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1082 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1084 #define ipr_create_trace_file(kobj, attr) 0
1085 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1088 #ifdef CONFIG_SCSI_IPR_DUMP
1089 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1090 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1092 #define ipr_create_dump_file(kobj, attr) 0
1093 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1097 * Error logging macros
1099 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1100 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1101 #define ipr_crit(...) printk(KERN_CRIT IPR_NAME ": "__VA_ARGS__)
1102 #define ipr_warn(...) printk(KERN_WARNING IPR_NAME": "__VA_ARGS__)
1103 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1105 #define ipr_sdev_printk(level, sdev, fmt, args...) \
1106 sdev_printk(level, sdev, fmt, ## args)
1108 #define ipr_sdev_err(sdev, fmt, ...) \
1109 ipr_sdev_printk(KERN_ERR, sdev, fmt, ##__VA_ARGS__)
1111 #define ipr_sdev_info(sdev, fmt, ...) \
1112 ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__)
1114 #define ipr_sdev_dbg(sdev, fmt, ...) \
1115 IPR_DBG_CMD(ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__))
1117 #define ipr_res_printk(level, ioa_cfg, res, fmt, ...) \
1118 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, ioa_cfg->host->host_no, \
1119 res.bus, res.target, res.lun, ##__VA_ARGS__)
1121 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1122 ipr_res_printk(KERN_ERR, ioa_cfg, res, fmt, ##__VA_ARGS__)
1123 #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \
1124 IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__))
1126 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1127 __FILE__, __FUNCTION__, __LINE__)
1130 #define ENTER printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__)
1131 #define LEAVE printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__)
1137 #define ipr_err_separator \
1138 ipr_err("----------------------------------------------------------\n")
1146 * ipr_is_ioa_resource - Determine if a resource is the IOA
1147 * @res: resource entry struct
1150 * 1 if IOA / 0 if not IOA
1152 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1154 return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1158 * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1159 * @res: resource entry struct
1162 * 1 if AF DASD / 0 if not AF DASD
1164 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1166 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1167 !ipr_is_ioa_resource(res) &&
1168 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1175 * ipr_is_vset_device - Determine if a resource is a VSET
1176 * @res: resource entry struct
1179 * 1 if VSET / 0 if not VSET
1181 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1183 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1184 !ipr_is_ioa_resource(res) &&
1185 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1192 * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1193 * @res: resource entry struct
1196 * 1 if GSCSI / 0 if not GSCSI
1198 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1200 if (!ipr_is_ioa_resource(res) &&
1201 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1208 * ipr_is_device - Determine if resource address is that of a device
1209 * @res_addr: resource address struct
1212 * 1 if AF / 0 if not AF
1214 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1216 if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1217 (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS))
1224 * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1225 * @sdt_word: SDT address
1228 * 1 if format 2 / 0 if not
1230 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1232 u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1235 case IPR_SDT_FMT2_BAR0_SEL:
1236 case IPR_SDT_FMT2_BAR1_SEL:
1237 case IPR_SDT_FMT2_BAR2_SEL:
1238 case IPR_SDT_FMT2_BAR3_SEL:
1239 case IPR_SDT_FMT2_BAR4_SEL:
1240 case IPR_SDT_FMT2_BAR5_SEL:
1241 case IPR_SDT_FMT2_EXP_ROM_SEL: