1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2006 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
9 * This program is free software; you can redistribute it and/or *
10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
20 *******************************************************************/
22 #include <linux/blkdev.h>
23 #include <linux/pci.h>
24 #include <linux/interrupt.h>
25 #include <linux/delay.h>
27 #include <scsi/scsi.h>
28 #include <scsi/scsi_cmnd.h>
29 #include <scsi/scsi_device.h>
30 #include <scsi/scsi_host.h>
31 #include <scsi/scsi_transport_fc.h>
35 #include "lpfc_disc.h"
36 #include "lpfc_scsi.h"
38 #include "lpfc_crtn.h"
39 #include "lpfc_logmsg.h"
40 #include "lpfc_compat.h"
43 * Define macro to log: Mailbox command x%x cannot issue Data
44 * This allows multiple uses of lpfc_msgBlk0311
45 * w/o perturbing log msg utility.
47 #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
48 lpfc_printf_log(phba, \
51 "%d:0311 Mailbox command x%x cannot issue " \
52 "Data: x%x x%x x%x\n", \
60 /* There are only four IOCB completion types. */
61 typedef enum _lpfc_iocb_type {
69 lpfc_sli_get_iocbq(struct lpfc_hba * phba)
71 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
72 struct lpfc_iocbq * iocbq = NULL;
74 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
79 lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
81 size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
84 * Clean all volatile data fields, preserve iotag and node struct.
86 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
87 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
91 * Translate the iocb command to an iocb command type used to decide the final
92 * disposition of each completed IOCB.
95 lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
97 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
99 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
103 case CMD_XMIT_SEQUENCE_CR:
104 case CMD_XMIT_SEQUENCE_CX:
105 case CMD_XMIT_BCAST_CN:
106 case CMD_XMIT_BCAST_CX:
107 case CMD_ELS_REQUEST_CR:
108 case CMD_ELS_REQUEST_CX:
109 case CMD_CREATE_XRI_CR:
110 case CMD_CREATE_XRI_CX:
112 case CMD_XMIT_ELS_RSP_CX:
114 case CMD_FCP_IWRITE_CR:
115 case CMD_FCP_IWRITE_CX:
116 case CMD_FCP_IREAD_CR:
117 case CMD_FCP_IREAD_CX:
118 case CMD_FCP_ICMND_CR:
119 case CMD_FCP_ICMND_CX:
120 case CMD_ADAPTER_MSG:
121 case CMD_ADAPTER_DUMP:
122 case CMD_XMIT_SEQUENCE64_CR:
123 case CMD_XMIT_SEQUENCE64_CX:
124 case CMD_XMIT_BCAST64_CN:
125 case CMD_XMIT_BCAST64_CX:
126 case CMD_ELS_REQUEST64_CR:
127 case CMD_ELS_REQUEST64_CX:
128 case CMD_FCP_IWRITE64_CR:
129 case CMD_FCP_IWRITE64_CX:
130 case CMD_FCP_IREAD64_CR:
131 case CMD_FCP_IREAD64_CX:
132 case CMD_FCP_ICMND64_CR:
133 case CMD_FCP_ICMND64_CX:
134 case CMD_GEN_REQUEST64_CR:
135 case CMD_GEN_REQUEST64_CX:
136 case CMD_XMIT_ELS_RSP64_CX:
137 type = LPFC_SOL_IOCB;
139 case CMD_ABORT_XRI_CN:
140 case CMD_ABORT_XRI_CX:
141 case CMD_CLOSE_XRI_CN:
142 case CMD_CLOSE_XRI_CX:
143 case CMD_XRI_ABORTED_CX:
144 case CMD_ABORT_MXRI64_CN:
145 type = LPFC_ABORT_IOCB;
147 case CMD_RCV_SEQUENCE_CX:
148 case CMD_RCV_ELS_REQ_CX:
149 case CMD_RCV_SEQUENCE64_CX:
150 case CMD_RCV_ELS_REQ64_CX:
151 type = LPFC_UNSOL_IOCB;
154 type = LPFC_UNKNOWN_IOCB;
162 lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
164 struct lpfc_sli *psli = &phba->sli;
165 MAILBOX_t *pmbox = &pmb->mb;
168 for (i = 0; i < psli->num_rings; i++) {
169 phba->hba_state = LPFC_INIT_MBX_CMDS;
170 lpfc_config_ring(phba, i, pmb);
171 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
172 if (rc != MBX_SUCCESS) {
173 lpfc_printf_log(phba,
176 "%d:0446 Adapter failed to init, "
177 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
183 phba->hba_state = LPFC_HBA_ERROR;
191 lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
192 struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
194 list_add_tail(&piocb->list, &pring->txcmplq);
195 pring->txcmplq_cnt++;
196 if (unlikely(pring->ringno == LPFC_ELS_RING))
197 mod_timer(&phba->els_tmofunc,
198 jiffies + HZ * (phba->fc_ratov << 1));
203 static struct lpfc_iocbq *
204 lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
206 struct list_head *dlp;
207 struct lpfc_iocbq *cmd_iocb;
211 list_remove_head((&pring->txq), cmd_iocb,
215 /* If the first ptr is not equal to the list header,
216 * deque the IOCBQ_t and return it.
224 lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
226 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
227 uint32_t max_cmd_idx = pring->numCiocb;
230 if ((pring->next_cmdidx == pring->cmdidx) &&
231 (++pring->next_cmdidx >= max_cmd_idx))
232 pring->next_cmdidx = 0;
234 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
236 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
238 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
239 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
240 "%d:0315 Ring %d issue: portCmdGet %d "
241 "is bigger then cmd ring %d\n",
242 phba->brd_no, pring->ringno,
243 pring->local_getidx, max_cmd_idx);
245 phba->hba_state = LPFC_HBA_ERROR;
247 * All error attention handlers are posted to
250 phba->work_ha |= HA_ERATT;
251 phba->work_hs = HS_FFER3;
253 wake_up(phba->work_wait);
258 if (pring->local_getidx == pring->next_cmdidx)
262 iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
268 lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
270 struct lpfc_iocbq ** new_arr;
271 struct lpfc_iocbq ** old_arr;
273 struct lpfc_sli *psli = &phba->sli;
276 spin_lock_irq(phba->host->host_lock);
277 iotag = psli->last_iotag;
278 if(++iotag < psli->iocbq_lookup_len) {
279 psli->last_iotag = iotag;
280 psli->iocbq_lookup[iotag] = iocbq;
281 spin_unlock_irq(phba->host->host_lock);
282 iocbq->iotag = iotag;
285 else if (psli->iocbq_lookup_len < (0xffff
286 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
287 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
288 spin_unlock_irq(phba->host->host_lock);
289 new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
292 memset((char *)new_arr, 0,
293 new_len * sizeof (struct lpfc_iocbq *));
294 spin_lock_irq(phba->host->host_lock);
295 old_arr = psli->iocbq_lookup;
296 if (new_len <= psli->iocbq_lookup_len) {
297 /* highly unprobable case */
299 iotag = psli->last_iotag;
300 if(++iotag < psli->iocbq_lookup_len) {
301 psli->last_iotag = iotag;
302 psli->iocbq_lookup[iotag] = iocbq;
303 spin_unlock_irq(phba->host->host_lock);
304 iocbq->iotag = iotag;
307 spin_unlock_irq(phba->host->host_lock);
310 if (psli->iocbq_lookup)
311 memcpy(new_arr, old_arr,
312 ((psli->last_iotag + 1) *
313 sizeof (struct lpfc_iocbq *)));
314 psli->iocbq_lookup = new_arr;
315 psli->iocbq_lookup_len = new_len;
316 psli->last_iotag = iotag;
317 psli->iocbq_lookup[iotag] = iocbq;
318 spin_unlock_irq(phba->host->host_lock);
319 iocbq->iotag = iotag;
324 spin_unlock_irq(phba->host->host_lock);
326 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
327 "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
328 phba->brd_no, psli->last_iotag);
334 lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
335 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
340 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
343 * Issue iocb command to adapter
345 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
347 pring->stats.iocb_cmd++;
350 * If there is no completion routine to call, we can release the
351 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
352 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
354 if (nextiocb->iocb_cmpl)
355 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
357 lpfc_sli_release_iocbq(phba, nextiocb);
360 * Let the HBA know what IOCB slot will be the next one the
361 * driver will put a command into.
363 pring->cmdidx = pring->next_cmdidx;
364 writel(pring->cmdidx, phba->MBslimaddr
365 + (SLIMOFF + (pring->ringno * 2)) * 4);
369 lpfc_sli_update_full_ring(struct lpfc_hba * phba,
370 struct lpfc_sli_ring *pring)
372 int ringno = pring->ringno;
374 pring->flag |= LPFC_CALL_RING_AVAILABLE;
379 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
380 * The HBA will tell us when an IOCB entry is available.
382 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
383 readl(phba->CAregaddr); /* flush */
385 pring->stats.iocb_cmd_full++;
389 lpfc_sli_update_ring(struct lpfc_hba * phba,
390 struct lpfc_sli_ring *pring)
392 int ringno = pring->ringno;
395 * Tell the HBA that there is work to do in this ring.
398 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
399 readl(phba->CAregaddr); /* flush */
403 lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
406 struct lpfc_iocbq *nextiocb;
410 * (a) there is anything on the txq to send
412 * (c) link attention events can be processed (fcp ring only)
413 * (d) IOCB processing is not blocked by the outstanding mbox command.
415 if (pring->txq_cnt &&
416 (phba->hba_state > LPFC_LINK_DOWN) &&
417 (pring->ringno != phba->sli.fcp_ring ||
418 phba->sli.sli_flag & LPFC_PROCESS_LA) &&
419 !(pring->flag & LPFC_STOP_IOCB_MBX)) {
421 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
422 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
423 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
426 lpfc_sli_update_ring(phba, pring);
428 lpfc_sli_update_full_ring(phba, pring);
434 /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
436 lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
438 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
440 /* If the ring is active, flag it */
441 if (phba->sli.ring[ringno].cmdringaddr) {
442 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
443 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
445 * Force update of the local copy of cmdGetInx
447 phba->sli.ring[ringno].local_getidx
448 = le32_to_cpu(pgp->cmdGetInx);
449 spin_lock_irq(phba->host->host_lock);
450 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
451 spin_unlock_irq(phba->host->host_lock);
457 lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
461 switch (mbxCommand) {
465 case MBX_RUN_BIU_DIAG:
468 case MBX_CONFIG_LINK:
469 case MBX_CONFIG_RING:
471 case MBX_READ_CONFIG:
472 case MBX_READ_RCONFIG:
474 case MBX_READ_STATUS:
478 case MBX_READ_LNK_STAT:
480 case MBX_UNREG_LOGIN:
483 case MBX_DUMP_MEMORY:
484 case MBX_DUMP_CONTEXT:
489 case MBX_DEL_LD_ENTRY:
490 case MBX_RUN_PROGRAM:
495 case MBX_CONFIG_FARP:
498 case MBX_RUN_BIU_DIAG64:
499 case MBX_CONFIG_PORT:
500 case MBX_READ_SPARM64:
502 case MBX_REG_LOGIN64:
504 case MBX_FLASH_WR_ULA:
506 case MBX_LOAD_EXP_ROM:
516 lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
518 wait_queue_head_t *pdone_q;
521 * If pdone_q is empty, the driver thread gave up waiting and
524 pdone_q = (wait_queue_head_t *) pmboxq->context1;
526 wake_up_interruptible(pdone_q);
531 lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
533 struct lpfc_dmabuf *mp;
534 mp = (struct lpfc_dmabuf *) (pmb->context1);
536 lpfc_mbuf_free(phba, mp->virt, mp->phys);
539 mempool_free( pmb, phba->mbox_mem_pool);
544 lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
549 struct lpfc_sli *psli;
551 uint32_t process_next;
554 /* We should only get here if we are in SLI2 mode */
555 if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
559 phba->sli.slistat.mbox_event++;
561 /* Get a Mailbox buffer to setup mailbox commands for callback */
562 if ((pmb = phba->sli.mbox_active)) {
564 mbox = &phba->slim2p->mbx;
566 /* First check out the status word */
567 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
569 /* Sanity check to ensure the host owns the mailbox */
570 if (pmbox->mbxOwner != OWN_HOST) {
571 /* Lets try for a while */
572 for (i = 0; i < 10240; i++) {
573 /* First copy command data */
574 lpfc_sli_pcimem_bcopy(mbox, pmbox,
576 if (pmbox->mbxOwner == OWN_HOST)
579 /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
581 lpfc_printf_log(phba,
584 "%d:0304 Stray Mailbox Interrupt "
585 "mbxCommand x%x mbxStatus x%x\n",
590 spin_lock_irq(phba->host->host_lock);
591 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
592 spin_unlock_irq(phba->host->host_lock);
597 del_timer_sync(&phba->sli.mbox_tmo);
598 phba->work_hba_events &= ~WORKER_MBOX_TMO;
601 * It is a fatal error if unknown mbox command completion.
603 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
606 /* Unknow mailbox command compl */
607 lpfc_printf_log(phba,
610 "%d:0323 Unknown Mailbox command %x Cmpl\n",
613 phba->hba_state = LPFC_HBA_ERROR;
614 phba->work_hs = HS_FFER3;
615 lpfc_handle_eratt(phba);
619 phba->sli.mbox_active = NULL;
620 if (pmbox->mbxStatus) {
621 phba->sli.slistat.mbox_stat_err++;
622 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
623 /* Mbox cmd cmpl error - RETRYing */
624 lpfc_printf_log(phba,
627 "%d:0305 Mbox cmd cmpl error - "
628 "RETRYing Data: x%x x%x x%x x%x\n",
632 pmbox->un.varWords[0],
634 pmbox->mbxStatus = 0;
635 pmbox->mbxOwner = OWN_HOST;
636 spin_lock_irq(phba->host->host_lock);
637 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
638 spin_unlock_irq(phba->host->host_lock);
639 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
640 if (rc == MBX_SUCCESS)
645 /* Mailbox cmd <cmd> Cmpl <cmpl> */
646 lpfc_printf_log(phba,
649 "%d:0307 Mailbox cmd x%x Cmpl x%p "
650 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
654 *((uint32_t *) pmbox),
655 pmbox->un.varWords[0],
656 pmbox->un.varWords[1],
657 pmbox->un.varWords[2],
658 pmbox->un.varWords[3],
659 pmbox->un.varWords[4],
660 pmbox->un.varWords[5],
661 pmbox->un.varWords[6],
662 pmbox->un.varWords[7]);
664 if (pmb->mbox_cmpl) {
665 lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
666 pmb->mbox_cmpl(phba,pmb);
672 process_next = 0; /* by default don't loop */
673 spin_lock_irq(phba->host->host_lock);
674 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
676 /* Process next mailbox command if there is one */
677 if ((pmb = lpfc_mbox_get(phba))) {
678 spin_unlock_irq(phba->host->host_lock);
679 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
680 if (rc == MBX_NOT_FINISHED) {
681 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
682 pmb->mbox_cmpl(phba,pmb);
684 continue; /* loop back */
687 spin_unlock_irq(phba->host->host_lock);
688 /* Turn on IOCB processing */
689 for (i = 0; i < phba->sli.num_rings; i++) {
690 lpfc_sli_turn_on_ring(phba, i);
693 /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
694 while (!list_empty(&phba->freebufList)) {
695 struct lpfc_dmabuf *mp;
698 list_remove_head((&phba->freebufList),
703 lpfc_mbuf_free(phba, mp->virt,
710 } while (process_next);
715 lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
716 struct lpfc_iocbq *saveq)
724 irsp = &(saveq->iocb);
725 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
726 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
731 (WORD5 *) & (saveq->iocb.un.
733 Rctl = w5p->hcsw.Rctl;
734 Type = w5p->hcsw.Type;
736 /* Firmware Workaround */
737 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
738 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
741 w5p->hcsw.Rctl = Rctl;
742 w5p->hcsw.Type = Type;
745 /* unSolicited Responses */
746 if (pring->prt[0].profile) {
747 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
748 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
752 /* We must search, based on rctl / type
753 for the right routine */
754 for (i = 0; i < pring->num_mask;
756 if ((pring->prt[i].rctl ==
760 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
761 (pring->prt[i].lpfc_sli_rcv_unsol_event)
762 (phba, pring, saveq);
769 /* Unexpected Rctl / Type received */
770 /* Ring <ringno> handler: unexpected
771 Rctl <Rctl> Type <Type> received */
772 lpfc_printf_log(phba,
775 "%d:0313 Ring %d handler: unexpected Rctl x%x "
776 "Type x%x received \n",
785 static struct lpfc_iocbq *
786 lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
787 struct lpfc_sli_ring * pring,
788 struct lpfc_iocbq * prspiocb)
790 struct lpfc_iocbq *cmd_iocb = NULL;
793 iotag = prspiocb->iocb.ulpIoTag;
795 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
796 cmd_iocb = phba->sli.iocbq_lookup[iotag];
797 list_del(&cmd_iocb->list);
798 pring->txcmplq_cnt--;
802 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
803 "%d:0317 iotag x%x is out off "
804 "range: max iotag x%x wd0 x%x\n",
806 phba->sli.last_iotag,
807 *(((uint32_t *) &prspiocb->iocb) + 7));
812 lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
813 struct lpfc_iocbq *saveq)
815 struct lpfc_iocbq * cmdiocbp;
819 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
820 spin_lock_irqsave(phba->host->host_lock, iflag);
821 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
823 if (cmdiocbp->iocb_cmpl) {
825 * Post all ELS completions to the worker thread.
826 * All other are passed to the completion callback.
828 if (pring->ringno == LPFC_ELS_RING) {
829 spin_unlock_irqrestore(phba->host->host_lock,
831 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
832 spin_lock_irqsave(phba->host->host_lock, iflag);
835 spin_unlock_irqrestore(phba->host->host_lock,
837 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
838 spin_lock_irqsave(phba->host->host_lock, iflag);
841 lpfc_sli_release_iocbq(phba, cmdiocbp);
844 * Unknown initiating command based on the response iotag.
845 * This could be the case on the ELS ring because of
848 if (pring->ringno != LPFC_ELS_RING) {
850 * Ring <ringno> handler: unexpected completion IoTag
853 lpfc_printf_log(phba,
856 "%d:0322 Ring %d handler: unexpected "
857 "completion IoTag x%x Data: x%x x%x x%x x%x\n",
860 saveq->iocb.ulpIoTag,
861 saveq->iocb.ulpStatus,
862 saveq->iocb.un.ulpWord[4],
863 saveq->iocb.ulpCommand,
864 saveq->iocb.ulpContext);
868 spin_unlock_irqrestore(phba->host->host_lock, iflag);
872 static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba,
873 struct lpfc_sli_ring * pring)
875 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
877 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
878 * rsp ring <portRspMax>
880 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
881 "%d:0312 Ring %d handler: portRspPut %d "
882 "is bigger then rsp ring %d\n",
883 phba->brd_no, pring->ringno,
884 le32_to_cpu(pgp->rspPutInx),
887 phba->hba_state = LPFC_HBA_ERROR;
890 * All error attention handlers are posted to
893 phba->work_ha |= HA_ERATT;
894 phba->work_hs = HS_FFER3;
896 wake_up(phba->work_wait);
901 void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba)
903 struct lpfc_sli * psli = &phba->sli;
904 struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING];
906 IOCB_t *entry = NULL;
907 struct lpfc_iocbq *cmdiocbq = NULL;
908 struct lpfc_iocbq rspiocbq;
909 struct lpfc_pgp *pgp;
911 uint32_t portRspPut, portRspMax;
913 uint32_t rsp_cmpl = 0;
914 void __iomem *to_slim;
917 pring->stats.iocb_event++;
919 /* The driver assumes SLI-2 mode */
920 pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
923 * The next available response entry should never exceed the maximum
924 * entries. If it does, treat it as an adapter hardware error.
926 portRspMax = pring->numRiocb;
927 portRspPut = le32_to_cpu(pgp->rspPutInx);
928 if (unlikely(portRspPut >= portRspMax)) {
929 lpfc_sli_rsp_pointers_error(phba, pring);
934 while (pring->rspidx != portRspPut) {
936 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
938 if (++pring->rspidx >= portRspMax)
941 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
942 (uint32_t *) &rspiocbq.iocb,
944 irsp = &rspiocbq.iocb;
945 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
946 pring->stats.iocb_rsp++;
949 if (unlikely(irsp->ulpStatus)) {
950 /* Rsp ring <ringno> error: IOCB */
951 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
952 "%d:0326 Rsp Ring %d error: IOCB Data: "
953 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
954 phba->brd_no, pring->ringno,
961 *(((uint32_t *) irsp) + 6),
962 *(((uint32_t *) irsp) + 7));
966 case LPFC_ABORT_IOCB:
969 * Idle exchange closed via ABTS from port. No iocb
970 * resources need to be recovered.
972 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
973 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
974 "%d:0314 IOCB cmd 0x%x"
975 " processed. Skipping"
976 " completion", phba->brd_no,
981 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
983 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
984 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
989 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
990 char adaptermsg[LPFC_MAX_ADPTMSG];
991 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
992 memcpy(&adaptermsg[0], (uint8_t *) irsp,
994 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
995 phba->brd_no, adaptermsg);
997 /* Unknown IOCB command */
998 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
999 "%d:0321 Unknown IOCB command "
1000 "Data: x%x, x%x x%x x%x x%x\n",
1011 * The response IOCB has been processed. Update the ring
1012 * pointer in SLIM. If the port response put pointer has not
1013 * been updated, sync the pgp->rspPutInx and fetch the new port
1014 * response put pointer.
1016 to_slim = phba->MBslimaddr +
1017 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
1018 writeb(pring->rspidx, to_slim);
1020 if (pring->rspidx == portRspPut)
1021 portRspPut = le32_to_cpu(pgp->rspPutInx);
1024 ha_copy = readl(phba->HAregaddr);
1025 ha_copy >>= (LPFC_FCP_RING * 4);
1027 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
1028 pring->stats.iocb_rsp_full++;
1029 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1030 writel(status, phba->CAregaddr);
1031 readl(phba->CAregaddr);
1033 if ((ha_copy & HA_R0CE_RSP) &&
1034 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1035 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1036 pring->stats.iocb_cmd_empty++;
1038 /* Force update of the local copy of cmdGetInx */
1039 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1040 lpfc_sli_resume_iocb(phba, pring);
1042 if ((pring->lpfc_sli_cmd_available))
1043 (pring->lpfc_sli_cmd_available) (phba, pring);
1051 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1052 * to check it explicitly.
1055 lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
1056 struct lpfc_sli_ring * pring, uint32_t mask)
1058 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
1059 IOCB_t *irsp = NULL;
1060 IOCB_t *entry = NULL;
1061 struct lpfc_iocbq *cmdiocbq = NULL;
1062 struct lpfc_iocbq rspiocbq;
1064 uint32_t portRspPut, portRspMax;
1066 lpfc_iocb_type type;
1067 unsigned long iflag;
1068 uint32_t rsp_cmpl = 0;
1069 void __iomem *to_slim;
1071 spin_lock_irqsave(phba->host->host_lock, iflag);
1072 pring->stats.iocb_event++;
1075 * The next available response entry should never exceed the maximum
1076 * entries. If it does, treat it as an adapter hardware error.
1078 portRspMax = pring->numRiocb;
1079 portRspPut = le32_to_cpu(pgp->rspPutInx);
1080 if (unlikely(portRspPut >= portRspMax)) {
1081 lpfc_sli_rsp_pointers_error(phba, pring);
1082 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1087 while (pring->rspidx != portRspPut) {
1089 * Fetch an entry off the ring and copy it into a local data
1090 * structure. The copy involves a byte-swap since the
1091 * network byte order and pci byte orders are different.
1093 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
1095 if (++pring->rspidx >= portRspMax)
1098 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1099 (uint32_t *) &rspiocbq.iocb,
1101 INIT_LIST_HEAD(&(rspiocbq.list));
1102 irsp = &rspiocbq.iocb;
1104 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1105 pring->stats.iocb_rsp++;
1108 if (unlikely(irsp->ulpStatus)) {
1109 /* Rsp ring <ringno> error: IOCB */
1110 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
1111 "%d:0336 Rsp Ring %d error: IOCB Data: "
1112 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1113 phba->brd_no, pring->ringno,
1114 irsp->un.ulpWord[0], irsp->un.ulpWord[1],
1115 irsp->un.ulpWord[2], irsp->un.ulpWord[3],
1116 irsp->un.ulpWord[4], irsp->un.ulpWord[5],
1117 *(((uint32_t *) irsp) + 6),
1118 *(((uint32_t *) irsp) + 7));
1122 case LPFC_ABORT_IOCB:
1125 * Idle exchange closed via ABTS from port. No iocb
1126 * resources need to be recovered.
1128 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
1129 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1130 "%d:0333 IOCB cmd 0x%x"
1131 " processed. Skipping"
1132 " completion\n", phba->brd_no,
1137 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1139 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
1140 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1141 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1144 spin_unlock_irqrestore(
1145 phba->host->host_lock, iflag);
1146 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1148 spin_lock_irqsave(phba->host->host_lock,
1153 case LPFC_UNSOL_IOCB:
1154 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1155 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
1156 spin_lock_irqsave(phba->host->host_lock, iflag);
1159 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1160 char adaptermsg[LPFC_MAX_ADPTMSG];
1161 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1162 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1164 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
1165 phba->brd_no, adaptermsg);
1167 /* Unknown IOCB command */
1168 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1169 "%d:0334 Unknown IOCB command "
1170 "Data: x%x, x%x x%x x%x x%x\n",
1171 phba->brd_no, type, irsp->ulpCommand,
1172 irsp->ulpStatus, irsp->ulpIoTag,
1179 * The response IOCB has been processed. Update the ring
1180 * pointer in SLIM. If the port response put pointer has not
1181 * been updated, sync the pgp->rspPutInx and fetch the new port
1182 * response put pointer.
1184 to_slim = phba->MBslimaddr +
1185 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
1186 writel(pring->rspidx, to_slim);
1188 if (pring->rspidx == portRspPut)
1189 portRspPut = le32_to_cpu(pgp->rspPutInx);
1192 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1193 pring->stats.iocb_rsp_full++;
1194 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1195 writel(status, phba->CAregaddr);
1196 readl(phba->CAregaddr);
1198 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1199 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1200 pring->stats.iocb_cmd_empty++;
1202 /* Force update of the local copy of cmdGetInx */
1203 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1204 lpfc_sli_resume_iocb(phba, pring);
1206 if ((pring->lpfc_sli_cmd_available))
1207 (pring->lpfc_sli_cmd_available) (phba, pring);
1211 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1217 lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
1218 struct lpfc_sli_ring * pring, uint32_t mask)
1221 IOCB_t *irsp = NULL;
1222 struct lpfc_iocbq *rspiocbp = NULL;
1223 struct lpfc_iocbq *next_iocb;
1224 struct lpfc_iocbq *cmdiocbp;
1225 struct lpfc_iocbq *saveq;
1226 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
1227 uint8_t iocb_cmd_type;
1228 lpfc_iocb_type type;
1229 uint32_t status, free_saveq;
1230 uint32_t portRspPut, portRspMax;
1232 unsigned long iflag;
1233 void __iomem *to_slim;
1235 spin_lock_irqsave(phba->host->host_lock, iflag);
1236 pring->stats.iocb_event++;
1239 * The next available response entry should never exceed the maximum
1240 * entries. If it does, treat it as an adapter hardware error.
1242 portRspMax = pring->numRiocb;
1243 portRspPut = le32_to_cpu(pgp->rspPutInx);
1244 if (portRspPut >= portRspMax) {
1246 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1247 * rsp ring <portRspMax>
1249 lpfc_printf_log(phba,
1252 "%d:0303 Ring %d handler: portRspPut %d "
1253 "is bigger then rsp ring %d\n",
1255 pring->ringno, portRspPut, portRspMax);
1257 phba->hba_state = LPFC_HBA_ERROR;
1258 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1260 phba->work_hs = HS_FFER3;
1261 lpfc_handle_eratt(phba);
1267 while (pring->rspidx != portRspPut) {
1269 * Build a completion list and call the appropriate handler.
1270 * The process is to get the next available response iocb, get
1271 * a free iocb from the list, copy the response data into the
1272 * free iocb, insert to the continuation list, and update the
1273 * next response index to slim. This process makes response
1274 * iocb's in the ring available to DMA as fast as possible but
1275 * pays a penalty for a copy operation. Since the iocb is
1276 * only 32 bytes, this penalty is considered small relative to
1277 * the PCI reads for register values and a slim write. When
1278 * the ulpLe field is set, the entire Command has been
1281 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
1282 rspiocbp = lpfc_sli_get_iocbq(phba);
1283 if (rspiocbp == NULL) {
1284 printk(KERN_ERR "%s: out of buffers! Failing "
1285 "completion.\n", __FUNCTION__);
1289 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
1290 irsp = &rspiocbp->iocb;
1292 if (++pring->rspidx >= portRspMax)
1295 to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
1297 writel(pring->rspidx, to_slim);
1299 if (list_empty(&(pring->iocb_continueq))) {
1300 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1302 list_add_tail(&rspiocbp->list,
1303 &(pring->iocb_continueq));
1306 pring->iocb_continueq_cnt++;
1309 * By default, the driver expects to free all resources
1310 * associated with this iocb completion.
1313 saveq = list_get_first(&pring->iocb_continueq,
1314 struct lpfc_iocbq, list);
1315 irsp = &(saveq->iocb);
1316 list_del_init(&pring->iocb_continueq);
1317 pring->iocb_continueq_cnt = 0;
1319 pring->stats.iocb_rsp++;
1321 if (irsp->ulpStatus) {
1322 /* Rsp ring <ringno> error: IOCB */
1323 lpfc_printf_log(phba,
1326 "%d:0328 Rsp Ring %d error: IOCB Data: "
1327 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1330 irsp->un.ulpWord[0],
1331 irsp->un.ulpWord[1],
1332 irsp->un.ulpWord[2],
1333 irsp->un.ulpWord[3],
1334 irsp->un.ulpWord[4],
1335 irsp->un.ulpWord[5],
1336 *(((uint32_t *) irsp) + 6),
1337 *(((uint32_t *) irsp) + 7));
1341 * Fetch the IOCB command type and call the correct
1342 * completion routine. Solicited and Unsolicited
1343 * IOCBs on the ELS ring get freed back to the
1344 * lpfc_iocb_list by the discovery kernel thread.
1346 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1347 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1348 if (type == LPFC_SOL_IOCB) {
1349 spin_unlock_irqrestore(phba->host->host_lock,
1351 rc = lpfc_sli_process_sol_iocb(phba, pring,
1353 spin_lock_irqsave(phba->host->host_lock, iflag);
1354 } else if (type == LPFC_UNSOL_IOCB) {
1355 spin_unlock_irqrestore(phba->host->host_lock,
1357 rc = lpfc_sli_process_unsol_iocb(phba, pring,
1359 spin_lock_irqsave(phba->host->host_lock, iflag);
1360 } else if (type == LPFC_ABORT_IOCB) {
1361 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1363 lpfc_sli_iocbq_lookup(phba, pring,
1365 /* Call the specified completion
1367 if (cmdiocbp->iocb_cmpl) {
1368 spin_unlock_irqrestore(
1369 phba->host->host_lock,
1371 (cmdiocbp->iocb_cmpl) (phba,
1374 phba->host->host_lock,
1377 lpfc_sli_release_iocbq(phba,
1380 } else if (type == LPFC_UNKNOWN_IOCB) {
1381 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1383 char adaptermsg[LPFC_MAX_ADPTMSG];
1385 memset(adaptermsg, 0,
1387 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1389 dev_warn(&((phba->pcidev)->dev),
1391 phba->brd_no, adaptermsg);
1393 /* Unknown IOCB command */
1394 lpfc_printf_log(phba,
1397 "%d:0335 Unknown IOCB command "
1398 "Data: x%x x%x x%x x%x\n",
1408 if (!list_empty(&saveq->list)) {
1409 list_for_each_entry_safe(rspiocbp,
1413 list_del(&rspiocbp->list);
1414 lpfc_sli_release_iocbq(phba,
1418 lpfc_sli_release_iocbq(phba, saveq);
1423 * If the port response put pointer has not been updated, sync
1424 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1425 * response put pointer.
1427 if (pring->rspidx == portRspPut) {
1428 portRspPut = le32_to_cpu(pgp->rspPutInx);
1430 } /* while (pring->rspidx != portRspPut) */
1432 if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
1433 /* At least one response entry has been freed */
1434 pring->stats.iocb_rsp_full++;
1435 /* SET RxRE_RSP in Chip Att register */
1436 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1437 writel(status, phba->CAregaddr);
1438 readl(phba->CAregaddr); /* flush */
1440 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1441 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1442 pring->stats.iocb_cmd_empty++;
1444 /* Force update of the local copy of cmdGetInx */
1445 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1446 lpfc_sli_resume_iocb(phba, pring);
1448 if ((pring->lpfc_sli_cmd_available))
1449 (pring->lpfc_sli_cmd_available) (phba, pring);
1453 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1458 lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1460 struct lpfc_iocbq *iocb, *next_iocb;
1461 IOCB_t *icmd = NULL, *cmd = NULL;
1466 /* Error everything on txq and txcmplq
1469 spin_lock_irq(phba->host->host_lock);
1470 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
1471 list_del_init(&iocb->list);
1472 if (iocb->iocb_cmpl) {
1474 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1475 icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1476 spin_unlock_irq(phba->host->host_lock);
1477 (iocb->iocb_cmpl) (phba, iocb, iocb);
1478 spin_lock_irq(phba->host->host_lock);
1480 lpfc_sli_release_iocbq(phba, iocb);
1483 INIT_LIST_HEAD(&(pring->txq));
1485 /* Next issue ABTS for everything on the txcmplq */
1486 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
1490 * Imediate abort of IOCB, deque and call compl
1493 list_del_init(&iocb->list);
1494 pring->txcmplq_cnt--;
1496 if (iocb->iocb_cmpl) {
1497 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1498 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1499 spin_unlock_irq(phba->host->host_lock);
1500 (iocb->iocb_cmpl) (phba, iocb, iocb);
1501 spin_lock_irq(phba->host->host_lock);
1503 lpfc_sli_release_iocbq(phba, iocb);
1506 INIT_LIST_HEAD(&pring->txcmplq);
1507 pring->txcmplq_cnt = 0;
1508 spin_unlock_irq(phba->host->host_lock);
1514 lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
1520 /* Read the HBA Host Status Register */
1521 status = readl(phba->HSregaddr);
1524 * Check status register every 100ms for 5 retries, then every
1525 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1526 * every 2.5 sec for 4.
1527 * Break our of the loop if errors occurred during init.
1529 while (((status & mask) != mask) &&
1530 !(status & HS_FFERM) &&
1541 phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
1542 lpfc_sli_brdrestart(phba);
1544 /* Read the HBA Host Status Register */
1545 status = readl(phba->HSregaddr);
1548 /* Check to see if any errors occurred during init */
1549 if ((status & HS_FFERM) || (i >= 20)) {
1550 phba->hba_state = LPFC_HBA_ERROR;
1557 #define BARRIER_TEST_PATTERN (0xdeadbeef)
1559 void lpfc_reset_barrier(struct lpfc_hba * phba)
1561 uint32_t __iomem *resp_buf;
1562 uint32_t __iomem *mbox_buf;
1563 volatile uint32_t mbox;
1568 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
1569 if (hdrtype != 0x80 ||
1570 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
1571 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
1575 * Tell the other part of the chip to suspend temporarily all
1578 resp_buf = phba->MBslimaddr;
1580 /* Disable the error attention */
1581 hc_copy = readl(phba->HCregaddr);
1582 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
1583 readl(phba->HCregaddr); /* flush */
1585 if (readl(phba->HAregaddr) & HA_ERATT) {
1586 /* Clear Chip error bit */
1587 writel(HA_ERATT, phba->HAregaddr);
1592 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
1593 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
1595 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
1596 mbox_buf = phba->MBslimaddr;
1597 writel(mbox, mbox_buf);
1600 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
1603 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
1604 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
1611 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
1612 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
1617 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
1620 if (readl(phba->HAregaddr) & HA_ERATT) {
1621 writel(HA_ERATT, phba->HAregaddr);
1626 writel(hc_copy, phba->HCregaddr);
1627 readl(phba->HCregaddr); /* flush */
1631 lpfc_sli_brdkill(struct lpfc_hba * phba)
1633 struct lpfc_sli *psli;
1643 lpfc_printf_log(phba,
1646 "%d:0329 Kill HBA Data: x%x x%x\n",
1651 if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
1655 /* Disable the error attention */
1656 spin_lock_irq(phba->host->host_lock);
1657 status = readl(phba->HCregaddr);
1658 status &= ~HC_ERINT_ENA;
1659 writel(status, phba->HCregaddr);
1660 readl(phba->HCregaddr); /* flush */
1661 spin_unlock_irq(phba->host->host_lock);
1663 lpfc_kill_board(phba, pmb);
1664 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1665 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
1667 if (retval != MBX_SUCCESS) {
1668 if (retval != MBX_BUSY)
1669 mempool_free(pmb, phba->mbox_mem_pool);
1673 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
1675 mempool_free(pmb, phba->mbox_mem_pool);
1677 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
1678 * attention every 100ms for 3 seconds. If we don't get ERATT after
1679 * 3 seconds we still set HBA_ERROR state because the status of the
1680 * board is now undefined.
1682 ha_copy = readl(phba->HAregaddr);
1684 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
1686 ha_copy = readl(phba->HAregaddr);
1689 del_timer_sync(&psli->mbox_tmo);
1690 if (ha_copy & HA_ERATT) {
1691 writel(HA_ERATT, phba->HAregaddr);
1694 spin_lock_irq(phba->host->host_lock);
1695 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1696 spin_unlock_irq(phba->host->host_lock);
1698 psli->mbox_active = NULL;
1699 lpfc_hba_down_post(phba);
1700 phba->hba_state = LPFC_HBA_ERROR;
1702 return (ha_copy & HA_ERATT ? 0 : 1);
1706 lpfc_sli_brdreset(struct lpfc_hba * phba)
1708 struct lpfc_sli *psli;
1709 struct lpfc_sli_ring *pring;
1716 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1717 "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
1718 phba->hba_state, psli->sli_flag);
1720 /* perform board reset */
1721 phba->fc_eventTag = 0;
1723 phba->fc_prevDID = 0;
1725 /* Turn off parity checking and serr during the physical reset */
1726 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
1727 pci_write_config_word(phba->pcidev, PCI_COMMAND,
1729 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
1731 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
1732 /* Now toggle INITFF bit in the Host Control Register */
1733 writel(HC_INITFF, phba->HCregaddr);
1735 readl(phba->HCregaddr); /* flush */
1736 writel(0, phba->HCregaddr);
1737 readl(phba->HCregaddr); /* flush */
1739 /* Restore PCI cmd register */
1740 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
1742 /* Initialize relevant SLI info */
1743 for (i = 0; i < psli->num_rings; i++) {
1744 pring = &psli->ring[i];
1747 pring->next_cmdidx = 0;
1748 pring->local_getidx = 0;
1750 pring->missbufcnt = 0;
1753 phba->hba_state = LPFC_WARM_START;
1758 lpfc_sli_brdrestart(struct lpfc_hba * phba)
1761 struct lpfc_sli *psli;
1763 volatile uint32_t word0;
1764 void __iomem *to_slim;
1766 spin_lock_irq(phba->host->host_lock);
1771 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1772 "%d:0337 Restart HBA Data: x%x x%x\n", phba->brd_no,
1773 phba->hba_state, psli->sli_flag);
1776 mb = (MAILBOX_t *) &word0;
1777 mb->mbxCommand = MBX_RESTART;
1780 lpfc_reset_barrier(phba);
1782 to_slim = phba->MBslimaddr;
1783 writel(*(uint32_t *) mb, to_slim);
1784 readl(to_slim); /* flush */
1786 /* Only skip post after fc_ffinit is completed */
1787 if (phba->hba_state) {
1789 word0 = 1; /* This is really setting up word1 */
1792 word0 = 0; /* This is really setting up word1 */
1794 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1795 writel(*(uint32_t *) mb, to_slim);
1796 readl(to_slim); /* flush */
1798 lpfc_sli_brdreset(phba);
1800 phba->hba_state = LPFC_INIT_START;
1802 spin_unlock_irq(phba->host->host_lock);
1804 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
1805 psli->stats_start = get_seconds();
1812 lpfc_hba_down_post(phba);
1818 lpfc_sli_chipset_init(struct lpfc_hba *phba)
1820 uint32_t status, i = 0;
1822 /* Read the HBA Host Status Register */
1823 status = readl(phba->HSregaddr);
1825 /* Check status register to see what current state is */
1827 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
1829 /* Check every 100ms for 5 retries, then every 500ms for 5, then
1830 * every 2.5 sec for 5, then reset board and every 2.5 sec for
1834 /* Adapter failed to init, timeout, status reg
1836 lpfc_printf_log(phba,
1839 "%d:0436 Adapter failed to init, "
1840 "timeout, status reg x%x\n",
1843 phba->hba_state = LPFC_HBA_ERROR;
1847 /* Check to see if any errors occurred during init */
1848 if (status & HS_FFERM) {
1849 /* ERROR: During chipset initialization */
1850 /* Adapter failed to init, chipset, status reg
1852 lpfc_printf_log(phba,
1855 "%d:0437 Adapter failed to init, "
1856 "chipset, status reg x%x\n",
1859 phba->hba_state = LPFC_HBA_ERROR;
1865 } else if (i <= 10) {
1872 phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
1873 lpfc_sli_brdrestart(phba);
1875 /* Read the HBA Host Status Register */
1876 status = readl(phba->HSregaddr);
1879 /* Check to see if any errors occurred during init */
1880 if (status & HS_FFERM) {
1881 /* ERROR: During chipset initialization */
1882 /* Adapter failed to init, chipset, status reg <status> */
1883 lpfc_printf_log(phba,
1886 "%d:0438 Adapter failed to init, chipset, "
1890 phba->hba_state = LPFC_HBA_ERROR;
1894 /* Clear all interrupt enable conditions */
1895 writel(0, phba->HCregaddr);
1896 readl(phba->HCregaddr); /* flush */
1898 /* setup host attn register */
1899 writel(0xffffffff, phba->HAregaddr);
1900 readl(phba->HAregaddr); /* flush */
1905 lpfc_sli_hba_setup(struct lpfc_hba * phba)
1908 uint32_t resetcount = 0, rc = 0, done = 0;
1910 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1912 phba->hba_state = LPFC_HBA_ERROR;
1916 while (resetcount < 2 && !done) {
1917 spin_lock_irq(phba->host->host_lock);
1918 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
1919 spin_unlock_irq(phba->host->host_lock);
1920 phba->hba_state = LPFC_STATE_UNKNOWN;
1921 lpfc_sli_brdrestart(phba);
1923 rc = lpfc_sli_chipset_init(phba);
1927 spin_lock_irq(phba->host->host_lock);
1928 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1929 spin_unlock_irq(phba->host->host_lock);
1932 /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
1933 * means the call was successful. Any other nonzero value is a failure,
1934 * but if ERESTART is returned, the driver may reset the HBA and try
1937 rc = lpfc_config_port_prep(phba);
1938 if (rc == -ERESTART) {
1939 phba->hba_state = 0;
1945 phba->hba_state = LPFC_INIT_MBX_CMDS;
1946 lpfc_config_port(phba, pmb);
1947 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1948 if (rc == MBX_SUCCESS)
1951 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1952 "%d:0442 Adapter failed to init, mbxCmd x%x "
1953 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
1954 phba->brd_no, pmb->mb.mbxCommand,
1955 pmb->mb.mbxStatus, 0);
1956 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1960 goto lpfc_sli_hba_setup_error;
1962 rc = lpfc_sli_ring_map(phba, pmb);
1965 goto lpfc_sli_hba_setup_error;
1967 phba->sli.sli_flag |= LPFC_PROCESS_LA;
1969 rc = lpfc_config_port_post(phba);
1971 goto lpfc_sli_hba_setup_error;
1973 goto lpfc_sli_hba_setup_exit;
1974 lpfc_sli_hba_setup_error:
1975 phba->hba_state = LPFC_HBA_ERROR;
1976 lpfc_sli_hba_setup_exit:
1977 mempool_free(pmb, phba->mbox_mem_pool);
1982 lpfc_mbox_abort(struct lpfc_hba * phba)
1984 LPFC_MBOXQ_t *pmbox;
1987 if (phba->sli.mbox_active) {
1988 del_timer_sync(&phba->sli.mbox_tmo);
1989 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1990 pmbox = phba->sli.mbox_active;
1992 phba->sli.mbox_active = NULL;
1993 if (pmbox->mbox_cmpl) {
1994 mb->mbxStatus = MBX_NOT_FINISHED;
1995 (pmbox->mbox_cmpl) (phba, pmbox);
1997 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2000 /* Abort all the non active mailbox commands. */
2001 spin_lock_irq(phba->host->host_lock);
2002 pmbox = lpfc_mbox_get(phba);
2005 if (pmbox->mbox_cmpl) {
2006 mb->mbxStatus = MBX_NOT_FINISHED;
2007 spin_unlock_irq(phba->host->host_lock);
2008 (pmbox->mbox_cmpl) (phba, pmbox);
2009 spin_lock_irq(phba->host->host_lock);
2011 pmbox = lpfc_mbox_get(phba);
2013 spin_unlock_irq(phba->host->host_lock);
2017 /*! lpfc_mbox_timeout
2021 * \param hba Pointer to per struct lpfc_hba structure
2022 * \param l1 Pointer to the driver's mailbox queue.
2028 * This routine handles mailbox timeout events at timer interrupt context.
2031 lpfc_mbox_timeout(unsigned long ptr)
2033 struct lpfc_hba *phba;
2034 unsigned long iflag;
2036 phba = (struct lpfc_hba *)ptr;
2037 spin_lock_irqsave(phba->host->host_lock, iflag);
2038 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
2039 phba->work_hba_events |= WORKER_MBOX_TMO;
2040 if (phba->work_wait)
2041 wake_up(phba->work_wait);
2043 spin_unlock_irqrestore(phba->host->host_lock, iflag);
2047 lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2049 LPFC_MBOXQ_t *pmbox;
2052 spin_lock_irq(phba->host->host_lock);
2053 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
2054 spin_unlock_irq(phba->host->host_lock);
2058 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2060 pmbox = phba->sli.mbox_active;
2063 /* Mbox cmd <mbxCommand> timeout */
2064 lpfc_printf_log(phba,
2067 "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
2072 phba->sli.mbox_active);
2074 phba->sli.mbox_active = NULL;
2075 if (pmbox->mbox_cmpl) {
2076 mb->mbxStatus = MBX_NOT_FINISHED;
2077 spin_unlock_irq(phba->host->host_lock);
2078 (pmbox->mbox_cmpl) (phba, pmbox);
2079 spin_lock_irq(phba->host->host_lock);
2081 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2083 spin_unlock_irq(phba->host->host_lock);
2084 lpfc_mbox_abort(phba);
2089 lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
2092 struct lpfc_sli *psli;
2093 uint32_t status, evtctr;
2096 unsigned long drvr_flag = 0;
2097 volatile uint32_t word0, ldata;
2098 void __iomem *to_slim;
2102 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
2106 status = MBX_SUCCESS;
2108 if (phba->hba_state == LPFC_HBA_ERROR) {
2109 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2111 /* Mbox command <mbxCommand> cannot issue */
2112 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
2113 return (MBX_NOT_FINISHED);
2116 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2117 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2118 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2119 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
2120 return (MBX_NOT_FINISHED);
2123 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2124 /* Polling for a mbox command when another one is already active
2125 * is not allowed in SLI. Also, the driver must have established
2126 * SLI2 mode to queue and process multiple mbox commands.
2129 if (flag & MBX_POLL) {
2130 spin_unlock_irqrestore(phba->host->host_lock,
2133 /* Mbox command <mbxCommand> cannot issue */
2134 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
2135 return (MBX_NOT_FINISHED);
2138 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2139 spin_unlock_irqrestore(phba->host->host_lock,
2141 /* Mbox command <mbxCommand> cannot issue */
2142 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
2143 return (MBX_NOT_FINISHED);
2146 /* Handle STOP IOCB processing flag. This is only meaningful
2147 * if we are not polling for mbox completion.
2149 if (flag & MBX_STOP_IOCB) {
2150 flag &= ~MBX_STOP_IOCB;
2151 /* Now flag each ring */
2152 for (i = 0; i < psli->num_rings; i++) {
2153 /* If the ring is active, flag it */
2154 if (psli->ring[i].cmdringaddr) {
2155 psli->ring[i].flag |=
2161 /* Another mailbox command is still being processed, queue this
2162 * command to be processed later.
2164 lpfc_mbox_put(phba, pmbox);
2166 /* Mbox cmd issue - BUSY */
2167 lpfc_printf_log(phba,
2170 "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
2177 psli->slistat.mbox_busy++;
2178 spin_unlock_irqrestore(phba->host->host_lock,
2184 /* Handle STOP IOCB processing flag. This is only meaningful
2185 * if we are not polling for mbox completion.
2187 if (flag & MBX_STOP_IOCB) {
2188 flag &= ~MBX_STOP_IOCB;
2189 if (flag == MBX_NOWAIT) {
2190 /* Now flag each ring */
2191 for (i = 0; i < psli->num_rings; i++) {
2192 /* If the ring is active, flag it */
2193 if (psli->ring[i].cmdringaddr) {
2194 psli->ring[i].flag |=
2201 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2203 /* If we are not polling, we MUST be in SLI2 mode */
2204 if (flag != MBX_POLL) {
2205 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2206 (mb->mbxCommand != MBX_KILL_BOARD)) {
2207 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2208 spin_unlock_irqrestore(phba->host->host_lock,
2210 /* Mbox command <mbxCommand> cannot issue */
2211 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
2212 return (MBX_NOT_FINISHED);
2214 /* timeout active mbox command */
2215 mod_timer(&psli->mbox_tmo, (jiffies +
2216 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
2219 /* Mailbox cmd <cmd> issue */
2220 lpfc_printf_log(phba,
2223 "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
2230 psli->slistat.mbox_cmd++;
2231 evtctr = psli->slistat.mbox_event;
2233 /* next set own bit for the adapter and copy over command word */
2234 mb->mbxOwner = OWN_CHIP;
2236 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2237 /* First copy command data to host SLIM area */
2238 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
2240 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2241 /* copy command data into host mbox for cmpl */
2242 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
2246 /* First copy mbox command data to HBA SLIM, skip past first
2248 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2249 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2250 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2252 /* Next copy over first word, with mbxOwner set */
2253 ldata = *((volatile uint32_t *)mb);
2254 to_slim = phba->MBslimaddr;
2255 writel(ldata, to_slim);
2256 readl(to_slim); /* flush */
2258 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2259 /* switch over to host mailbox */
2260 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2265 /* interrupt board to doit right away */
2266 writel(CA_MBATT, phba->CAregaddr);
2267 readl(phba->CAregaddr); /* flush */
2271 /* Don't wait for it to finish, just return */
2272 psli->mbox_active = pmbox;
2276 psli->mbox_active = NULL;
2277 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2278 /* First read mbox status word */
2279 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
2280 word0 = le32_to_cpu(word0);
2282 /* First read mbox status word */
2283 word0 = readl(phba->MBslimaddr);
2286 /* Read the HBA Host Attention Register */
2287 ha_copy = readl(phba->HAregaddr);
2289 i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
2290 i *= 1000; /* Convert to ms */
2292 /* Wait for command to complete */
2293 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2294 (!(ha_copy & HA_MBATT) &&
2295 (phba->hba_state > LPFC_WARM_START))) {
2297 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2298 spin_unlock_irqrestore(phba->host->host_lock,
2300 return (MBX_NOT_FINISHED);
2303 /* Check if we took a mbox interrupt while we were
2305 if (((word0 & OWN_CHIP) != OWN_CHIP)
2306 && (evtctr != psli->slistat.mbox_event))
2309 spin_unlock_irqrestore(phba->host->host_lock,
2312 /* Can be in interrupt context, do not sleep */
2313 /* (or might be called with interrupts disabled) */
2316 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
2318 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2319 /* First copy command data */
2320 word0 = *((volatile uint32_t *)
2321 &phba->slim2p->mbx);
2322 word0 = le32_to_cpu(word0);
2323 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2325 volatile uint32_t slimword0;
2326 /* Check real SLIM for any errors */
2327 slimword0 = readl(phba->MBslimaddr);
2328 slimmb = (MAILBOX_t *) & slimword0;
2329 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2330 && slimmb->mbxStatus) {
2337 /* First copy command data */
2338 word0 = readl(phba->MBslimaddr);
2340 /* Read the HBA Host Attention Register */
2341 ha_copy = readl(phba->HAregaddr);
2344 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2345 /* copy results back to user */
2346 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
2349 /* First copy command data */
2350 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2352 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2354 lpfc_memcpy_from_slim((void *)pmbox->context2,
2355 phba->MBslimaddr + DMP_RSP_OFFSET,
2356 mb->un.varDmp.word_cnt);
2360 writel(HA_MBATT, phba->HAregaddr);
2361 readl(phba->HAregaddr); /* flush */
2363 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2364 status = mb->mbxStatus;
2367 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2372 lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2373 struct lpfc_iocbq * piocb)
2375 /* Insert the caller's iocb in the txq tail for later processing. */
2376 list_add_tail(&piocb->list, &pring->txq);
2381 static struct lpfc_iocbq *
2382 lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2383 struct lpfc_iocbq ** piocb)
2385 struct lpfc_iocbq * nextiocb;
2387 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2397 lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2398 struct lpfc_iocbq *piocb, uint32_t flag)
2400 struct lpfc_iocbq *nextiocb;
2404 * We should never get an IOCB if we are in a < LINK_DOWN state
2406 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2410 * Check to see if we are blocking IOCB processing because of a
2411 * outstanding mbox command.
2413 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
2416 if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
2418 * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
2419 * can be issued if the link is not up.
2421 switch (piocb->iocb.ulpCommand) {
2422 case CMD_QUE_RING_BUF_CN:
2423 case CMD_QUE_RING_BUF64_CN:
2425 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2426 * completion, iocb_cmpl MUST be 0.
2428 if (piocb->iocb_cmpl)
2429 piocb->iocb_cmpl = NULL;
2431 case CMD_CREATE_XRI_CR:
2438 * For FCP commands, we must be in a state where we can process link
2441 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
2442 !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
2445 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2446 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2447 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2450 lpfc_sli_update_ring(phba, pring);
2452 lpfc_sli_update_full_ring(phba, pring);
2455 return IOCB_SUCCESS;
2460 pring->stats.iocb_cmd_delay++;
2464 if (!(flag & SLI_IOCB_RET_IOCB)) {
2465 lpfc_sli_ringtx_put(phba, pring, piocb);
2466 return IOCB_SUCCESS;
2473 lpfc_extra_ring_setup( struct lpfc_hba *phba)
2475 struct lpfc_sli *psli;
2476 struct lpfc_sli_ring *pring;
2480 /* Adjust cmd/rsp ring iocb entries more evenly */
2482 /* Take some away from the FCP ring */
2483 pring = &psli->ring[psli->fcp_ring];
2484 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2485 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2486 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2487 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2489 /* and give them to the extra ring */
2490 pring = &psli->ring[psli->extra_ring];
2492 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2493 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2494 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2495 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2497 /* Setup default profile for this ring */
2498 pring->iotag_max = 4096;
2499 pring->num_mask = 1;
2500 pring->prt[0].profile = 0; /* Mask 0 */
2501 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
2502 pring->prt[0].type = phba->cfg_multi_ring_type;
2503 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
2508 lpfc_sli_setup(struct lpfc_hba *phba)
2511 struct lpfc_sli *psli = &phba->sli;
2512 struct lpfc_sli_ring *pring;
2514 psli->num_rings = MAX_CONFIGURED_RINGS;
2516 psli->fcp_ring = LPFC_FCP_RING;
2517 psli->next_ring = LPFC_FCP_NEXT_RING;
2518 psli->extra_ring = LPFC_EXTRA_RING;
2520 psli->iocbq_lookup = NULL;
2521 psli->iocbq_lookup_len = 0;
2522 psli->last_iotag = 0;
2524 for (i = 0; i < psli->num_rings; i++) {
2525 pring = &psli->ring[i];
2527 case LPFC_FCP_RING: /* ring 0 - FCP */
2528 /* numCiocb and numRiocb are used in config_port */
2529 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
2530 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
2531 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2532 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2533 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2534 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2535 pring->iotag_ctr = 0;
2537 (phba->cfg_hba_queue_depth * 2);
2538 pring->fast_iotag = pring->iotag_max;
2539 pring->num_mask = 0;
2541 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
2542 /* numCiocb and numRiocb are used in config_port */
2543 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
2544 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
2545 pring->num_mask = 0;
2547 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
2548 /* numCiocb and numRiocb are used in config_port */
2549 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
2550 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
2551 pring->fast_iotag = 0;
2552 pring->iotag_ctr = 0;
2553 pring->iotag_max = 4096;
2554 pring->num_mask = 4;
2555 pring->prt[0].profile = 0; /* Mask 0 */
2556 pring->prt[0].rctl = FC_ELS_REQ;
2557 pring->prt[0].type = FC_ELS_DATA;
2558 pring->prt[0].lpfc_sli_rcv_unsol_event =
2559 lpfc_els_unsol_event;
2560 pring->prt[1].profile = 0; /* Mask 1 */
2561 pring->prt[1].rctl = FC_ELS_RSP;
2562 pring->prt[1].type = FC_ELS_DATA;
2563 pring->prt[1].lpfc_sli_rcv_unsol_event =
2564 lpfc_els_unsol_event;
2565 pring->prt[2].profile = 0; /* Mask 2 */
2566 /* NameServer Inquiry */
2567 pring->prt[2].rctl = FC_UNSOL_CTL;
2569 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
2570 pring->prt[2].lpfc_sli_rcv_unsol_event =
2571 lpfc_ct_unsol_event;
2572 pring->prt[3].profile = 0; /* Mask 3 */
2573 /* NameServer response */
2574 pring->prt[3].rctl = FC_SOL_CTL;
2576 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
2577 pring->prt[3].lpfc_sli_rcv_unsol_event =
2578 lpfc_ct_unsol_event;
2581 totiocb += (pring->numCiocb + pring->numRiocb);
2583 if (totiocb > MAX_SLI2_IOCB) {
2584 /* Too many cmd / rsp ring entries in SLI2 SLIM */
2585 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2586 "%d:0462 Too many cmd / rsp ring entries in "
2587 "SLI2 SLIM Data: x%x x%x\n",
2588 phba->brd_no, totiocb, MAX_SLI2_IOCB);
2590 if (phba->cfg_multi_ring_support == 2)
2591 lpfc_extra_ring_setup(phba);
2597 lpfc_sli_queue_setup(struct lpfc_hba * phba)
2599 struct lpfc_sli *psli;
2600 struct lpfc_sli_ring *pring;
2604 spin_lock_irq(phba->host->host_lock);
2605 INIT_LIST_HEAD(&psli->mboxq);
2606 /* Initialize list headers for txq and txcmplq as double linked lists */
2607 for (i = 0; i < psli->num_rings; i++) {
2608 pring = &psli->ring[i];
2610 pring->next_cmdidx = 0;
2611 pring->local_getidx = 0;
2613 INIT_LIST_HEAD(&pring->txq);
2614 INIT_LIST_HEAD(&pring->txcmplq);
2615 INIT_LIST_HEAD(&pring->iocb_continueq);
2616 INIT_LIST_HEAD(&pring->postbufq);
2618 spin_unlock_irq(phba->host->host_lock);
2623 lpfc_sli_hba_down(struct lpfc_hba * phba)
2625 struct lpfc_sli *psli;
2626 struct lpfc_sli_ring *pring;
2628 struct lpfc_iocbq *iocb, *next_iocb;
2629 IOCB_t *icmd = NULL;
2631 unsigned long flags = 0;
2634 lpfc_hba_down_prep(phba);
2636 spin_lock_irqsave(phba->host->host_lock, flags);
2638 for (i = 0; i < psli->num_rings; i++) {
2639 pring = &psli->ring[i];
2640 pring->flag |= LPFC_DEFERRED_RING_EVENT;
2643 * Error everything on the txq since these iocbs have not been
2644 * given to the FW yet.
2648 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
2649 list_del_init(&iocb->list);
2650 if (iocb->iocb_cmpl) {
2652 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
2653 icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
2654 spin_unlock_irqrestore(phba->host->host_lock,
2656 (iocb->iocb_cmpl) (phba, iocb, iocb);
2657 spin_lock_irqsave(phba->host->host_lock, flags);
2659 lpfc_sli_release_iocbq(phba, iocb);
2662 INIT_LIST_HEAD(&(pring->txq));
2666 spin_unlock_irqrestore(phba->host->host_lock, flags);
2668 /* Return any active mbox cmds */
2669 del_timer_sync(&psli->mbox_tmo);
2670 spin_lock_irqsave(phba->host->host_lock, flags);
2671 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2672 if (psli->mbox_active) {
2673 pmb = psli->mbox_active;
2674 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2675 if (pmb->mbox_cmpl) {
2676 spin_unlock_irqrestore(phba->host->host_lock, flags);
2677 pmb->mbox_cmpl(phba,pmb);
2678 spin_lock_irqsave(phba->host->host_lock, flags);
2681 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2682 psli->mbox_active = NULL;
2684 /* Return any pending mbox cmds */
2685 while ((pmb = lpfc_mbox_get(phba)) != NULL) {
2686 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2687 if (pmb->mbox_cmpl) {
2688 spin_unlock_irqrestore(phba->host->host_lock, flags);
2689 pmb->mbox_cmpl(phba,pmb);
2690 spin_lock_irqsave(phba->host->host_lock, flags);
2694 INIT_LIST_HEAD(&psli->mboxq);
2696 spin_unlock_irqrestore(phba->host->host_lock, flags);
2702 lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
2704 uint32_t *src = srcp;
2705 uint32_t *dest = destp;
2709 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
2711 ldata = le32_to_cpu(ldata);
2719 lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2720 struct lpfc_dmabuf * mp)
2722 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
2724 list_add_tail(&mp->list, &pring->postbufq);
2726 pring->postbufq_cnt++;
2731 struct lpfc_dmabuf *
2732 lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2735 struct lpfc_dmabuf *mp, *next_mp;
2736 struct list_head *slp = &pring->postbufq;
2738 /* Search postbufq, from the begining, looking for a match on phys */
2739 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
2740 if (mp->phys == phys) {
2741 list_del_init(&mp->list);
2742 pring->postbufq_cnt--;
2747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2748 "%d:0410 Cannot find virtual addr for mapped buf on "
2749 "ring %d Data x%llx x%p x%p x%x\n",
2750 phba->brd_no, pring->ringno, (unsigned long long)phys,
2751 slp->next, slp->prev, pring->postbufq_cnt);
2756 lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2757 struct lpfc_iocbq * rspiocb)
2759 struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
2760 /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
2762 * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
2764 if (cmdiocb->context2) {
2765 buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
2767 /* Free the response IOCB before completing the abort
2770 list_remove_head((&buf_ptr1->list), buf_ptr,
2771 struct lpfc_dmabuf, list);
2773 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2776 lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
2780 if (cmdiocb->context3) {
2781 buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
2782 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2786 lpfc_sli_release_iocbq(phba, cmdiocb);
2791 lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
2792 struct lpfc_sli_ring * pring,
2793 struct lpfc_iocbq * cmdiocb)
2795 struct lpfc_iocbq *abtsiocbp;
2796 IOCB_t *icmd = NULL;
2797 IOCB_t *iabt = NULL;
2799 /* issue ABTS for this IOCB based on iotag */
2800 abtsiocbp = lpfc_sli_get_iocbq(phba);
2801 if (abtsiocbp == NULL)
2804 iabt = &abtsiocbp->iocb;
2805 icmd = &cmdiocb->iocb;
2806 switch (icmd->ulpCommand) {
2807 case CMD_ELS_REQUEST64_CR:
2808 /* Even though we abort the ELS command, the firmware may access
2809 * the BPL or other resources before it processes our
2810 * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
2811 * resources till the actual abort request completes.
2813 abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
2814 abtsiocbp->context2 = cmdiocb->context2;
2815 abtsiocbp->context3 = cmdiocb->context3;
2816 cmdiocb->context2 = NULL;
2817 cmdiocb->context3 = NULL;
2818 abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
2821 lpfc_sli_release_iocbq(phba, abtsiocbp);
2825 iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
2826 iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
2829 iabt->ulpClass = CLASS3;
2830 iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
2832 if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
2833 lpfc_sli_release_iocbq(phba, abtsiocbp);
2841 lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
2842 uint64_t lun_id, uint32_t ctx,
2843 lpfc_ctx_cmd ctx_cmd)
2845 struct lpfc_scsi_buf *lpfc_cmd;
2846 struct scsi_cmnd *cmnd;
2849 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
2852 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
2853 cmnd = lpfc_cmd->pCmd;
2860 if ((cmnd->device->id == tgt_id) &&
2861 (cmnd->device->lun == lun_id))
2865 if (cmnd->device->id == tgt_id)
2869 if (iocbq->iocb.ulpContext == ctx)
2876 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
2877 __FUNCTION__, ctx_cmd);
2885 lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2886 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
2888 struct lpfc_iocbq *iocbq;
2891 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
2892 iocbq = phba->sli.iocbq_lookup[i];
2894 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
2903 lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2904 struct lpfc_iocbq * rspiocb)
2906 spin_lock_irq(phba->host->host_lock);
2907 lpfc_sli_release_iocbq(phba, cmdiocb);
2908 spin_unlock_irq(phba->host->host_lock);
2913 lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2914 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
2915 lpfc_ctx_cmd abort_cmd)
2917 struct lpfc_iocbq *iocbq;
2918 struct lpfc_iocbq *abtsiocb;
2920 int errcnt = 0, ret_val = 0;
2923 for (i = 1; i <= phba->sli.last_iotag; i++) {
2924 iocbq = phba->sli.iocbq_lookup[i];
2926 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
2930 /* issue ABTS for this IOCB based on iotag */
2931 abtsiocb = lpfc_sli_get_iocbq(phba);
2932 if (abtsiocb == NULL) {
2938 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
2939 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
2940 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
2941 abtsiocb->iocb.ulpLe = 1;
2942 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2944 if (phba->hba_state >= LPFC_LINK_UP)
2945 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
2947 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
2949 /* Setup callback routine and issue the command. */
2950 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
2951 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
2952 if (ret_val == IOCB_ERROR) {
2953 lpfc_sli_release_iocbq(phba, abtsiocb);
2963 lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
2964 struct lpfc_iocbq *cmdiocbq,
2965 struct lpfc_iocbq *rspiocbq)
2967 wait_queue_head_t *pdone_q;
2968 unsigned long iflags;
2970 spin_lock_irqsave(phba->host->host_lock, iflags);
2971 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
2972 if (cmdiocbq->context2 && rspiocbq)
2973 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
2974 &rspiocbq->iocb, sizeof(IOCB_t));
2976 pdone_q = cmdiocbq->context_un.wait_queue;
2977 spin_unlock_irqrestore(phba->host->host_lock, iflags);
2984 * Issue the caller's iocb and wait for its completion, but no longer than the
2985 * caller's timeout. Note that iocb_flags is cleared before the
2986 * lpfc_sli_issue_call since the wake routine sets a unique value and by
2987 * definition this is a wait function.
2990 lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
2991 struct lpfc_sli_ring * pring,
2992 struct lpfc_iocbq * piocb,
2993 struct lpfc_iocbq * prspiocbq,
2996 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
2997 long timeleft, timeout_req = 0;
2998 int retval = IOCB_SUCCESS;
3002 * If the caller has provided a response iocbq buffer, then context2
3003 * is NULL or its an error.
3006 if (piocb->context2)
3008 piocb->context2 = prspiocbq;
3011 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
3012 piocb->context_un.wait_queue = &done_q;
3013 piocb->iocb_flag &= ~LPFC_IO_WAKE;
3015 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3016 creg_val = readl(phba->HCregaddr);
3017 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3018 writel(creg_val, phba->HCregaddr);
3019 readl(phba->HCregaddr); /* flush */
3022 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3023 if (retval == IOCB_SUCCESS) {
3024 timeout_req = timeout * HZ;
3025 spin_unlock_irq(phba->host->host_lock);
3026 timeleft = wait_event_timeout(done_q,
3027 piocb->iocb_flag & LPFC_IO_WAKE,
3029 spin_lock_irq(phba->host->host_lock);
3031 if (timeleft == 0) {
3032 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3033 "%d:0338 IOCB wait timeout error - no "
3034 "wake response Data x%x\n",
3035 phba->brd_no, timeout);
3036 retval = IOCB_TIMEDOUT;
3037 } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
3038 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3039 "%d:0330 IOCB wake NOT set, "
3040 "Data x%x x%lx\n", phba->brd_no,
3041 timeout, (timeleft / jiffies));
3042 retval = IOCB_TIMEDOUT;
3044 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3045 "%d:0331 IOCB wake signaled\n",
3049 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3050 "%d:0332 IOCB wait issue failed, Data x%x\n",
3051 phba->brd_no, retval);
3052 retval = IOCB_ERROR;
3055 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3056 creg_val = readl(phba->HCregaddr);
3057 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3058 writel(creg_val, phba->HCregaddr);
3059 readl(phba->HCregaddr); /* flush */
3063 piocb->context2 = NULL;
3065 piocb->context_un.wait_queue = NULL;
3066 piocb->iocb_cmpl = NULL;
3071 lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
3074 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
3075 DECLARE_WAITQUEUE(wq_entry, current);
3076 uint32_t timeleft = 0;
3079 /* The caller must leave context1 empty. */
3080 if (pmboxq->context1 != 0) {
3081 return (MBX_NOT_FINISHED);
3084 /* setup wake call as IOCB callback */
3085 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
3086 /* setup context field to pass wait_queue pointer to wake function */
3087 pmboxq->context1 = &done_q;
3089 /* start to sleep before we wait, to avoid races */
3090 set_current_state(TASK_INTERRUPTIBLE);
3091 add_wait_queue(&done_q, &wq_entry);
3093 /* now issue the command */
3094 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
3096 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
3097 timeleft = schedule_timeout(timeout * HZ);
3098 pmboxq->context1 = NULL;
3099 /* if schedule_timeout returns 0, we timed out and were not
3101 if ((timeleft == 0) || signal_pending(current))
3102 retval = MBX_TIMEOUT;
3104 retval = MBX_SUCCESS;
3108 set_current_state(TASK_RUNNING);
3109 remove_wait_queue(&done_q, &wq_entry);
3114 lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
3118 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !phba->stopped) {
3119 if (i++ > LPFC_MBOX_TMO * 1000)
3122 if (lpfc_sli_handle_mb_event(phba) == 0)
3128 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
3132 lpfc_intr_handler(int irq, void *dev_id)
3134 struct lpfc_hba *phba;
3136 uint32_t work_ha_copy;
3137 unsigned long status;
3142 * Get the driver's phba structure from the dev_id and
3143 * assume the HBA is not interrupting.
3145 phba = (struct lpfc_hba *) dev_id;
3147 if (unlikely(!phba))
3150 phba->sli.slistat.sli_intr++;
3153 * Call the HBA to see if it is interrupting. If not, don't claim
3157 /* Ignore all interrupts during initialization. */
3158 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
3162 * Read host attention register to determine interrupt source
3163 * Clear Attention Sources, except Error Attention (to
3164 * preserve status) and Link Attention
3166 spin_lock(phba->host->host_lock);
3167 ha_copy = readl(phba->HAregaddr);
3168 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
3169 readl(phba->HAregaddr); /* flush */
3170 spin_unlock(phba->host->host_lock);
3172 if (unlikely(!ha_copy))
3175 work_ha_copy = ha_copy & phba->work_ha_mask;
3177 if (unlikely(work_ha_copy)) {
3178 if (work_ha_copy & HA_LATT) {
3179 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
3181 * Turn off Link Attention interrupts
3182 * until CLEAR_LA done
3184 spin_lock(phba->host->host_lock);
3185 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
3186 control = readl(phba->HCregaddr);
3187 control &= ~HC_LAINT_ENA;
3188 writel(control, phba->HCregaddr);
3189 readl(phba->HCregaddr); /* flush */
3190 spin_unlock(phba->host->host_lock);
3193 work_ha_copy &= ~HA_LATT;
3196 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
3197 for (i = 0; i < phba->sli.num_rings; i++) {
3198 if (work_ha_copy & (HA_RXATT << (4*i))) {
3200 * Turn off Slow Rings interrupts
3202 spin_lock(phba->host->host_lock);
3203 control = readl(phba->HCregaddr);
3204 control &= ~(HC_R0INT_ENA << i);
3205 writel(control, phba->HCregaddr);
3206 readl(phba->HCregaddr); /* flush */
3207 spin_unlock(phba->host->host_lock);
3212 if (work_ha_copy & HA_ERATT) {
3213 phba->hba_state = LPFC_HBA_ERROR;
3215 * There was a link/board error. Read the
3216 * status register to retrieve the error event
3219 phba->sli.slistat.err_attn_event++;
3220 /* Save status info */
3221 phba->work_hs = readl(phba->HSregaddr);
3222 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
3223 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
3225 /* Clear Chip error bit */
3226 writel(HA_ERATT, phba->HAregaddr);
3227 readl(phba->HAregaddr); /* flush */
3231 spin_lock(phba->host->host_lock);
3232 phba->work_ha |= work_ha_copy;
3233 if (phba->work_wait)
3234 wake_up(phba->work_wait);
3235 spin_unlock(phba->host->host_lock);
3238 ha_copy &= ~(phba->work_ha_mask);
3241 * Process all events on FCP ring. Take the optimized path for
3242 * FCP IO. Any other IO is slow path and is handled by
3243 * the worker thread.
3245 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
3246 status >>= (4*LPFC_FCP_RING);
3247 if (status & HA_RXATT)
3248 lpfc_sli_handle_fast_ring_event(phba,
3249 &phba->sli.ring[LPFC_FCP_RING],
3252 if (phba->cfg_multi_ring_support == 2) {
3254 * Process all events on extra ring. Take the optimized path
3255 * for extra ring IO. Any other IO is slow path and is handled
3256 * by the worker thread.
3258 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
3259 status >>= (4*LPFC_EXTRA_RING);
3260 if (status & HA_RXATT) {
3261 lpfc_sli_handle_fast_ring_event(phba,
3262 &phba->sli.ring[LPFC_EXTRA_RING],
3268 } /* lpfc_intr_handler */