2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * A note about mapbase / membase
17 * mapbase is the physical address of the IO port.
18 * membase is an 'ioremapped' cookie.
21 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/ioport.h>
28 #include <linux/init.h>
29 #include <linux/console.h>
30 #include <linux/sysrq.h>
31 #include <linux/delay.h>
32 #include <linux/platform_device.h>
33 #include <linux/tty.h>
34 #include <linux/tty_flip.h>
35 #include <linux/serial_reg.h>
36 #include <linux/serial_core.h>
37 #include <linux/serial.h>
38 #include <linux/serial_8250.h>
39 #include <linux/nmi.h>
40 #include <linux/mutex.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60 static struct uart_driver serial8250_reg;
62 static int serial_index(struct uart_port *port)
64 return (serial8250_reg.minor - 64) + port->line;
71 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
73 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
77 #define DEBUG_INTR(fmt...) printk(fmt)
79 #define DEBUG_INTR(fmt...) do { } while (0)
82 #define PASS_LIMIT 256
85 * We default to IRQ0 for the "no irq" hack. Some
86 * machine types want others as well - they're free
87 * to redefine this in their header file.
89 #define is_real_interrupt(irq) ((irq) != 0)
91 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
92 #define CONFIG_SERIAL_DETECT_IRQ 1
94 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
95 #define CONFIG_SERIAL_MANY_PORTS 1
99 * HUB6 is always on. This will be removed once the header
100 * files have been cleaned.
102 #define CONFIG_HUB6 1
104 #include <asm/serial.h>
106 * SERIAL_PORT_DFNS tells us about built-in ports that have no
107 * standard enumeration mechanism. Platforms that can find all
108 * serial ports via mechanisms like ACPI or PCI need not supply it.
110 #ifndef SERIAL_PORT_DFNS
111 #define SERIAL_PORT_DFNS
114 static const struct old_serial_port old_serial_port[] = {
115 SERIAL_PORT_DFNS /* defined in asm/serial.h */
118 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
120 #ifdef CONFIG_SERIAL_8250_RSA
122 #define PORT_RSA_MAX 4
123 static unsigned long probe_rsa[PORT_RSA_MAX];
124 static unsigned int probe_rsa_count;
125 #endif /* CONFIG_SERIAL_8250_RSA */
127 struct uart_8250_port {
128 struct uart_port port;
129 struct timer_list timer; /* "no irq" timer */
130 struct list_head list; /* ports on this IRQ */
131 unsigned short capabilities; /* port capabilities */
132 unsigned short bugs; /* port bugs */
133 unsigned int tx_loadsz; /* transmit fifo load size */
138 unsigned char mcr_mask; /* mask of user bits */
139 unsigned char mcr_force; /* mask of forced bits */
142 * Some bits in registers are cleared on a read, so they must
143 * be saved whenever the register is read but the bits will not
144 * be immediately processed.
146 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
147 unsigned char lsr_saved_flags;
148 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
149 unsigned char msr_saved_flags;
152 * We provide a per-port pm hook.
154 void (*pm)(struct uart_port *port,
155 unsigned int state, unsigned int old);
159 struct hlist_node node;
161 spinlock_t lock; /* Protects list not the hash */
162 struct list_head *head;
165 #define NR_IRQ_HASH 32 /* Can be adjusted later */
166 static struct hlist_head irq_lists[NR_IRQ_HASH];
167 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
170 * Here we define the default xmit fifo size used for each type of UART.
172 static const struct serial8250_config uart_config[] = {
197 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
198 .flags = UART_CAP_FIFO,
209 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
215 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
217 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
223 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
225 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
233 .name = "16C950/954",
236 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
237 .flags = UART_CAP_FIFO,
243 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
245 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
251 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
252 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
258 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
259 .flags = UART_CAP_FIFO,
265 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
266 .flags = UART_CAP_FIFO | UART_NATSEMI,
272 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
273 .flags = UART_CAP_FIFO | UART_CAP_UUE,
279 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
280 .flags = UART_CAP_FIFO,
286 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
287 .flags = UART_CAP_FIFO,
291 #if defined (CONFIG_SERIAL_8250_AU1X00)
293 /* Au1x00 UART hardware has a weird register layout */
294 static const u8 au_io_in_map[] = {
304 static const u8 au_io_out_map[] = {
312 /* sane hardware needs no mapping */
313 static inline int map_8250_in_reg(struct uart_port *p, int offset)
315 if (p->iotype != UPIO_AU)
317 return au_io_in_map[offset];
320 static inline int map_8250_out_reg(struct uart_port *p, int offset)
322 if (p->iotype != UPIO_AU)
324 return au_io_out_map[offset];
327 #elif defined(CONFIG_SERIAL_8250_RM9K)
351 static inline int map_8250_in_reg(struct uart_port *p, int offset)
353 if (p->iotype != UPIO_RM9000)
355 return regmap_in[offset];
358 static inline int map_8250_out_reg(struct uart_port *p, int offset)
360 if (p->iotype != UPIO_RM9000)
362 return regmap_out[offset];
367 /* sane hardware needs no mapping */
368 #define map_8250_in_reg(up, offset) (offset)
369 #define map_8250_out_reg(up, offset) (offset)
373 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
375 offset = map_8250_in_reg(p, offset) << p->regshift;
376 outb(p->hub6 - 1 + offset, p->iobase);
377 return inb(p->iobase + 1);
380 static void hub6_serial_out(struct uart_port *p, int offset, int value)
382 offset = map_8250_out_reg(p, offset) << p->regshift;
383 outb(p->hub6 - 1 + offset, p->iobase);
384 outb(value, p->iobase + 1);
387 static unsigned int mem_serial_in(struct uart_port *p, int offset)
389 offset = map_8250_in_reg(p, offset) << p->regshift;
390 return readb(p->membase + offset);
393 static void mem_serial_out(struct uart_port *p, int offset, int value)
395 offset = map_8250_out_reg(p, offset) << p->regshift;
396 writeb(value, p->membase + offset);
399 static void mem32_serial_out(struct uart_port *p, int offset, int value)
401 offset = map_8250_out_reg(p, offset) << p->regshift;
402 writel(value, p->membase + offset);
405 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
407 offset = map_8250_in_reg(p, offset) << p->regshift;
408 return readl(p->membase + offset);
411 #ifdef CONFIG_SERIAL_8250_AU1X00
412 static unsigned int au_serial_in(struct uart_port *p, int offset)
414 offset = map_8250_in_reg(p, offset) << p->regshift;
415 return __raw_readl(p->membase + offset);
418 static void au_serial_out(struct uart_port *p, int offset, int value)
420 offset = map_8250_out_reg(p, offset) << p->regshift;
421 __raw_writel(value, p->membase + offset);
425 static unsigned int tsi_serial_in(struct uart_port *p, int offset)
428 offset = map_8250_in_reg(p, offset) << p->regshift;
429 if (offset == UART_IIR) {
430 tmp = readl(p->membase + (UART_IIR & ~3));
431 return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
433 return readb(p->membase + offset);
436 static void tsi_serial_out(struct uart_port *p, int offset, int value)
438 offset = map_8250_out_reg(p, offset) << p->regshift;
439 if (!((offset == UART_IER) && (value & UART_IER_UUE)))
440 writeb(value, p->membase + offset);
443 static void dwapb_serial_out(struct uart_port *p, int offset, int value)
445 int save_offset = offset;
446 offset = map_8250_out_reg(p, offset) << p->regshift;
447 /* Save the LCR value so it can be re-written when a
448 * Busy Detect interrupt occurs. */
449 if (save_offset == UART_LCR) {
450 struct uart_8250_port *up = (struct uart_8250_port *)p;
453 writeb(value, p->membase + offset);
454 /* Read the IER to ensure any interrupt is cleared before
455 * returning from ISR. */
456 if (save_offset == UART_TX || save_offset == UART_IER)
457 value = p->serial_in(p, UART_IER);
460 static unsigned int io_serial_in(struct uart_port *p, int offset)
462 offset = map_8250_in_reg(p, offset) << p->regshift;
463 return inb(p->iobase + offset);
466 static void io_serial_out(struct uart_port *p, int offset, int value)
468 offset = map_8250_out_reg(p, offset) << p->regshift;
469 outb(value, p->iobase + offset);
472 static void set_io_from_upio(struct uart_port *p)
476 p->serial_in = hub6_serial_in;
477 p->serial_out = hub6_serial_out;
481 p->serial_in = mem_serial_in;
482 p->serial_out = mem_serial_out;
487 p->serial_in = mem32_serial_in;
488 p->serial_out = mem32_serial_out;
491 #ifdef CONFIG_SERIAL_8250_AU1X00
493 p->serial_in = au_serial_in;
494 p->serial_out = au_serial_out;
498 p->serial_in = tsi_serial_in;
499 p->serial_out = tsi_serial_out;
503 p->serial_in = mem_serial_in;
504 p->serial_out = dwapb_serial_out;
508 p->serial_in = io_serial_in;
509 p->serial_out = io_serial_out;
515 serial_out_sync(struct uart_8250_port *up, int offset, int value)
517 struct uart_port *p = &up->port;
521 #ifdef CONFIG_SERIAL_8250_AU1X00
525 p->serial_out(p, offset, value);
526 p->serial_in(p, UART_LCR); /* safe, no side-effects */
529 p->serial_out(p, offset, value);
533 #define serial_in(up, offset) \
534 (up->port.serial_in(&(up)->port, (offset)))
535 #define serial_out(up, offset, value) \
536 (up->port.serial_out(&(up)->port, (offset), (value)))
538 * We used to support using pause I/O for certain machines. We
539 * haven't supported this for a while, but just in case it's badly
540 * needed for certain old 386 machines, I've left these #define's
543 #define serial_inp(up, offset) serial_in(up, offset)
544 #define serial_outp(up, offset, value) serial_out(up, offset, value)
546 /* Uart divisor latch read */
547 static inline int _serial_dl_read(struct uart_8250_port *up)
549 return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
552 /* Uart divisor latch write */
553 static inline void _serial_dl_write(struct uart_8250_port *up, int value)
555 serial_outp(up, UART_DLL, value & 0xff);
556 serial_outp(up, UART_DLM, value >> 8 & 0xff);
559 #if defined(CONFIG_SERIAL_8250_AU1X00)
560 /* Au1x00 haven't got a standard divisor latch */
561 static int serial_dl_read(struct uart_8250_port *up)
563 if (up->port.iotype == UPIO_AU)
564 return __raw_readl(up->port.membase + 0x28);
566 return _serial_dl_read(up);
569 static void serial_dl_write(struct uart_8250_port *up, int value)
571 if (up->port.iotype == UPIO_AU)
572 __raw_writel(value, up->port.membase + 0x28);
574 _serial_dl_write(up, value);
576 #elif defined(CONFIG_SERIAL_8250_RM9K)
577 static int serial_dl_read(struct uart_8250_port *up)
579 return (up->port.iotype == UPIO_RM9000) ?
580 (((__raw_readl(up->port.membase + 0x10) << 8) |
581 (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
585 static void serial_dl_write(struct uart_8250_port *up, int value)
587 if (up->port.iotype == UPIO_RM9000) {
588 __raw_writel(value, up->port.membase + 0x08);
589 __raw_writel(value >> 8, up->port.membase + 0x10);
591 _serial_dl_write(up, value);
595 #define serial_dl_read(up) _serial_dl_read(up)
596 #define serial_dl_write(up, value) _serial_dl_write(up, value)
602 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
604 serial_out(up, UART_SCR, offset);
605 serial_out(up, UART_ICR, value);
608 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
612 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
613 serial_out(up, UART_SCR, offset);
614 value = serial_in(up, UART_ICR);
615 serial_icr_write(up, UART_ACR, up->acr);
623 static void serial8250_clear_fifos(struct uart_8250_port *p)
625 if (p->capabilities & UART_CAP_FIFO) {
626 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
627 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
628 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
629 serial_outp(p, UART_FCR, 0);
634 * IER sleep support. UARTs which have EFRs need the "extended
635 * capability" bit enabled. Note that on XR16C850s, we need to
636 * reset LCR to write to IER.
638 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
640 if (p->capabilities & UART_CAP_SLEEP) {
641 if (p->capabilities & UART_CAP_EFR) {
642 serial_outp(p, UART_LCR, 0xBF);
643 serial_outp(p, UART_EFR, UART_EFR_ECB);
644 serial_outp(p, UART_LCR, 0);
646 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
647 if (p->capabilities & UART_CAP_EFR) {
648 serial_outp(p, UART_LCR, 0xBF);
649 serial_outp(p, UART_EFR, 0);
650 serial_outp(p, UART_LCR, 0);
655 #ifdef CONFIG_SERIAL_8250_RSA
657 * Attempts to turn on the RSA FIFO. Returns zero on failure.
658 * We set the port uart clock rate if we succeed.
660 static int __enable_rsa(struct uart_8250_port *up)
665 mode = serial_inp(up, UART_RSA_MSR);
666 result = mode & UART_RSA_MSR_FIFO;
669 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
670 mode = serial_inp(up, UART_RSA_MSR);
671 result = mode & UART_RSA_MSR_FIFO;
675 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
680 static void enable_rsa(struct uart_8250_port *up)
682 if (up->port.type == PORT_RSA) {
683 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
684 spin_lock_irq(&up->port.lock);
686 spin_unlock_irq(&up->port.lock);
688 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
689 serial_outp(up, UART_RSA_FRR, 0);
694 * Attempts to turn off the RSA FIFO. Returns zero on failure.
695 * It is unknown why interrupts were disabled in here. However,
696 * the caller is expected to preserve this behaviour by grabbing
697 * the spinlock before calling this function.
699 static void disable_rsa(struct uart_8250_port *up)
704 if (up->port.type == PORT_RSA &&
705 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
706 spin_lock_irq(&up->port.lock);
708 mode = serial_inp(up, UART_RSA_MSR);
709 result = !(mode & UART_RSA_MSR_FIFO);
712 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
713 mode = serial_inp(up, UART_RSA_MSR);
714 result = !(mode & UART_RSA_MSR_FIFO);
718 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
719 spin_unlock_irq(&up->port.lock);
722 #endif /* CONFIG_SERIAL_8250_RSA */
725 * This is a quickie test to see how big the FIFO is.
726 * It doesn't work at all the time, more's the pity.
728 static int size_fifo(struct uart_8250_port *up)
730 unsigned char old_fcr, old_mcr, old_lcr;
731 unsigned short old_dl;
734 old_lcr = serial_inp(up, UART_LCR);
735 serial_outp(up, UART_LCR, 0);
736 old_fcr = serial_inp(up, UART_FCR);
737 old_mcr = serial_inp(up, UART_MCR);
738 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
739 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
740 serial_outp(up, UART_MCR, UART_MCR_LOOP);
741 serial_outp(up, UART_LCR, UART_LCR_DLAB);
742 old_dl = serial_dl_read(up);
743 serial_dl_write(up, 0x0001);
744 serial_outp(up, UART_LCR, 0x03);
745 for (count = 0; count < 256; count++)
746 serial_outp(up, UART_TX, count);
747 mdelay(20);/* FIXME - schedule_timeout */
748 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
749 (count < 256); count++)
750 serial_inp(up, UART_RX);
751 serial_outp(up, UART_FCR, old_fcr);
752 serial_outp(up, UART_MCR, old_mcr);
753 serial_outp(up, UART_LCR, UART_LCR_DLAB);
754 serial_dl_write(up, old_dl);
755 serial_outp(up, UART_LCR, old_lcr);
761 * Read UART ID using the divisor method - set DLL and DLM to zero
762 * and the revision will be in DLL and device type in DLM. We
763 * preserve the device state across this.
765 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
767 unsigned char old_dll, old_dlm, old_lcr;
770 old_lcr = serial_inp(p, UART_LCR);
771 serial_outp(p, UART_LCR, UART_LCR_DLAB);
773 old_dll = serial_inp(p, UART_DLL);
774 old_dlm = serial_inp(p, UART_DLM);
776 serial_outp(p, UART_DLL, 0);
777 serial_outp(p, UART_DLM, 0);
779 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
781 serial_outp(p, UART_DLL, old_dll);
782 serial_outp(p, UART_DLM, old_dlm);
783 serial_outp(p, UART_LCR, old_lcr);
789 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
790 * When this function is called we know it is at least a StarTech
791 * 16650 V2, but it might be one of several StarTech UARTs, or one of
792 * its clones. (We treat the broken original StarTech 16650 V1 as a
793 * 16550, and why not? Startech doesn't seem to even acknowledge its
796 * What evil have men's minds wrought...
798 static void autoconfig_has_efr(struct uart_8250_port *up)
800 unsigned int id1, id2, id3, rev;
803 * Everything with an EFR has SLEEP
805 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
808 * First we check to see if it's an Oxford Semiconductor UART.
810 * If we have to do this here because some non-National
811 * Semiconductor clone chips lock up if you try writing to the
812 * LSR register (which serial_icr_read does)
816 * Check for Oxford Semiconductor 16C950.
818 * EFR [4] must be set else this test fails.
820 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
821 * claims that it's needed for 952 dual UART's (which are not
822 * recommended for new designs).
825 serial_out(up, UART_LCR, 0xBF);
826 serial_out(up, UART_EFR, UART_EFR_ECB);
827 serial_out(up, UART_LCR, 0x00);
828 id1 = serial_icr_read(up, UART_ID1);
829 id2 = serial_icr_read(up, UART_ID2);
830 id3 = serial_icr_read(up, UART_ID3);
831 rev = serial_icr_read(up, UART_REV);
833 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
835 if (id1 == 0x16 && id2 == 0xC9 &&
836 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
837 up->port.type = PORT_16C950;
840 * Enable work around for the Oxford Semiconductor 952 rev B
841 * chip which causes it to seriously miscalculate baud rates
844 if (id3 == 0x52 && rev == 0x01)
845 up->bugs |= UART_BUG_QUOT;
850 * We check for a XR16C850 by setting DLL and DLM to 0, and then
851 * reading back DLL and DLM. The chip type depends on the DLM
853 * 0x10 - XR16C850 and the DLL contains the chip revision.
857 id1 = autoconfig_read_divisor_id(up);
858 DEBUG_AUTOCONF("850id=%04x ", id1);
861 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
862 up->port.type = PORT_16850;
867 * It wasn't an XR16C850.
869 * We distinguish between the '654 and the '650 by counting
870 * how many bytes are in the FIFO. I'm using this for now,
871 * since that's the technique that was sent to me in the
872 * serial driver update, but I'm not convinced this works.
873 * I've had problems doing this in the past. -TYT
875 if (size_fifo(up) == 64)
876 up->port.type = PORT_16654;
878 up->port.type = PORT_16650V2;
882 * We detected a chip without a FIFO. Only two fall into
883 * this category - the original 8250 and the 16450. The
884 * 16450 has a scratch register (accessible with LCR=0)
886 static void autoconfig_8250(struct uart_8250_port *up)
888 unsigned char scratch, status1, status2;
890 up->port.type = PORT_8250;
892 scratch = serial_in(up, UART_SCR);
893 serial_outp(up, UART_SCR, 0xa5);
894 status1 = serial_in(up, UART_SCR);
895 serial_outp(up, UART_SCR, 0x5a);
896 status2 = serial_in(up, UART_SCR);
897 serial_outp(up, UART_SCR, scratch);
899 if (status1 == 0xa5 && status2 == 0x5a)
900 up->port.type = PORT_16450;
903 static int broken_efr(struct uart_8250_port *up)
906 * Exar ST16C2550 "A2" devices incorrectly detect as
907 * having an EFR, and report an ID of 0x0201. See
908 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
910 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
917 * We know that the chip has FIFOs. Does it have an EFR? The
918 * EFR is located in the same register position as the IIR and
919 * we know the top two bits of the IIR are currently set. The
920 * EFR should contain zero. Try to read the EFR.
922 static void autoconfig_16550a(struct uart_8250_port *up)
924 unsigned char status1, status2;
925 unsigned int iersave;
927 up->port.type = PORT_16550A;
928 up->capabilities |= UART_CAP_FIFO;
931 * Check for presence of the EFR when DLAB is set.
932 * Only ST16C650V1 UARTs pass this test.
934 serial_outp(up, UART_LCR, UART_LCR_DLAB);
935 if (serial_in(up, UART_EFR) == 0) {
936 serial_outp(up, UART_EFR, 0xA8);
937 if (serial_in(up, UART_EFR) != 0) {
938 DEBUG_AUTOCONF("EFRv1 ");
939 up->port.type = PORT_16650;
940 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
942 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
944 serial_outp(up, UART_EFR, 0);
949 * Maybe it requires 0xbf to be written to the LCR.
950 * (other ST16C650V2 UARTs, TI16C752A, etc)
952 serial_outp(up, UART_LCR, 0xBF);
953 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
954 DEBUG_AUTOCONF("EFRv2 ");
955 autoconfig_has_efr(up);
960 * Check for a National Semiconductor SuperIO chip.
961 * Attempt to switch to bank 2, read the value of the LOOP bit
962 * from EXCR1. Switch back to bank 0, change it in MCR. Then
963 * switch back to bank 2, read it from EXCR1 again and check
964 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
966 serial_outp(up, UART_LCR, 0);
967 status1 = serial_in(up, UART_MCR);
968 serial_outp(up, UART_LCR, 0xE0);
969 status2 = serial_in(up, 0x02); /* EXCR1 */
971 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
972 serial_outp(up, UART_LCR, 0);
973 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
974 serial_outp(up, UART_LCR, 0xE0);
975 status2 = serial_in(up, 0x02); /* EXCR1 */
976 serial_outp(up, UART_LCR, 0);
977 serial_outp(up, UART_MCR, status1);
979 if ((status2 ^ status1) & UART_MCR_LOOP) {
982 serial_outp(up, UART_LCR, 0xE0);
984 quot = serial_dl_read(up);
987 status1 = serial_in(up, 0x04); /* EXCR2 */
988 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
989 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
990 serial_outp(up, 0x04, status1);
992 serial_dl_write(up, quot);
994 serial_outp(up, UART_LCR, 0);
996 up->port.uartclk = 921600*16;
997 up->port.type = PORT_NS16550A;
998 up->capabilities |= UART_NATSEMI;
1004 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1005 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1006 * Try setting it with and without DLAB set. Cheap clones
1007 * set bit 5 without DLAB set.
1009 serial_outp(up, UART_LCR, 0);
1010 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1011 status1 = serial_in(up, UART_IIR) >> 5;
1012 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1013 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1014 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1015 status2 = serial_in(up, UART_IIR) >> 5;
1016 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1017 serial_outp(up, UART_LCR, 0);
1019 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1021 if (status1 == 6 && status2 == 7) {
1022 up->port.type = PORT_16750;
1023 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1028 * Try writing and reading the UART_IER_UUE bit (b6).
1029 * If it works, this is probably one of the Xscale platform's
1031 * We're going to explicitly set the UUE bit to 0 before
1032 * trying to write and read a 1 just to make sure it's not
1033 * already a 1 and maybe locked there before we even start start.
1035 iersave = serial_in(up, UART_IER);
1036 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
1037 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1039 * OK it's in a known zero state, try writing and reading
1040 * without disturbing the current state of the other bits.
1042 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
1043 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1046 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1048 DEBUG_AUTOCONF("Xscale ");
1049 up->port.type = PORT_XSCALE;
1050 up->capabilities |= UART_CAP_UUE;
1055 * If we got here we couldn't force the IER_UUE bit to 0.
1056 * Log it and continue.
1058 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1060 serial_outp(up, UART_IER, iersave);
1064 * This routine is called by rs_init() to initialize a specific serial
1065 * port. It determines what type of UART chip this serial port is
1066 * using: 8250, 16450, 16550, 16550A. The important question is
1067 * whether or not this UART is a 16550A or not, since this will
1068 * determine whether or not we can use its FIFO features or not.
1070 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1072 unsigned char status1, scratch, scratch2, scratch3;
1073 unsigned char save_lcr, save_mcr;
1074 unsigned long flags;
1076 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
1079 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
1080 serial_index(&up->port), up->port.iobase, up->port.membase);
1083 * We really do need global IRQs disabled here - we're going to
1084 * be frobbing the chips IRQ enable register to see if it exists.
1086 spin_lock_irqsave(&up->port.lock, flags);
1088 up->capabilities = 0;
1091 if (!(up->port.flags & UPF_BUGGY_UART)) {
1093 * Do a simple existence test first; if we fail this,
1094 * there's no point trying anything else.
1096 * 0x80 is used as a nonsense port to prevent against
1097 * false positives due to ISA bus float. The
1098 * assumption is that 0x80 is a non-existent port;
1099 * which should be safe since include/asm/io.h also
1100 * makes this assumption.
1102 * Note: this is safe as long as MCR bit 4 is clear
1103 * and the device is in "PC" mode.
1105 scratch = serial_inp(up, UART_IER);
1106 serial_outp(up, UART_IER, 0);
1111 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1112 * 16C754B) allow only to modify them if an EFR bit is set.
1114 scratch2 = serial_inp(up, UART_IER) & 0x0f;
1115 serial_outp(up, UART_IER, 0x0F);
1119 scratch3 = serial_inp(up, UART_IER) & 0x0f;
1120 serial_outp(up, UART_IER, scratch);
1121 if (scratch2 != 0 || scratch3 != 0x0F) {
1123 * We failed; there's nothing here
1125 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1126 scratch2, scratch3);
1131 save_mcr = serial_in(up, UART_MCR);
1132 save_lcr = serial_in(up, UART_LCR);
1135 * Check to see if a UART is really there. Certain broken
1136 * internal modems based on the Rockwell chipset fail this
1137 * test, because they apparently don't implement the loopback
1138 * test mode. So this test is skipped on the COM 1 through
1139 * COM 4 ports. This *should* be safe, since no board
1140 * manufacturer would be stupid enough to design a board
1141 * that conflicts with COM 1-4 --- we hope!
1143 if (!(up->port.flags & UPF_SKIP_TEST)) {
1144 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1145 status1 = serial_inp(up, UART_MSR) & 0xF0;
1146 serial_outp(up, UART_MCR, save_mcr);
1147 if (status1 != 0x90) {
1148 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1155 * We're pretty sure there's a port here. Lets find out what
1156 * type of port it is. The IIR top two bits allows us to find
1157 * out if it's 8250 or 16450, 16550, 16550A or later. This
1158 * determines what we test for next.
1160 * We also initialise the EFR (if any) to zero for later. The
1161 * EFR occupies the same register location as the FCR and IIR.
1163 serial_outp(up, UART_LCR, 0xBF);
1164 serial_outp(up, UART_EFR, 0);
1165 serial_outp(up, UART_LCR, 0);
1167 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1168 scratch = serial_in(up, UART_IIR) >> 6;
1170 DEBUG_AUTOCONF("iir=%d ", scratch);
1174 autoconfig_8250(up);
1177 up->port.type = PORT_UNKNOWN;
1180 up->port.type = PORT_16550;
1183 autoconfig_16550a(up);
1187 #ifdef CONFIG_SERIAL_8250_RSA
1189 * Only probe for RSA ports if we got the region.
1191 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
1194 for (i = 0 ; i < probe_rsa_count; ++i) {
1195 if (probe_rsa[i] == up->port.iobase &&
1197 up->port.type = PORT_RSA;
1204 #ifdef CONFIG_SERIAL_8250_AU1X00
1205 /* if access method is AU, it is a 16550 with a quirk */
1206 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
1207 up->bugs |= UART_BUG_NOMSR;
1210 serial_outp(up, UART_LCR, save_lcr);
1212 if (up->capabilities != uart_config[up->port.type].flags) {
1214 "ttyS%d: detected caps %08x should be %08x\n",
1215 serial_index(&up->port), up->capabilities,
1216 uart_config[up->port.type].flags);
1219 up->port.fifosize = uart_config[up->port.type].fifo_size;
1220 up->capabilities = uart_config[up->port.type].flags;
1221 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
1223 if (up->port.type == PORT_UNKNOWN)
1229 #ifdef CONFIG_SERIAL_8250_RSA
1230 if (up->port.type == PORT_RSA)
1231 serial_outp(up, UART_RSA_FRR, 0);
1233 serial_outp(up, UART_MCR, save_mcr);
1234 serial8250_clear_fifos(up);
1235 serial_in(up, UART_RX);
1236 if (up->capabilities & UART_CAP_UUE)
1237 serial_outp(up, UART_IER, UART_IER_UUE);
1239 serial_outp(up, UART_IER, 0);
1242 spin_unlock_irqrestore(&up->port.lock, flags);
1243 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
1246 static void autoconfig_irq(struct uart_8250_port *up)
1248 unsigned char save_mcr, save_ier;
1249 unsigned char save_ICP = 0;
1250 unsigned int ICP = 0;
1254 if (up->port.flags & UPF_FOURPORT) {
1255 ICP = (up->port.iobase & 0xfe0) | 0x1f;
1256 save_ICP = inb_p(ICP);
1261 /* forget possible initially masked and pending IRQ */
1262 probe_irq_off(probe_irq_on());
1263 save_mcr = serial_inp(up, UART_MCR);
1264 save_ier = serial_inp(up, UART_IER);
1265 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1267 irqs = probe_irq_on();
1268 serial_outp(up, UART_MCR, 0);
1270 if (up->port.flags & UPF_FOURPORT) {
1271 serial_outp(up, UART_MCR,
1272 UART_MCR_DTR | UART_MCR_RTS);
1274 serial_outp(up, UART_MCR,
1275 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1277 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
1278 (void)serial_inp(up, UART_LSR);
1279 (void)serial_inp(up, UART_RX);
1280 (void)serial_inp(up, UART_IIR);
1281 (void)serial_inp(up, UART_MSR);
1282 serial_outp(up, UART_TX, 0xFF);
1284 irq = probe_irq_off(irqs);
1286 serial_outp(up, UART_MCR, save_mcr);
1287 serial_outp(up, UART_IER, save_ier);
1289 if (up->port.flags & UPF_FOURPORT)
1290 outb_p(save_ICP, ICP);
1292 up->port.irq = (irq > 0) ? irq : 0;
1295 static inline void __stop_tx(struct uart_8250_port *p)
1297 if (p->ier & UART_IER_THRI) {
1298 p->ier &= ~UART_IER_THRI;
1299 serial_out(p, UART_IER, p->ier);
1303 static void serial8250_stop_tx(struct uart_port *port)
1305 struct uart_8250_port *up = (struct uart_8250_port *)port;
1310 * We really want to stop the transmitter from sending.
1312 if (up->port.type == PORT_16C950) {
1313 up->acr |= UART_ACR_TXDIS;
1314 serial_icr_write(up, UART_ACR, up->acr);
1318 static void transmit_chars(struct uart_8250_port *up);
1320 static void serial8250_start_tx(struct uart_port *port)
1322 struct uart_8250_port *up = (struct uart_8250_port *)port;
1324 if (!(up->ier & UART_IER_THRI)) {
1325 up->ier |= UART_IER_THRI;
1326 serial_out(up, UART_IER, up->ier);
1328 if (up->bugs & UART_BUG_TXEN) {
1329 unsigned char lsr, iir;
1330 lsr = serial_in(up, UART_LSR);
1331 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1332 iir = serial_in(up, UART_IIR) & 0x0f;
1333 if ((up->port.type == PORT_RM9000) ?
1334 (lsr & UART_LSR_THRE &&
1335 (iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :
1336 (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))
1342 * Re-enable the transmitter if we disabled it.
1344 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1345 up->acr &= ~UART_ACR_TXDIS;
1346 serial_icr_write(up, UART_ACR, up->acr);
1350 static void serial8250_stop_rx(struct uart_port *port)
1352 struct uart_8250_port *up = (struct uart_8250_port *)port;
1354 up->ier &= ~UART_IER_RLSI;
1355 up->port.read_status_mask &= ~UART_LSR_DR;
1356 serial_out(up, UART_IER, up->ier);
1359 static void serial8250_enable_ms(struct uart_port *port)
1361 struct uart_8250_port *up = (struct uart_8250_port *)port;
1363 /* no MSR capabilities */
1364 if (up->bugs & UART_BUG_NOMSR)
1367 up->ier |= UART_IER_MSI;
1368 serial_out(up, UART_IER, up->ier);
1372 receive_chars(struct uart_8250_port *up, unsigned int *status)
1374 struct tty_struct *tty = up->port.info->port.tty;
1375 unsigned char ch, lsr = *status;
1376 int max_count = 256;
1380 if (likely(lsr & UART_LSR_DR))
1381 ch = serial_inp(up, UART_RX);
1384 * Intel 82571 has a Serial Over Lan device that will
1385 * set UART_LSR_BI without setting UART_LSR_DR when
1386 * it receives a break. To avoid reading from the
1387 * receive buffer without UART_LSR_DR bit set, we
1388 * just force the read character to be 0
1393 up->port.icount.rx++;
1395 lsr |= up->lsr_saved_flags;
1396 up->lsr_saved_flags = 0;
1398 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1400 * For statistics only
1402 if (lsr & UART_LSR_BI) {
1403 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1404 up->port.icount.brk++;
1406 * We do the SysRQ and SAK checking
1407 * here because otherwise the break
1408 * may get masked by ignore_status_mask
1409 * or read_status_mask.
1411 if (uart_handle_break(&up->port))
1413 } else if (lsr & UART_LSR_PE)
1414 up->port.icount.parity++;
1415 else if (lsr & UART_LSR_FE)
1416 up->port.icount.frame++;
1417 if (lsr & UART_LSR_OE)
1418 up->port.icount.overrun++;
1421 * Mask off conditions which should be ignored.
1423 lsr &= up->port.read_status_mask;
1425 if (lsr & UART_LSR_BI) {
1426 DEBUG_INTR("handling break....");
1428 } else if (lsr & UART_LSR_PE)
1430 else if (lsr & UART_LSR_FE)
1433 if (uart_handle_sysrq_char(&up->port, ch))
1436 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1439 lsr = serial_inp(up, UART_LSR);
1440 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1441 spin_unlock(&up->port.lock);
1442 tty_flip_buffer_push(tty);
1443 spin_lock(&up->port.lock);
1447 static void transmit_chars(struct uart_8250_port *up)
1449 struct circ_buf *xmit = &up->port.info->xmit;
1452 if (up->port.x_char) {
1453 serial_outp(up, UART_TX, up->port.x_char);
1454 up->port.icount.tx++;
1455 up->port.x_char = 0;
1458 if (uart_tx_stopped(&up->port)) {
1459 serial8250_stop_tx(&up->port);
1462 if (uart_circ_empty(xmit)) {
1467 count = up->tx_loadsz;
1469 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1470 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1471 up->port.icount.tx++;
1472 if (uart_circ_empty(xmit))
1474 } while (--count > 0);
1476 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1477 uart_write_wakeup(&up->port);
1479 DEBUG_INTR("THRE...");
1481 if (uart_circ_empty(xmit))
1485 static unsigned int check_modem_status(struct uart_8250_port *up)
1487 unsigned int status = serial_in(up, UART_MSR);
1489 status |= up->msr_saved_flags;
1490 up->msr_saved_flags = 0;
1491 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1492 up->port.info != NULL) {
1493 if (status & UART_MSR_TERI)
1494 up->port.icount.rng++;
1495 if (status & UART_MSR_DDSR)
1496 up->port.icount.dsr++;
1497 if (status & UART_MSR_DDCD)
1498 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1499 if (status & UART_MSR_DCTS)
1500 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1502 wake_up_interruptible(&up->port.info->delta_msr_wait);
1509 * This handles the interrupt from one port.
1511 static void serial8250_handle_port(struct uart_8250_port *up)
1513 unsigned int status;
1514 unsigned long flags;
1516 spin_lock_irqsave(&up->port.lock, flags);
1518 status = serial_inp(up, UART_LSR);
1520 DEBUG_INTR("status = %x...", status);
1522 if (status & (UART_LSR_DR | UART_LSR_BI))
1523 receive_chars(up, &status);
1524 check_modem_status(up);
1525 if (status & UART_LSR_THRE)
1528 spin_unlock_irqrestore(&up->port.lock, flags);
1532 * This is the serial driver's interrupt routine.
1534 * Arjan thinks the old way was overly complex, so it got simplified.
1535 * Alan disagrees, saying that need the complexity to handle the weird
1536 * nature of ISA shared interrupts. (This is a special exception.)
1538 * In order to handle ISA shared interrupts properly, we need to check
1539 * that all ports have been serviced, and therefore the ISA interrupt
1540 * line has been de-asserted.
1542 * This means we need to loop through all ports. checking that they
1543 * don't have an interrupt pending.
1545 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1547 struct irq_info *i = dev_id;
1548 struct list_head *l, *end = NULL;
1549 int pass_counter = 0, handled = 0;
1551 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1553 spin_lock(&i->lock);
1557 struct uart_8250_port *up;
1560 up = list_entry(l, struct uart_8250_port, list);
1562 iir = serial_in(up, UART_IIR);
1563 if (!(iir & UART_IIR_NO_INT)) {
1564 serial8250_handle_port(up);
1569 } else if (up->port.iotype == UPIO_DWAPB &&
1570 (iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
1571 /* The DesignWare APB UART has an Busy Detect (0x07)
1572 * interrupt meaning an LCR write attempt occured while the
1573 * UART was busy. The interrupt must be cleared by reading
1574 * the UART status register (USR) and the LCR re-written. */
1575 unsigned int status;
1576 status = *(volatile u32 *)up->port.private_data;
1577 serial_out(up, UART_LCR, up->lcr);
1582 } else if (end == NULL)
1587 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1588 /* If we hit this, we're dead. */
1589 printk(KERN_ERR "serial8250: too much work for "
1595 spin_unlock(&i->lock);
1597 DEBUG_INTR("end.\n");
1599 #ifdef CONFIG_ARCH_OMAP15XX
1600 return IRQ_HANDLED; /* FIXME: iir status not ready on 1510 */
1602 return IRQ_RETVAL(handled);
1607 * To support ISA shared interrupts, we need to have one interrupt
1608 * handler that ensures that the IRQ line has been deasserted
1609 * before returning. Failing to do this will result in the IRQ
1610 * line being stuck active, and, since ISA irqs are edge triggered,
1611 * no more IRQs will be seen.
1613 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1615 spin_lock_irq(&i->lock);
1617 if (!list_empty(i->head)) {
1618 if (i->head == &up->list)
1619 i->head = i->head->next;
1620 list_del(&up->list);
1622 BUG_ON(i->head != &up->list);
1625 spin_unlock_irq(&i->lock);
1626 /* List empty so throw away the hash node */
1627 if (i->head == NULL) {
1628 hlist_del(&i->node);
1633 static int serial_link_irq_chain(struct uart_8250_port *up)
1635 struct hlist_head *h;
1636 struct hlist_node *n;
1638 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1640 mutex_lock(&hash_mutex);
1642 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1644 hlist_for_each(n, h) {
1645 i = hlist_entry(n, struct irq_info, node);
1646 if (i->irq == up->port.irq)
1651 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1653 mutex_unlock(&hash_mutex);
1656 spin_lock_init(&i->lock);
1657 i->irq = up->port.irq;
1658 hlist_add_head(&i->node, h);
1660 mutex_unlock(&hash_mutex);
1662 spin_lock_irq(&i->lock);
1665 list_add(&up->list, i->head);
1666 spin_unlock_irq(&i->lock);
1670 INIT_LIST_HEAD(&up->list);
1671 i->head = &up->list;
1672 spin_unlock_irq(&i->lock);
1674 ret = request_irq(up->port.irq, serial8250_interrupt,
1675 irq_flags, "serial", i);
1677 serial_do_unlink(i, up);
1683 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1686 struct hlist_node *n;
1687 struct hlist_head *h;
1689 mutex_lock(&hash_mutex);
1691 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1693 hlist_for_each(n, h) {
1694 i = hlist_entry(n, struct irq_info, node);
1695 if (i->irq == up->port.irq)
1700 BUG_ON(i->head == NULL);
1702 if (list_empty(i->head))
1703 free_irq(up->port.irq, i);
1705 serial_do_unlink(i, up);
1706 mutex_unlock(&hash_mutex);
1709 /* Base timer interval for polling */
1710 static inline int poll_timeout(int timeout)
1712 return timeout > 6 ? (timeout / 2 - 2) : 1;
1716 * This function is used to handle ports that do not have an
1717 * interrupt. This doesn't work very well for 16450's, but gives
1718 * barely passable results for a 16550A. (Although at the expense
1719 * of much CPU overhead).
1721 static void serial8250_timeout(unsigned long data)
1723 struct uart_8250_port *up = (struct uart_8250_port *)data;
1726 iir = serial_in(up, UART_IIR);
1727 if (!(iir & UART_IIR_NO_INT))
1728 serial8250_handle_port(up);
1729 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
1732 static void serial8250_backup_timeout(unsigned long data)
1734 struct uart_8250_port *up = (struct uart_8250_port *)data;
1735 unsigned int iir, ier = 0, lsr;
1736 unsigned long flags;
1739 * Must disable interrupts or else we risk racing with the interrupt
1742 if (is_real_interrupt(up->port.irq)) {
1743 ier = serial_in(up, UART_IER);
1744 serial_out(up, UART_IER, 0);
1747 iir = serial_in(up, UART_IIR);
1750 * This should be a safe test for anyone who doesn't trust the
1751 * IIR bits on their UART, but it's specifically designed for
1752 * the "Diva" UART used on the management processor on many HP
1753 * ia64 and parisc boxes.
1755 spin_lock_irqsave(&up->port.lock, flags);
1756 lsr = serial_in(up, UART_LSR);
1757 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1758 spin_unlock_irqrestore(&up->port.lock, flags);
1759 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1760 (!uart_circ_empty(&up->port.info->xmit) || up->port.x_char) &&
1761 (lsr & UART_LSR_THRE)) {
1762 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1763 iir |= UART_IIR_THRI;
1766 if (!(iir & UART_IIR_NO_INT))
1767 serial8250_handle_port(up);
1769 if (is_real_interrupt(up->port.irq))
1770 serial_out(up, UART_IER, ier);
1772 /* Standard timer interval plus 0.2s to keep the port running */
1773 mod_timer(&up->timer,
1774 jiffies + poll_timeout(up->port.timeout) + HZ / 5);
1777 static unsigned int serial8250_tx_empty(struct uart_port *port)
1779 struct uart_8250_port *up = (struct uart_8250_port *)port;
1780 unsigned long flags;
1783 spin_lock_irqsave(&up->port.lock, flags);
1784 lsr = serial_in(up, UART_LSR);
1785 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1786 spin_unlock_irqrestore(&up->port.lock, flags);
1788 return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1791 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1793 struct uart_8250_port *up = (struct uart_8250_port *)port;
1794 unsigned int status;
1797 status = check_modem_status(up);
1800 if (status & UART_MSR_DCD)
1802 if (status & UART_MSR_RI)
1804 if (status & UART_MSR_DSR)
1806 if (status & UART_MSR_CTS)
1811 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1813 struct uart_8250_port *up = (struct uart_8250_port *)port;
1814 unsigned char mcr = 0;
1816 if (mctrl & TIOCM_RTS)
1817 mcr |= UART_MCR_RTS;
1818 if (mctrl & TIOCM_DTR)
1819 mcr |= UART_MCR_DTR;
1820 if (mctrl & TIOCM_OUT1)
1821 mcr |= UART_MCR_OUT1;
1822 if (mctrl & TIOCM_OUT2)
1823 mcr |= UART_MCR_OUT2;
1824 if (mctrl & TIOCM_LOOP)
1825 mcr |= UART_MCR_LOOP;
1827 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1829 serial_out(up, UART_MCR, mcr);
1832 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1834 struct uart_8250_port *up = (struct uart_8250_port *)port;
1835 unsigned long flags;
1837 spin_lock_irqsave(&up->port.lock, flags);
1838 if (break_state == -1)
1839 up->lcr |= UART_LCR_SBC;
1841 up->lcr &= ~UART_LCR_SBC;
1842 serial_out(up, UART_LCR, up->lcr);
1843 spin_unlock_irqrestore(&up->port.lock, flags);
1846 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1849 * Wait for transmitter & holding register to empty
1851 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1853 unsigned int status, tmout = 10000;
1855 /* Wait up to 10ms for the character(s) to be sent. */
1857 status = serial_in(up, UART_LSR);
1859 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1864 } while ((status & bits) != bits);
1866 /* Wait up to 1s for flow control if necessary */
1867 if (up->port.flags & UPF_CONS_FLOW) {
1869 for (tmout = 1000000; tmout; tmout--) {
1870 unsigned int msr = serial_in(up, UART_MSR);
1871 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1872 if (msr & UART_MSR_CTS)
1875 touch_nmi_watchdog();
1880 #ifdef CONFIG_CONSOLE_POLL
1882 * Console polling routines for writing and reading from the uart while
1883 * in an interrupt or debug context.
1886 static int serial8250_get_poll_char(struct uart_port *port)
1888 struct uart_8250_port *up = (struct uart_8250_port *)port;
1889 unsigned char lsr = serial_inp(up, UART_LSR);
1891 while (!(lsr & UART_LSR_DR))
1892 lsr = serial_inp(up, UART_LSR);
1894 return serial_inp(up, UART_RX);
1898 static void serial8250_put_poll_char(struct uart_port *port,
1902 struct uart_8250_port *up = (struct uart_8250_port *)port;
1905 * First save the IER then disable the interrupts
1907 ier = serial_in(up, UART_IER);
1908 if (up->capabilities & UART_CAP_UUE)
1909 serial_out(up, UART_IER, UART_IER_UUE);
1911 serial_out(up, UART_IER, 0);
1913 wait_for_xmitr(up, BOTH_EMPTY);
1915 * Send the character out.
1916 * If a LF, also do CR...
1918 serial_out(up, UART_TX, c);
1920 wait_for_xmitr(up, BOTH_EMPTY);
1921 serial_out(up, UART_TX, 13);
1925 * Finally, wait for transmitter to become empty
1926 * and restore the IER
1928 wait_for_xmitr(up, BOTH_EMPTY);
1929 serial_out(up, UART_IER, ier);
1932 #endif /* CONFIG_CONSOLE_POLL */
1934 static int serial8250_startup(struct uart_port *port)
1936 struct uart_8250_port *up = (struct uart_8250_port *)port;
1937 unsigned long flags;
1938 unsigned char lsr, iir;
1941 up->capabilities = uart_config[up->port.type].flags;
1944 if (up->port.type == PORT_16C950) {
1945 /* Wake up and initialize UART */
1947 serial_outp(up, UART_LCR, 0xBF);
1948 serial_outp(up, UART_EFR, UART_EFR_ECB);
1949 serial_outp(up, UART_IER, 0);
1950 serial_outp(up, UART_LCR, 0);
1951 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1952 serial_outp(up, UART_LCR, 0xBF);
1953 serial_outp(up, UART_EFR, UART_EFR_ECB);
1954 serial_outp(up, UART_LCR, 0);
1957 #ifdef CONFIG_SERIAL_8250_RSA
1959 * If this is an RSA port, see if we can kick it up to the
1960 * higher speed clock.
1966 * Clear the FIFO buffers and disable them.
1967 * (they will be reenabled in set_termios())
1969 serial8250_clear_fifos(up);
1972 * Clear the interrupt registers.
1974 (void) serial_inp(up, UART_LSR);
1975 (void) serial_inp(up, UART_RX);
1976 (void) serial_inp(up, UART_IIR);
1977 (void) serial_inp(up, UART_MSR);
1980 * At this point, there's no way the LSR could still be 0xff;
1981 * if it is, then bail out, because there's likely no UART
1984 if (!(up->port.flags & UPF_BUGGY_UART) &&
1985 (serial_inp(up, UART_LSR) == 0xff)) {
1986 printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
1987 serial_index(&up->port));
1992 * For a XR16C850, we need to set the trigger levels
1994 if (up->port.type == PORT_16850) {
1997 serial_outp(up, UART_LCR, 0xbf);
1999 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2000 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2001 serial_outp(up, UART_TRG, UART_TRG_96);
2002 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2003 serial_outp(up, UART_TRG, UART_TRG_96);
2005 serial_outp(up, UART_LCR, 0);
2008 if (is_real_interrupt(up->port.irq)) {
2011 * Test for UARTs that do not reassert THRE when the
2012 * transmitter is idle and the interrupt has already
2013 * been cleared. Real 16550s should always reassert
2014 * this interrupt whenever the transmitter is idle and
2015 * the interrupt is enabled. Delays are necessary to
2016 * allow register changes to become visible.
2018 spin_lock_irqsave(&up->port.lock, flags);
2019 if (up->port.flags & UPF_SHARE_IRQ)
2020 disable_irq_nosync(up->port.irq);
2022 wait_for_xmitr(up, UART_LSR_THRE);
2023 serial_out_sync(up, UART_IER, UART_IER_THRI);
2024 udelay(1); /* allow THRE to set */
2025 iir1 = serial_in(up, UART_IIR);
2026 serial_out(up, UART_IER, 0);
2027 serial_out_sync(up, UART_IER, UART_IER_THRI);
2028 udelay(1); /* allow a working UART time to re-assert THRE */
2029 iir = serial_in(up, UART_IIR);
2030 serial_out(up, UART_IER, 0);
2032 if (up->port.flags & UPF_SHARE_IRQ)
2033 enable_irq(up->port.irq);
2034 spin_unlock_irqrestore(&up->port.lock, flags);
2037 * If the interrupt is not reasserted, setup a timer to
2038 * kick the UART on a regular basis.
2040 if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
2041 up->bugs |= UART_BUG_THRE;
2042 pr_debug("ttyS%d - using backup timer\n",
2043 serial_index(port));
2048 * The above check will only give an accurate result the first time
2049 * the port is opened so this value needs to be preserved.
2051 if (up->bugs & UART_BUG_THRE) {
2052 up->timer.function = serial8250_backup_timeout;
2053 up->timer.data = (unsigned long)up;
2054 mod_timer(&up->timer, jiffies +
2055 poll_timeout(up->port.timeout) + HZ / 5);
2059 * If the "interrupt" for this port doesn't correspond with any
2060 * hardware interrupt, we use a timer-based system. The original
2061 * driver used to do this with IRQ0.
2063 if (!is_real_interrupt(up->port.irq)) {
2064 up->timer.data = (unsigned long)up;
2065 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
2067 retval = serial_link_irq_chain(up);
2073 * Now, initialize the UART
2075 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
2077 spin_lock_irqsave(&up->port.lock, flags);
2078 if (up->port.flags & UPF_FOURPORT) {
2079 if (!is_real_interrupt(up->port.irq))
2080 up->port.mctrl |= TIOCM_OUT1;
2083 * Most PC uarts need OUT2 raised to enable interrupts.
2085 if (is_real_interrupt(up->port.irq))
2086 up->port.mctrl |= TIOCM_OUT2;
2088 serial8250_set_mctrl(&up->port, up->port.mctrl);
2090 /* Serial over Lan (SoL) hack:
2091 Intel 8257x Gigabit ethernet chips have a
2092 16550 emulation, to be used for Serial Over Lan.
2093 Those chips take a longer time than a normal
2094 serial device to signalize that a transmission
2095 data was queued. Due to that, the above test generally
2096 fails. One solution would be to delay the reading of
2097 iir. However, this is not reliable, since the timeout
2098 is variable. So, let's just don't test if we receive
2099 TX irq. This way, we'll never enable UART_BUG_TXEN.
2101 if (up->port.flags & UPF_NO_TXEN_TEST)
2102 goto dont_test_tx_en;
2105 * Do a quick test to see if we receive an
2106 * interrupt when we enable the TX irq.
2108 serial_outp(up, UART_IER, UART_IER_THRI);
2109 lsr = serial_in(up, UART_LSR);
2110 iir = serial_in(up, UART_IIR);
2111 serial_outp(up, UART_IER, 0);
2113 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2114 if (!(up->bugs & UART_BUG_TXEN)) {
2115 up->bugs |= UART_BUG_TXEN;
2116 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2117 serial_index(port));
2120 up->bugs &= ~UART_BUG_TXEN;
2124 spin_unlock_irqrestore(&up->port.lock, flags);
2127 * Clear the interrupt registers again for luck, and clear the
2128 * saved flags to avoid getting false values from polling
2129 * routines or the previous session.
2131 serial_inp(up, UART_LSR);
2132 serial_inp(up, UART_RX);
2133 serial_inp(up, UART_IIR);
2134 serial_inp(up, UART_MSR);
2135 up->lsr_saved_flags = 0;
2136 up->msr_saved_flags = 0;
2139 * Finally, enable interrupts. Note: Modem status interrupts
2140 * are set via set_termios(), which will be occurring imminently
2141 * anyway, so we don't enable them here.
2143 up->ier = UART_IER_RLSI | UART_IER_RDI;
2144 serial_outp(up, UART_IER, up->ier);
2146 if (up->port.flags & UPF_FOURPORT) {
2149 * Enable interrupts on the AST Fourport board
2151 icp = (up->port.iobase & 0xfe0) | 0x01f;
2159 static void serial8250_shutdown(struct uart_port *port)
2161 struct uart_8250_port *up = (struct uart_8250_port *)port;
2162 unsigned long flags;
2165 * Disable interrupts from this port
2168 serial_outp(up, UART_IER, 0);
2170 spin_lock_irqsave(&up->port.lock, flags);
2171 if (up->port.flags & UPF_FOURPORT) {
2172 /* reset interrupts on the AST Fourport board */
2173 inb((up->port.iobase & 0xfe0) | 0x1f);
2174 up->port.mctrl |= TIOCM_OUT1;
2176 up->port.mctrl &= ~TIOCM_OUT2;
2178 serial8250_set_mctrl(&up->port, up->port.mctrl);
2179 spin_unlock_irqrestore(&up->port.lock, flags);
2182 * Disable break condition and FIFOs
2184 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
2185 serial8250_clear_fifos(up);
2187 #ifdef CONFIG_SERIAL_8250_RSA
2189 * Reset the RSA board back to 115kbps compat mode.
2195 * Read data port to reset things, and then unlink from
2198 (void) serial_in(up, UART_RX);
2200 del_timer_sync(&up->timer);
2201 up->timer.function = serial8250_timeout;
2202 if (is_real_interrupt(up->port.irq))
2203 serial_unlink_irq_chain(up);
2206 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2211 * Handle magic divisors for baud rates above baud_base on
2212 * SMSC SuperIO chips.
2214 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2215 baud == (port->uartclk/4))
2217 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2218 baud == (port->uartclk/8))
2221 quot = uart_get_divisor(port, baud);
2227 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2228 struct ktermios *old)
2230 struct uart_8250_port *up = (struct uart_8250_port *)port;
2231 unsigned char cval, fcr = 0;
2232 unsigned long flags;
2233 unsigned int baud, quot;
2235 switch (termios->c_cflag & CSIZE) {
2237 cval = UART_LCR_WLEN5;
2240 cval = UART_LCR_WLEN6;
2243 cval = UART_LCR_WLEN7;
2247 cval = UART_LCR_WLEN8;
2251 if (termios->c_cflag & CSTOPB)
2252 cval |= UART_LCR_STOP;
2253 if (termios->c_cflag & PARENB)
2254 cval |= UART_LCR_PARITY;
2255 if (!(termios->c_cflag & PARODD))
2256 cval |= UART_LCR_EPAR;
2258 if (termios->c_cflag & CMSPAR)
2259 cval |= UART_LCR_SPAR;
2263 * Ask the core to calculate the divisor for us.
2265 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
2266 quot = serial8250_get_divisor(port, baud);
2269 * Oxford Semi 952 rev B workaround
2271 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2274 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
2276 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
2278 fcr = uart_config[up->port.type].fcr;
2282 * MCR-based auto flow control. When AFE is enabled, RTS will be
2283 * deasserted when the receive FIFO contains more characters than
2284 * the trigger, or the MCR RTS bit is cleared. In the case where
2285 * the remote UART is not using CTS auto flow control, we must
2286 * have sufficient FIFO entries for the latency of the remote
2287 * UART to respond. IOW, at least 32 bytes of FIFO.
2289 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
2290 up->mcr &= ~UART_MCR_AFE;
2291 if (termios->c_cflag & CRTSCTS)
2292 up->mcr |= UART_MCR_AFE;
2296 * Ok, we're now changing the port state. Do it with
2297 * interrupts disabled.
2299 spin_lock_irqsave(&up->port.lock, flags);
2302 * Update the per-port timeout.
2304 uart_update_timeout(port, termios->c_cflag, baud);
2306 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2307 if (termios->c_iflag & INPCK)
2308 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2309 if (termios->c_iflag & (BRKINT | PARMRK))
2310 up->port.read_status_mask |= UART_LSR_BI;
2313 * Characteres to ignore
2315 up->port.ignore_status_mask = 0;
2316 if (termios->c_iflag & IGNPAR)
2317 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2318 if (termios->c_iflag & IGNBRK) {
2319 up->port.ignore_status_mask |= UART_LSR_BI;
2321 * If we're ignoring parity and break indicators,
2322 * ignore overruns too (for real raw support).
2324 if (termios->c_iflag & IGNPAR)
2325 up->port.ignore_status_mask |= UART_LSR_OE;
2329 * ignore all characters if CREAD is not set
2331 if ((termios->c_cflag & CREAD) == 0)
2332 up->port.ignore_status_mask |= UART_LSR_DR;
2335 * CTS flow control flag and modem status interrupts
2337 up->ier &= ~UART_IER_MSI;
2338 if (!(up->bugs & UART_BUG_NOMSR) &&
2339 UART_ENABLE_MS(&up->port, termios->c_cflag))
2340 up->ier |= UART_IER_MSI;
2341 if (up->capabilities & UART_CAP_UUE)
2342 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
2344 serial_out(up, UART_IER, up->ier);
2346 if (up->capabilities & UART_CAP_EFR) {
2347 unsigned char efr = 0;
2349 * TI16C752/Startech hardware flow control. FIXME:
2350 * - TI16C752 requires control thresholds to be set.
2351 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2353 if (termios->c_cflag & CRTSCTS)
2354 efr |= UART_EFR_CTS;
2356 serial_outp(up, UART_LCR, 0xBF);
2357 serial_outp(up, UART_EFR, efr);
2360 #ifdef CONFIG_ARCH_OMAP
2361 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2362 if (cpu_is_omap1510() && is_omap_port(up)) {
2363 if (baud == 115200) {
2365 serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
2367 serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
2371 if (up->capabilities & UART_NATSEMI) {
2372 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2373 serial_outp(up, UART_LCR, 0xe0);
2375 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
2378 serial_dl_write(up, quot);
2381 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2382 * is written without DLAB set, this mode will be disabled.
2384 if (up->port.type == PORT_16750)
2385 serial_outp(up, UART_FCR, fcr);
2387 serial_outp(up, UART_LCR, cval); /* reset DLAB */
2388 up->lcr = cval; /* Save LCR */
2389 if (up->port.type != PORT_16750) {
2390 if (fcr & UART_FCR_ENABLE_FIFO) {
2391 /* emulated UARTs (Lucent Venus 167x) need two steps */
2392 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
2395 /* Note that we need to set ECB to access write water mark
2396 * bits. First allow FCR tx fifo write, then set fcr with
2397 * possible TX fifo settings. */
2398 if (uart_config[up->port.type].flags & UART_CAP_EFR) {
2399 serial_outp(up, UART_LCR, 0xbf); /* Access EFR */
2400 serial_outp(up, UART_EFR, UART_EFR_ECB);
2401 serial_outp(up, UART_LCR, 0x0); /* Access FCR */
2402 serial_outp(up, UART_FCR, fcr);
2403 serial_outp(up, UART_LCR, 0xbf); /* Access EFR */
2404 serial_outp(up, UART_EFR, 0);
2405 serial_outp(up, UART_LCR, cval); /* Access FCR */
2407 serial_outp(up, UART_FCR, fcr); /* set fcr */
2409 serial8250_set_mctrl(&up->port, up->port.mctrl);
2410 spin_unlock_irqrestore(&up->port.lock, flags);
2411 /* Don't rewrite B0 */
2412 if (tty_termios_baud_rate(termios))
2413 tty_termios_encode_baud_rate(termios, baud, baud);
2417 serial8250_pm(struct uart_port *port, unsigned int state,
2418 unsigned int oldstate)
2420 struct uart_8250_port *p = (struct uart_8250_port *)port;
2422 serial8250_set_sleep(p, state != 0);
2425 p->pm(port, state, oldstate);
2428 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2430 if (pt->port.iotype == UPIO_AU)
2432 #ifdef CONFIG_ARCH_OMAP
2433 if (is_omap_port(pt))
2434 return 0x16 << pt->port.regshift;
2436 return 8 << pt->port.regshift;
2440 * Resource handling.
2442 static int serial8250_request_std_resource(struct uart_8250_port *up)
2444 unsigned int size = serial8250_port_size(up);
2447 switch (up->port.iotype) {
2453 if (!up->port.mapbase)
2456 if (!request_mem_region(up->port.mapbase, size, "serial")) {
2461 if (up->port.flags & UPF_IOREMAP) {
2462 up->port.membase = ioremap_nocache(up->port.mapbase,
2464 if (!up->port.membase) {
2465 release_mem_region(up->port.mapbase, size);
2473 if (!request_region(up->port.iobase, size, "serial"))
2480 static void serial8250_release_std_resource(struct uart_8250_port *up)
2482 unsigned int size = serial8250_port_size(up);
2484 switch (up->port.iotype) {
2490 if (!up->port.mapbase)
2493 if (up->port.flags & UPF_IOREMAP) {
2494 iounmap(up->port.membase);
2495 up->port.membase = NULL;
2498 release_mem_region(up->port.mapbase, size);
2503 release_region(up->port.iobase, size);
2508 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2510 unsigned long start = UART_RSA_BASE << up->port.regshift;
2511 unsigned int size = 8 << up->port.regshift;
2514 switch (up->port.iotype) {
2517 start += up->port.iobase;
2518 if (request_region(start, size, "serial-rsa"))
2528 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2530 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2531 unsigned int size = 8 << up->port.regshift;
2533 switch (up->port.iotype) {
2536 release_region(up->port.iobase + offset, size);
2541 static void serial8250_release_port(struct uart_port *port)
2543 struct uart_8250_port *up = (struct uart_8250_port *)port;
2545 serial8250_release_std_resource(up);
2546 if (up->port.type == PORT_RSA)
2547 serial8250_release_rsa_resource(up);
2550 static int serial8250_request_port(struct uart_port *port)
2552 struct uart_8250_port *up = (struct uart_8250_port *)port;
2555 ret = serial8250_request_std_resource(up);
2556 if (ret == 0 && up->port.type == PORT_RSA) {
2557 ret = serial8250_request_rsa_resource(up);
2559 serial8250_release_std_resource(up);
2565 static void serial8250_config_port(struct uart_port *port, int flags)
2567 struct uart_8250_port *up = (struct uart_8250_port *)port;
2568 int probeflags = PROBE_ANY;
2572 * Find the region that we can probe for. This in turn
2573 * tells us whether we can probe for the type of port.
2575 ret = serial8250_request_std_resource(up);
2579 ret = serial8250_request_rsa_resource(up);
2581 probeflags &= ~PROBE_RSA;
2583 if (flags & UART_CONFIG_TYPE)
2584 autoconfig(up, probeflags);
2585 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2588 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
2589 serial8250_release_rsa_resource(up);
2590 if (up->port.type == PORT_UNKNOWN)
2591 serial8250_release_std_resource(up);
2595 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2597 if (ser->irq >= nr_irqs || ser->irq < 0 ||
2598 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2599 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2600 ser->type == PORT_STARTECH)
2606 serial8250_type(struct uart_port *port)
2608 int type = port->type;
2610 if (type >= ARRAY_SIZE(uart_config))
2612 return uart_config[type].name;
2615 static struct uart_ops serial8250_pops = {
2616 .tx_empty = serial8250_tx_empty,
2617 .set_mctrl = serial8250_set_mctrl,
2618 .get_mctrl = serial8250_get_mctrl,
2619 .stop_tx = serial8250_stop_tx,
2620 .start_tx = serial8250_start_tx,
2621 .stop_rx = serial8250_stop_rx,
2622 .enable_ms = serial8250_enable_ms,
2623 .break_ctl = serial8250_break_ctl,
2624 .startup = serial8250_startup,
2625 .shutdown = serial8250_shutdown,
2626 .set_termios = serial8250_set_termios,
2627 .pm = serial8250_pm,
2628 .type = serial8250_type,
2629 .release_port = serial8250_release_port,
2630 .request_port = serial8250_request_port,
2631 .config_port = serial8250_config_port,
2632 .verify_port = serial8250_verify_port,
2633 #ifdef CONFIG_CONSOLE_POLL
2634 .poll_get_char = serial8250_get_poll_char,
2635 .poll_put_char = serial8250_put_poll_char,
2639 static struct uart_8250_port serial8250_ports[UART_NR];
2641 static void __init serial8250_isa_init_ports(void)
2643 struct uart_8250_port *up;
2644 static int first = 1;
2651 for (i = 0; i < nr_uarts; i++) {
2652 struct uart_8250_port *up = &serial8250_ports[i];
2655 spin_lock_init(&up->port.lock);
2657 init_timer(&up->timer);
2658 up->timer.function = serial8250_timeout;
2661 * ALPHA_KLUDGE_MCR needs to be killed.
2663 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2664 up->mcr_force = ALPHA_KLUDGE_MCR;
2666 up->port.ops = &serial8250_pops;
2669 for (i = 0, up = serial8250_ports;
2670 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2672 up->port.iobase = old_serial_port[i].port;
2673 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2674 up->port.uartclk = old_serial_port[i].baud_base * 16;
2675 up->port.flags = old_serial_port[i].flags;
2676 up->port.hub6 = old_serial_port[i].hub6;
2677 up->port.membase = old_serial_port[i].iomem_base;
2678 up->port.iotype = old_serial_port[i].io_type;
2679 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2680 set_io_from_upio(&up->port);
2682 up->port.flags |= UPF_SHARE_IRQ;
2687 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2691 serial8250_isa_init_ports();
2693 for (i = 0; i < nr_uarts; i++) {
2694 struct uart_8250_port *up = &serial8250_ports[i];
2697 uart_add_one_port(drv, &up->port);
2701 #ifdef CONFIG_SERIAL_8250_CONSOLE
2703 static void serial8250_console_putchar(struct uart_port *port, int ch)
2705 struct uart_8250_port *up = (struct uart_8250_port *)port;
2707 wait_for_xmitr(up, UART_LSR_THRE);
2708 serial_out(up, UART_TX, ch);
2712 * Print a string to the serial port trying not to disturb
2713 * any possible real use of the port...
2715 * The console_lock must be held when we get here.
2718 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2720 struct uart_8250_port *up = &serial8250_ports[co->index];
2721 unsigned long flags;
2725 touch_nmi_watchdog();
2727 local_irq_save(flags);
2728 if (up->port.sysrq) {
2729 /* serial8250_handle_port() already took the lock */
2731 } else if (oops_in_progress) {
2732 locked = spin_trylock(&up->port.lock);
2734 spin_lock(&up->port.lock);
2737 * First save the IER then disable the interrupts
2739 ier = serial_in(up, UART_IER);
2741 if (up->capabilities & UART_CAP_UUE)
2742 serial_out(up, UART_IER, UART_IER_UUE);
2744 serial_out(up, UART_IER, 0);
2746 uart_console_write(&up->port, s, count, serial8250_console_putchar);
2749 * Finally, wait for transmitter to become empty
2750 * and restore the IER
2752 wait_for_xmitr(up, BOTH_EMPTY);
2753 serial_out(up, UART_IER, ier);
2756 * The receive handling will happen properly because the
2757 * receive ready bit will still be set; it is not cleared
2758 * on read. However, modem control will not, we must
2759 * call it if we have saved something in the saved flags
2760 * while processing with interrupts off.
2762 if (up->msr_saved_flags)
2763 check_modem_status(up);
2766 spin_unlock(&up->port.lock);
2767 local_irq_restore(flags);
2770 static int __init serial8250_console_setup(struct console *co, char *options)
2772 struct uart_port *port;
2779 * Check whether an invalid uart number has been specified, and
2780 * if so, search for the first available port that does have
2783 if (co->index >= nr_uarts)
2785 port = &serial8250_ports[co->index].port;
2786 if (!port->iobase && !port->membase)
2790 uart_parse_options(options, &baud, &parity, &bits, &flow);
2792 return uart_set_options(port, co, baud, parity, bits, flow);
2795 static int serial8250_console_early_setup(void)
2797 return serial8250_find_port_for_earlycon();
2800 static struct console serial8250_console = {
2802 .write = serial8250_console_write,
2803 .device = uart_console_device,
2804 .setup = serial8250_console_setup,
2805 .early_setup = serial8250_console_early_setup,
2806 .flags = CON_PRINTBUFFER,
2808 .data = &serial8250_reg,
2811 static int __init serial8250_console_init(void)
2813 if (nr_uarts > UART_NR)
2816 serial8250_isa_init_ports();
2817 register_console(&serial8250_console);
2820 console_initcall(serial8250_console_init);
2822 int serial8250_find_port(struct uart_port *p)
2825 struct uart_port *port;
2827 for (line = 0; line < nr_uarts; line++) {
2828 port = &serial8250_ports[line].port;
2829 if (uart_match_port(p, port))
2835 #define SERIAL8250_CONSOLE &serial8250_console
2837 #define SERIAL8250_CONSOLE NULL
2840 static struct uart_driver serial8250_reg = {
2841 .owner = THIS_MODULE,
2842 .driver_name = "serial",
2846 .cons = SERIAL8250_CONSOLE,
2850 * early_serial_setup - early registration for 8250 ports
2852 * Setup an 8250 port structure prior to console initialisation. Use
2853 * after console initialisation will cause undefined behaviour.
2855 int __init early_serial_setup(struct uart_port *port)
2857 struct uart_port *p;
2859 if (port->line >= ARRAY_SIZE(serial8250_ports))
2862 serial8250_isa_init_ports();
2863 p = &serial8250_ports[port->line].port;
2864 p->iobase = port->iobase;
2865 p->membase = port->membase;
2867 p->uartclk = port->uartclk;
2868 p->fifosize = port->fifosize;
2869 p->regshift = port->regshift;
2870 p->iotype = port->iotype;
2871 p->flags = port->flags;
2872 p->mapbase = port->mapbase;
2873 p->private_data = port->private_data;
2874 p->type = port->type;
2875 p->line = port->line;
2877 set_io_from_upio(p);
2878 if (port->serial_in)
2879 p->serial_in = port->serial_in;
2880 if (port->serial_out)
2881 p->serial_out = port->serial_out;
2887 * serial8250_suspend_port - suspend one serial port
2888 * @line: serial line number
2890 * Suspend one serial port.
2892 void serial8250_suspend_port(int line)
2894 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2898 * serial8250_resume_port - resume one serial port
2899 * @line: serial line number
2901 * Resume one serial port.
2903 void serial8250_resume_port(int line)
2905 struct uart_8250_port *up = &serial8250_ports[line];
2907 if (up->capabilities & UART_NATSEMI) {
2910 /* Ensure it's still in high speed mode */
2911 serial_outp(up, UART_LCR, 0xE0);
2913 tmp = serial_in(up, 0x04); /* EXCR2 */
2914 tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
2915 tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
2916 serial_outp(up, 0x04, tmp);
2918 serial_outp(up, UART_LCR, 0);
2920 uart_resume_port(&serial8250_reg, &up->port);
2924 * Register a set of serial devices attached to a platform device. The
2925 * list is terminated with a zero flags entry, which means we expect
2926 * all entries to have at least UPF_BOOT_AUTOCONF set.
2928 static int __devinit serial8250_probe(struct platform_device *dev)
2930 struct plat_serial8250_port *p = dev->dev.platform_data;
2931 struct uart_port port;
2934 memset(&port, 0, sizeof(struct uart_port));
2936 for (i = 0; p && p->flags != 0; p++, i++) {
2937 port.iobase = p->iobase;
2938 port.membase = p->membase;
2940 port.uartclk = p->uartclk;
2941 port.regshift = p->regshift;
2942 port.iotype = p->iotype;
2943 port.flags = p->flags;
2944 port.mapbase = p->mapbase;
2945 port.hub6 = p->hub6;
2946 port.private_data = p->private_data;
2947 port.type = p->type;
2948 port.serial_in = p->serial_in;
2949 port.serial_out = p->serial_out;
2950 port.dev = &dev->dev;
2952 port.flags |= UPF_SHARE_IRQ;
2953 ret = serial8250_register_port(&port);
2955 dev_err(&dev->dev, "unable to register port at index %d "
2956 "(IO%lx MEM%llx IRQ%d): %d\n", i,
2957 p->iobase, (unsigned long long)p->mapbase,
2965 * Remove serial ports registered against a platform device.
2967 static int __devexit serial8250_remove(struct platform_device *dev)
2971 for (i = 0; i < nr_uarts; i++) {
2972 struct uart_8250_port *up = &serial8250_ports[i];
2974 if (up->port.dev == &dev->dev)
2975 serial8250_unregister_port(i);
2980 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
2984 for (i = 0; i < UART_NR; i++) {
2985 struct uart_8250_port *up = &serial8250_ports[i];
2987 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
2988 uart_suspend_port(&serial8250_reg, &up->port);
2994 static int serial8250_resume(struct platform_device *dev)
2998 for (i = 0; i < UART_NR; i++) {
2999 struct uart_8250_port *up = &serial8250_ports[i];
3001 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3002 serial8250_resume_port(i);
3008 static struct platform_driver serial8250_isa_driver = {
3009 .probe = serial8250_probe,
3010 .remove = __devexit_p(serial8250_remove),
3011 .suspend = serial8250_suspend,
3012 .resume = serial8250_resume,
3014 .name = "serial8250",
3015 .owner = THIS_MODULE,
3020 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3021 * in the table in include/asm/serial.h
3023 static struct platform_device *serial8250_isa_devs;
3026 * serial8250_register_port and serial8250_unregister_port allows for
3027 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3028 * modems and PCI multiport cards.
3030 static DEFINE_MUTEX(serial_mutex);
3032 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3037 * First, find a port entry which matches.
3039 for (i = 0; i < nr_uarts; i++)
3040 if (uart_match_port(&serial8250_ports[i].port, port))
3041 return &serial8250_ports[i];
3044 * We didn't find a matching entry, so look for the first
3045 * free entry. We look for one which hasn't been previously
3046 * used (indicated by zero iobase).
3048 for (i = 0; i < nr_uarts; i++)
3049 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3050 serial8250_ports[i].port.iobase == 0)
3051 return &serial8250_ports[i];
3054 * That also failed. Last resort is to find any entry which
3055 * doesn't have a real port associated with it.
3057 for (i = 0; i < nr_uarts; i++)
3058 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3059 return &serial8250_ports[i];
3065 * serial8250_register_port - register a serial port
3066 * @port: serial port template
3068 * Configure the serial port specified by the request. If the
3069 * port exists and is in use, it is hung up and unregistered
3072 * The port is then probed and if necessary the IRQ is autodetected
3073 * If this fails an error is returned.
3075 * On success the port is ready to use and the line number is returned.
3077 int serial8250_register_port(struct uart_port *port)
3079 struct uart_8250_port *uart;
3082 if (port->uartclk == 0)
3085 mutex_lock(&serial_mutex);
3087 uart = serial8250_find_match_or_unused(port);
3089 uart_remove_one_port(&serial8250_reg, &uart->port);
3091 uart->port.iobase = port->iobase;
3092 uart->port.membase = port->membase;
3093 uart->port.irq = port->irq;
3094 uart->port.uartclk = port->uartclk;
3095 uart->port.fifosize = port->fifosize;
3096 uart->port.regshift = port->regshift;
3097 uart->port.iotype = port->iotype;
3098 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
3099 uart->port.mapbase = port->mapbase;
3100 uart->port.private_data = port->private_data;
3102 uart->port.dev = port->dev;
3104 if (port->flags & UPF_FIXED_TYPE) {
3105 uart->port.type = port->type;
3106 uart->port.fifosize = uart_config[port->type].fifo_size;
3107 uart->capabilities = uart_config[port->type].flags;
3108 uart->tx_loadsz = uart_config[port->type].tx_loadsz;
3111 set_io_from_upio(&uart->port);
3112 /* Possibly override default I/O functions. */
3113 if (port->serial_in)
3114 uart->port.serial_in = port->serial_in;
3115 if (port->serial_out)
3116 uart->port.serial_out = port->serial_out;
3118 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3120 ret = uart->port.line;
3122 mutex_unlock(&serial_mutex);
3126 EXPORT_SYMBOL(serial8250_register_port);
3129 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3130 * @line: serial line number
3132 * Remove one serial port. This may not be called from interrupt
3133 * context. We hand the port back to the our control.
3135 void serial8250_unregister_port(int line)
3137 struct uart_8250_port *uart = &serial8250_ports[line];
3139 mutex_lock(&serial_mutex);
3140 uart_remove_one_port(&serial8250_reg, &uart->port);
3141 if (serial8250_isa_devs) {
3142 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3143 uart->port.type = PORT_UNKNOWN;
3144 uart->port.dev = &serial8250_isa_devs->dev;
3145 uart_add_one_port(&serial8250_reg, &uart->port);
3147 uart->port.dev = NULL;
3149 mutex_unlock(&serial_mutex);
3151 EXPORT_SYMBOL(serial8250_unregister_port);
3153 static int __init serial8250_init(void)
3157 if (nr_uarts > UART_NR)
3160 printk(KERN_INFO "Serial: 8250/16550 driver, "
3161 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3162 share_irqs ? "en" : "dis");
3165 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3167 serial8250_reg.nr = UART_NR;
3168 ret = uart_register_driver(&serial8250_reg);
3173 serial8250_isa_devs = platform_device_alloc("serial8250",
3174 PLAT8250_DEV_LEGACY);
3175 if (!serial8250_isa_devs) {
3177 goto unreg_uart_drv;
3180 ret = platform_device_add(serial8250_isa_devs);
3184 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3186 ret = platform_driver_register(&serial8250_isa_driver);
3190 platform_device_del(serial8250_isa_devs);
3192 platform_device_put(serial8250_isa_devs);
3195 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3197 uart_unregister_driver(&serial8250_reg);
3203 static void __exit serial8250_exit(void)
3205 struct platform_device *isa_dev = serial8250_isa_devs;
3208 * This tells serial8250_unregister_port() not to re-register
3209 * the ports (thereby making serial8250_isa_driver permanently
3212 serial8250_isa_devs = NULL;
3214 platform_driver_unregister(&serial8250_isa_driver);
3215 platform_device_unregister(isa_dev);
3218 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3220 uart_unregister_driver(&serial8250_reg);
3224 module_init(serial8250_init);
3225 module_exit(serial8250_exit);
3227 EXPORT_SYMBOL(serial8250_suspend_port);
3228 EXPORT_SYMBOL(serial8250_resume_port);
3230 MODULE_LICENSE("GPL");
3231 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3233 module_param(share_irqs, uint, 0644);
3234 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3237 module_param(nr_uarts, uint, 0644);
3238 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3240 #ifdef CONFIG_SERIAL_8250_RSA
3241 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3242 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3244 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);